diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h index 0e432cf9d..a56d7b847 100644 --- a/bochs/cpu/cpu.h +++ b/bochs/cpu/cpu.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: cpu.h,v 1.557 2009-01-20 18:15:25 sshwarts Exp $ +// $Id: cpu.h,v 1.558 2009-01-20 19:34:16 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -279,7 +279,7 @@ #define BX_MC_EXCEPTION 18 #define BX_XM_EXCEPTION 19 -#define BX_MSR_MAX_INDEX 0x1000 +#define BX_CPU_HANDLED_EXCEPTIONS 20 /* MSR registers */ #define BX_MSR_TSC 0x010 @@ -329,6 +329,8 @@ #define BX_MSR_MTRR_DEFTYPE 0x2ff #endif +#define BX_MSR_MAX_INDEX 0x1000 + enum { BX_MEMTYPE_UC = 0, BX_MEMTYPE_WC, diff --git a/bochs/cpu/exception.cc b/bochs/cpu/exception.cc index 0322f3523..1859f76d3 100644 --- a/bochs/cpu/exception.cc +++ b/bochs/cpu/exception.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: exception.cc,v 1.128 2009-01-20 18:15:25 sshwarts Exp $ +// $Id: exception.cc,v 1.129 2009-01-20 19:34:16 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -817,10 +817,37 @@ void BX_CPU_C::interrupt(Bit8u vector, unsigned is_INT, bx_bool is_error_code, B // trap: override exception class to TRAP void BX_CPU_C::exception(unsigned vector, Bit16u error_code, unsigned unused) { - unsigned exception_type = 0, exception_class = BX_EXCEPTION_CLASS_FAULT; - bx_bool push_error = 0; + struct ExceptionInfo { + unsigned exception_type; + unsigned exception_class; + bx_bool push_error; + }; - BX_INSTR_EXCEPTION(BX_CPU_ID, vector); + static struct ExceptionInfo exceptions_info[BX_CPU_HANDLED_EXCEPTIONS] = { + /* DE */ { BX_ET_CONTRIBUTORY, BX_EXCEPTION_CLASS_FAULT, 0 }, + /* DB */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 0 }, + /* -- */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 0 }, // NMI + /* BP */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_TRAP, 0 }, + /* OF */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_TRAP, 0 }, + /* BR */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 0 }, + /* UD */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 0 }, + /* NM */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 0 }, + /* DF */ { BX_ET_DOUBLE_FAULT, BX_EXCEPTION_CLASS_ABORT, 1 }, + // coprocessor segment overrun (286,386 only) + /* -- */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_ABORT, 0 }, + /* TS */ { BX_ET_CONTRIBUTORY, BX_EXCEPTION_CLASS_FAULT, 1 }, + /* NP */ { BX_ET_CONTRIBUTORY, BX_EXCEPTION_CLASS_FAULT, 1 }, + /* SS */ { BX_ET_CONTRIBUTORY, BX_EXCEPTION_CLASS_FAULT, 1 }, + /* GP */ { BX_ET_CONTRIBUTORY, BX_EXCEPTION_CLASS_FAULT, 1 }, + /* PF */ { BX_ET_PAGE_FAULT, BX_EXCEPTION_CLASS_FAULT, 1 }, + /* -- */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 0 }, // reserved + /* MF */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 0 }, + /* AC */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 1 }, + /* MC */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_ABORT, 0 }, + /* XM */ { BX_ET_BENIGN, BX_EXCEPTION_CLASS_FAULT, 0 } + }; + + BX_INSTR_EXCEPTION(BX_CPU_ID, vector, error_code); #if BX_DEBUGGER bx_dbg_exception(BX_CPU_ID, vector, error_code); @@ -857,131 +884,21 @@ void BX_CPU_C::exception(unsigned vector, Bit16u error_code, unsigned unused) } } - // note: fault-class exceptions _except_ #DB set RF in - // eflags image. + unsigned exception_type = 0; + unsigned exception_class = BX_EXCEPTION_CLASS_FAULT; + bx_bool push_error = 0; - switch (vector) { - case BX_DE_EXCEPTION: // DIV by 0 - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_CONTRIBUTORY; - break; - case BX_DB_EXCEPTION: // debug exceptions - push_error = 0; - // Instruction fetch breakpoint - FAULT - // Data read or write breakpoint - TRAP - // I/O read or write breakpoint - TRAP - // General detect condition - FAULT - // Single-step - TRAP - // Task-switch - TRAP - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_BENIGN; - break; - case 2: // NMI - push_error = 0; - exception_type = BX_ET_BENIGN; - break; - case BX_BP_EXCEPTION: // breakpoint - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_TRAP; - exception_type = BX_ET_BENIGN; - break; - case BX_OF_EXCEPTION: // overflow - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_TRAP; - exception_type = BX_ET_BENIGN; - break; - case BX_BR_EXCEPTION: // bounds check - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_BENIGN; - break; - case BX_UD_EXCEPTION: // invalid opcode - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_BENIGN; - break; - case BX_NM_EXCEPTION: // device not available - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_BENIGN; - break; - case BX_DF_EXCEPTION: // double fault - push_error = 1; - error_code = 0; - exception_class = BX_EXCEPTION_CLASS_ABORT; - exception_type = BX_ET_DOUBLE_FAULT; - break; - case 9: // coprocessor segment overrun (286,386 only) - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_ABORT; - exception_type = BX_ET_BENIGN; - BX_PANIC(("exception(9): unfinished")); - break; - case BX_TS_EXCEPTION: // invalid TSS - push_error = 1; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_CONTRIBUTORY; - break; - case BX_NP_EXCEPTION: // segment not present - push_error = 1; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_CONTRIBUTORY; - break; - case BX_SS_EXCEPTION: // stack fault - push_error = 1; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_CONTRIBUTORY; - break; - case BX_GP_EXCEPTION: // general protection - push_error = 1; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_CONTRIBUTORY; - break; - case BX_PF_EXCEPTION: // page fault - push_error = 1; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_PAGE_FAULT; - break; - case 15: // reserved - BX_PANIC(("exception(15): reserved")); - push_error = 0; - exception_type = 0; - break; - case BX_MF_EXCEPTION: // floating-point error - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_BENIGN; - break; -#if BX_CPU_LEVEL >= 4 - case BX_AC_EXCEPTION: // alignment check - push_error = 1; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_BENIGN; - break; -#endif -#if BX_CPU_LEVEL >= 5 - case BX_MC_EXCEPTION: // machine check - BX_PANIC(("exception(): machine-check, vector 18 not implemented")); - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_ABORT; - exception_type = BX_ET_BENIGN; - break; -#if BX_SUPPORT_SSE - case BX_XM_EXCEPTION: // SIMD Floating-Point exception - push_error = 0; - exception_class = BX_EXCEPTION_CLASS_FAULT; - exception_type = BX_ET_BENIGN; - break; -#endif -#endif - default: - BX_PANIC(("exception(%u): bad vector", (unsigned) vector)); - exception_type = BX_ET_BENIGN; - push_error = 0; // keep compiler happy for now - break; + if (vector < BX_CPU_HANDLED_EXCEPTIONS) { + push_error = exceptions_info[vector].push_error; + exception_class = exceptions_info[vector].exception_class; + exception_type = exceptions_info[vector].exception_type; + } + else { + BX_PANIC(("exception(%u): bad vector", vector)); } + // note: fault-class exceptions _except_ #DB set RF in + // eflags image. if (exception_class == BX_EXCEPTION_CLASS_FAULT) { // restore RIP/RSP to value before error occurred diff --git a/bochs/instrument/example0/instrument.cc b/bochs/instrument/example0/instrument.cc index c28a74f33..c928af767 100644 --- a/bochs/instrument/example0/instrument.cc +++ b/bochs/instrument/example0/instrument.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: instrument.cc,v 1.26 2008-11-18 20:55:59 sshwarts Exp $ +// $Id: instrument.cc,v 1.27 2009-01-20 19:34:16 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -187,11 +187,11 @@ void bx_instr_interrupt(unsigned cpu, unsigned vector) } } -void bx_instr_exception(unsigned cpu, unsigned vector) +void bx_instr_exception(unsigned cpu, unsigned vector, unsigned error_code) { if(active) { - fprintf(stderr, "CPU %u: exception %02xh\n", cpu, vector); + fprintf(stderr, "CPU %u: exception %02xh, error_code = %x\n", cpu, vector, error_code); } } diff --git a/bochs/instrument/example0/instrument.h b/bochs/instrument/example0/instrument.h index 0b417fa04..b619f7ab7 100644 --- a/bochs/instrument/example0/instrument.h +++ b/bochs/instrument/example0/instrument.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: instrument.h,v 1.32 2008-12-29 18:02:01 sshwarts Exp $ +// $Id: instrument.h,v 1.33 2009-01-20 19:34:16 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -73,135 +73,137 @@ void bx_instr_far_branch(unsigned cpu, unsigned what, Bit16u new_cs, bx_address void bx_instr_opcode(unsigned cpu, const Bit8u *opcode, unsigned len, bx_bool is32, bx_bool is64); void bx_instr_interrupt(unsigned cpu, unsigned vector); -void bx_instr_exception(unsigned cpu, unsigned vector); +void bx_instr_exception(unsigned cpu, unsigned vector, unsigned error_code); void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip); void bx_instr_mem_data_access(unsigned cpu, unsigned seg, bx_address offset, unsigned len, unsigned rw); /* initialization/deinitialization of instrumentalization*/ -# define BX_INSTR_INIT_ENV() bx_instr_init_env() -# define BX_INSTR_EXIT_ENV() bx_instr_exit_env() +#define BX_INSTR_INIT_ENV() bx_instr_init_env() +#define BX_INSTR_EXIT_ENV() bx_instr_exit_env() /* simulation init, shutdown, reset */ -# define BX_INSTR_INITIALIZE(cpu_id) bx_instr_initialize(cpu_id) -# define BX_INSTR_EXIT(cpu_id) -# define BX_INSTR_RESET(cpu_id, type) bx_instr_reset(cpu_id, type) -# define BX_INSTR_HLT(cpu_id) -# define BX_INSTR_MWAIT(cpu_id, addr, len, flags) -# define BX_INSTR_NEW_INSTRUCTION(cpu_id) bx_instr_new_instruction(cpu_id) +#define BX_INSTR_INITIALIZE(cpu_id) bx_instr_initialize(cpu_id) +#define BX_INSTR_EXIT(cpu_id) +#define BX_INSTR_RESET(cpu_id, type) bx_instr_reset(cpu_id, type) +#define BX_INSTR_HLT(cpu_id) +#define BX_INSTR_MWAIT(cpu_id, addr, len, flags) +#define BX_INSTR_NEW_INSTRUCTION(cpu_id) bx_instr_new_instruction(cpu_id) /* called from command line debugger */ -# define BX_INSTR_DEBUG_PROMPT() -# define BX_INSTR_START() -# define BX_INSTR_STOP() -# define BX_INSTR_PRINT() +#define BX_INSTR_DEBUG_PROMPT() +#define BX_INSTR_START() +#define BX_INSTR_STOP() +#define BX_INSTR_PRINT() /* branch resoultion */ -# define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) bx_instr_cnear_branch_taken(cpu_id, new_eip) -# define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) bx_instr_cnear_branch_not_taken(cpu_id) -# define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) bx_instr_ucnear_branch(cpu_id, what, new_eip) -# define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) bx_instr_far_branch(cpu_id, what, new_cs, new_eip) +#define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) bx_instr_cnear_branch_taken(cpu_id, new_eip) +#define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) bx_instr_cnear_branch_not_taken(cpu_id) +#define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) bx_instr_ucnear_branch(cpu_id, what, new_eip) +#define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) bx_instr_far_branch(cpu_id, what, new_cs, new_eip) /* decoding completed */ -# define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) \ +#define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) \ bx_instr_opcode(cpu_id, opcode, len, is32, is64) /* exceptional case and interrupt */ -# define BX_INSTR_EXCEPTION(cpu_id, vector) bx_instr_exception(cpu_id, vector) -# define BX_INSTR_INTERRUPT(cpu_id, vector) bx_instr_interrupt(cpu_id, vector) -# define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) bx_instr_hwinterrupt(cpu_id, vector, cs, eip) +#define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) \ + bx_instr_exception(cpu_id, vector, error_code) + +#define BX_INSTR_INTERRUPT(cpu_id, vector) bx_instr_interrupt(cpu_id, vector) +#define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) bx_instr_hwinterrupt(cpu_id, vector, cs, eip) /* TLB/CACHE control instruction executed */ -# define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) -# define BX_INSTR_CACHE_CNTRL(cpu_id, what) -# define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) -# define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) +#define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) +#define BX_INSTR_CACHE_CNTRL(cpu_id, what) +#define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) +#define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) /* execution */ -# define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) -# define BX_INSTR_AFTER_EXECUTION(cpu_id, i) -# define BX_INSTR_REPEAT_ITERATION(cpu_id, i) +#define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) +#define BX_INSTR_AFTER_EXECUTION(cpu_id, i) +#define BX_INSTR_REPEAT_ITERATION(cpu_id, i) /* memory access */ -# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) +#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) /* memory access */ -# define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) \ +#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) \ bx_instr_mem_data_access(cpu_id, seg, offset, len, rw) /* called from memory object */ -# define BX_INSTR_PHY_WRITE(cpu_id, addr, len) -# define BX_INSTR_PHY_READ(cpu_id, addr, len) +#define BX_INSTR_PHY_WRITE(cpu_id, addr, len) +#define BX_INSTR_PHY_READ(cpu_id, addr, len) /* feedback from device units */ -# define BX_INSTR_INP(addr, len) -# define BX_INSTR_INP2(addr, len, val) -# define BX_INSTR_OUTP(addr, len, val) +#define BX_INSTR_INP(addr, len) +#define BX_INSTR_INP2(addr, len, val) +#define BX_INSTR_OUTP(addr, len, val) /* wrmsr callback */ -# define BX_INSTR_WRMSR(cpu_id, addr, value) +#define BX_INSTR_WRMSR(cpu_id, addr, value) -#else +#else // BX_INSTRUMENTATION -/* initialization/deinitialization of instrumentalization*/ -# define BX_INSTR_INIT_ENV() -# define BX_INSTR_EXIT_ENV() +/* initialization/deinitialization of instrumentalization */ +#define BX_INSTR_INIT_ENV() +#define BX_INSTR_EXIT_ENV() /* simulation init, shutdown, reset */ -# define BX_INSTR_INITIALIZE(cpu_id) -# define BX_INSTR_EXIT(cpu_id) -# define BX_INSTR_RESET(cpu_id, type) -# define BX_INSTR_HLT(cpu_id) -# define BX_INSTR_MWAIT(cpu_id, addr, len, flags) -# define BX_INSTR_NEW_INSTRUCTION(cpu_id) +#define BX_INSTR_INITIALIZE(cpu_id) +#define BX_INSTR_EXIT(cpu_id) +#define BX_INSTR_RESET(cpu_id, type) +#define BX_INSTR_HLT(cpu_id) +#define BX_INSTR_MWAIT(cpu_id, addr, len, flags) +#define BX_INSTR_NEW_INSTRUCTION(cpu_id) /* called from command line debugger */ -# define BX_INSTR_DEBUG_PROMPT() -# define BX_INSTR_START() -# define BX_INSTR_STOP() -# define BX_INSTR_PRINT() +#define BX_INSTR_DEBUG_PROMPT() +#define BX_INSTR_START() +#define BX_INSTR_STOP() +#define BX_INSTR_PRINT() /* branch resoultion */ -# define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) -# define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) -# define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) -# define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) +#define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) +#define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) +#define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) +#define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) /* decoding completed */ -# define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) +#define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) /* exceptional case and interrupt */ -# define BX_INSTR_EXCEPTION(cpu_id, vector) -# define BX_INSTR_INTERRUPT(cpu_id, vector) -# define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) +#define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) +#define BX_INSTR_INTERRUPT(cpu_id, vector) +#define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) /* TLB/CACHE control instruction executed */ -# define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) -# define BX_INSTR_CACHE_CNTRL(cpu_id, what) -# define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) -# define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) +#define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) +#define BX_INSTR_CACHE_CNTRL(cpu_id, what) +#define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) +#define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) /* execution */ -# define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) -# define BX_INSTR_AFTER_EXECUTION(cpu_id, i) -# define BX_INSTR_REPEAT_ITERATION(cpu_id, i) +#define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) +#define BX_INSTR_AFTER_EXECUTION(cpu_id, i) +#define BX_INSTR_REPEAT_ITERATION(cpu_id, i) /* memory access */ -# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) +#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) /* memory access */ -# define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) +#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) /* called from memory object */ -# define BX_INSTR_PHY_WRITE(cpu_id, addr, len) -# define BX_INSTR_PHY_READ(cpu_id, addr, len) +#define BX_INSTR_PHY_WRITE(cpu_id, addr, len) +#define BX_INSTR_PHY_READ(cpu_id, addr, len) /* feedback from device units */ -# define BX_INSTR_INP(addr, len) -# define BX_INSTR_INP2(addr, len, val) -# define BX_INSTR_OUTP(addr, len, val) +#define BX_INSTR_INP(addr, len) +#define BX_INSTR_INP2(addr, len, val) +#define BX_INSTR_OUTP(addr, len, val) /* wrmsr callback */ -# define BX_INSTR_WRMSR(cpu_id, addr, value) +#define BX_INSTR_WRMSR(cpu_id, addr, value) -#endif +#endif // BX_INSTRUMENTATION diff --git a/bochs/instrument/example1/instrument.cc b/bochs/instrument/example1/instrument.cc index 6eef6145b..2848721b3 100644 --- a/bochs/instrument/example1/instrument.cc +++ b/bochs/instrument/example1/instrument.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: instrument.cc,v 1.21 2008-11-18 20:55:59 sshwarts Exp $ +// $Id: instrument.cc,v 1.22 2009-01-20 19:34:16 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -155,11 +155,11 @@ void bxInstrumentation::bx_instr_interrupt(unsigned vector) } } -void bxInstrumentation::bx_instr_exception(unsigned vector) +void bxInstrumentation::bx_instr_exception(unsigned vector, unsigned error_code) { if(active) { - fprintf(stderr, "CPU %u: exception %02xh\n", cpu_id, vector); + fprintf(stderr, "CPU %u: exception %02xh error_code=%x\n", cpu_id, vector, error_code); } } diff --git a/bochs/instrument/example1/instrument.h b/bochs/instrument/example1/instrument.h index d4b26f767..f3fa76fec 100644 --- a/bochs/instrument/example1/instrument.h +++ b/bochs/instrument/example1/instrument.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: instrument.h,v 1.30 2008-12-29 18:02:01 sshwarts Exp $ +// $Id: instrument.h,v 1.31 2009-01-20 19:34:16 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -110,7 +110,7 @@ public: void bx_instr_opcode(const Bit8u *opcode, unsigned len, bx_bool is32, bx_bool is64); void bx_instr_interrupt(unsigned vector); - void bx_instr_exception(unsigned vector); + void bx_instr_exception(unsigned vector, unsigned error_code); void bx_instr_hwinterrupt(unsigned vector, Bit16u cs, bx_address eip); void bx_instr_mem_data_access(unsigned seg, bx_address offset, unsigned len, unsigned rw); @@ -124,129 +124,131 @@ void bx_instr_init(unsigned cpu); extern bxInstrumentation *icpu; /* initialization/deinitialization of instrumentalization*/ -# define BX_INSTR_INIT_ENV() bx_instr_init_env() -# define BX_INSTR_EXIT_ENV() bx_instr_exit_env() +#define BX_INSTR_INIT_ENV() bx_instr_init_env() +#define BX_INSTR_EXIT_ENV() bx_instr_exit_env() /* simulation init, shutdown, reset */ -# define BX_INSTR_INITIALIZE(cpu_id) bx_instr_initialize(cpu_id); -# define BX_INSTR_EXIT(cpu_id) -# define BX_INSTR_RESET(cpu_id, type) icpu[cpu_id].bx_instr_reset(type) -# define BX_INSTR_HLT(cpu_id) -# define BX_INSTR_MWAIT(cpu_id, addr, len, flags) +#define BX_INSTR_INITIALIZE(cpu_id) bx_instr_initialize(cpu_id); +#define BX_INSTR_EXIT(cpu_id) +#define BX_INSTR_RESET(cpu_id, type) icpu[cpu_id].bx_instr_reset(type) +#define BX_INSTR_HLT(cpu_id) +#define BX_INSTR_MWAIT(cpu_id, addr, len, flags) -# define BX_INSTR_NEW_INSTRUCTION(cpu_id) icpu[cpu_id].bx_instr_new_instruction() +#define BX_INSTR_NEW_INSTRUCTION(cpu_id) icpu[cpu_id].bx_instr_new_instruction() /* called from command line debugger */ -# define BX_INSTR_DEBUG_PROMPT() -# define BX_INSTR_START() -# define BX_INSTR_STOP() -# define BX_INSTR_PRINT() +#define BX_INSTR_DEBUG_PROMPT() +#define BX_INSTR_START() +#define BX_INSTR_STOP() +#define BX_INSTR_PRINT() /* branch resoultion */ -# define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) icpu[cpu_id].bx_instr_cnear_branch_taken(new_eip) -# define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) icpu[cpu_id].bx_instr_cnear_branch_not_taken() -# define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) icpu[cpu_id].bx_instr_ucnear_branch(what, new_eip) -# define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) icpu[cpu_id].bx_instr_far_branch(what, new_cs, new_eip) +#define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) icpu[cpu_id].bx_instr_cnear_branch_taken(new_eip) +#define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) icpu[cpu_id].bx_instr_cnear_branch_not_taken() +#define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) icpu[cpu_id].bx_instr_ucnear_branch(what, new_eip) +#define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) icpu[cpu_id].bx_instr_far_branch(what, new_cs, new_eip) /* decoding completed */ -# define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) \ +#define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) \ icpu[cpu_id].bx_instr_opcode(opcode, len, is32, is64) /* exceptional case and interrupt */ -# define BX_INSTR_EXCEPTION(cpu_id, vector) icpu[cpu_id].bx_instr_exception(vector) -# define BX_INSTR_INTERRUPT(cpu_id, vector) icpu[cpu_id].bx_instr_interrupt(vector) -# define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) icpu[cpu_id].bx_instr_hwinterrupt(vector, cs, eip) +#define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) \ + icpu[cpu_id].bx_instr_exception(vector, error_code) + +#define BX_INSTR_INTERRUPT(cpu_id, vector) icpu[cpu_id].bx_instr_interrupt(vector) +#define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) icpu[cpu_id].bx_instr_hwinterrupt(vector, cs, eip) /* TLB/CACHE control instruction executed */ -# define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) -# define BX_INSTR_CACHE_CNTRL(cpu_id, what) -# define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) -# define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) +#define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) +#define BX_INSTR_CACHE_CNTRL(cpu_id, what) +#define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) +#define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) /* execution */ -# define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) -# define BX_INSTR_AFTER_EXECUTION(cpu_id, i) -# define BX_INSTR_REPEAT_ITERATION(cpu_id, i) +#define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) +#define BX_INSTR_AFTER_EXECUTION(cpu_id, i) +#define BX_INSTR_REPEAT_ITERATION(cpu_id, i) /* memory access */ -# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) +#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) -# define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) \ +#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) \ icpu[cpu_id].bx_instr_mem_data_access(seg, offset, len, rw) /* called from memory object */ -# define BX_INSTR_PHY_WRITE(cpu_id, addr, len) -# define BX_INSTR_PHY_READ(cpu_id, addr, len) +#define BX_INSTR_PHY_WRITE(cpu_id, addr, len) +#define BX_INSTR_PHY_READ(cpu_id, addr, len) /* feedback from device units */ -# define BX_INSTR_INP(addr, len) -# define BX_INSTR_INP2(addr, len, val) -# define BX_INSTR_OUTP(addr, len, val) +#define BX_INSTR_INP(addr, len) +#define BX_INSTR_INP2(addr, len, val) +#define BX_INSTR_OUTP(addr, len, val) /* wrmsr callback */ -# define BX_INSTR_WRMSR(cpu_id, addr, value) +#define BX_INSTR_WRMSR(cpu_id, addr, value) -#else +#else // BX_INSTRUMENTATION -/* initialization/deinitialization of instrumentalization*/ -# define BX_INSTR_INIT_ENV() -# define BX_INSTR_EXIT_ENV() +/* initialization/deinitialization of instrumentalization */ +#define BX_INSTR_INIT_ENV() +#define BX_INSTR_EXIT_ENV() /* simulation init, shutdown, reset */ -# define BX_INSTR_INITIALIZE(cpu_id) -# define BX_INSTR_EXIT(cpu_id) -# define BX_INSTR_RESET(cpu_id, type) -# define BX_INSTR_HLT(cpu_id) -# define BX_INSTR_MWAIT(cpu_id, addr, len, flags) -# define BX_INSTR_NEW_INSTRUCTION(cpu_id) +#define BX_INSTR_INITIALIZE(cpu_id) +#define BX_INSTR_EXIT(cpu_id) +#define BX_INSTR_RESET(cpu_id, type) +#define BX_INSTR_HLT(cpu_id) +#define BX_INSTR_MWAIT(cpu_id, addr, len, flags) +#define BX_INSTR_NEW_INSTRUCTION(cpu_id) /* called from command line debugger */ -# define BX_INSTR_DEBUG_PROMPT() -# define BX_INSTR_START() -# define BX_INSTR_STOP() -# define BX_INSTR_PRINT() +#define BX_INSTR_DEBUG_PROMPT() +#define BX_INSTR_START() +#define BX_INSTR_STOP() +#define BX_INSTR_PRINT() /* branch resoultion */ -# define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) -# define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) -# define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) -# define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) +#define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) +#define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) +#define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) +#define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) /* decoding completed */ -# define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) +#define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) /* exceptional case and interrupt */ -# define BX_INSTR_EXCEPTION(cpu_id, vector) -# define BX_INSTR_INTERRUPT(cpu_id, vector) -# define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) +#define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) +#define BX_INSTR_INTERRUPT(cpu_id, vector) +#define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) /* TLB/CACHE control instruction executed */ -# define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) -# define BX_INSTR_CACHE_CNTRL(cpu_id, what) -# define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) -# define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) +#define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) +#define BX_INSTR_CACHE_CNTRL(cpu_id, what) +#define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) +#define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) /* execution */ -# define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) -# define BX_INSTR_AFTER_EXECUTION(cpu_id, i) -# define BX_INSTR_REPEAT_ITERATION(cpu_id, i) +#define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) +#define BX_INSTR_AFTER_EXECUTION(cpu_id, i) +#define BX_INSTR_REPEAT_ITERATION(cpu_id, i) /* memory access */ -# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) +#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) /* memory access */ -# define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) +#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) /* called from memory object */ -# define BX_INSTR_PHY_WRITE(cpu_id, addr, len) -# define BX_INSTR_PHY_READ(cpu_id, addr, len) +#define BX_INSTR_PHY_WRITE(cpu_id, addr, len) +#define BX_INSTR_PHY_READ(cpu_id, addr, len) /* feedback from device units */ -# define BX_INSTR_INP(addr, len) -# define BX_INSTR_INP2(addr, len, val) -# define BX_INSTR_OUTP(addr, len, val) +#define BX_INSTR_INP(addr, len) +#define BX_INSTR_INP2(addr, len, val) +#define BX_INSTR_OUTP(addr, len, val) /* wrmsr callback */ -# define BX_INSTR_WRMSR(cpu_id, addr, value) +#define BX_INSTR_WRMSR(cpu_id, addr, value) -#endif +#endif // BX_INSTRUMENTATION diff --git a/bochs/instrument/instrumentation.txt b/bochs/instrument/instrumentation.txt index 564dbf9e5..00b4f1ef9 100755 --- a/bochs/instrument/instrumentation.txt +++ b/bochs/instrument/instrumentation.txt @@ -113,7 +113,7 @@ The callback is called each time, when Bochs simulator executes an interrupt (software interrupt, hardware interrupt or an exception). - void bx_instr_exception(unsigned cpu, unsigned vector); + void bx_instr_exception(unsigned cpu, unsigned vector, unsigned error_code); The callback is called each time, when Bochs simulator executes an exception. diff --git a/bochs/instrument/stubs/instrument.cc b/bochs/instrument/stubs/instrument.cc index 4c5575a14..01c887778 100644 --- a/bochs/instrument/stubs/instrument.cc +++ b/bochs/instrument/stubs/instrument.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: instrument.cc,v 1.30 2008-12-29 18:02:01 sshwarts Exp $ +// $Id: instrument.cc,v 1.31 2009-01-20 19:34:16 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -52,7 +52,7 @@ void bx_instr_far_branch(unsigned cpu, unsigned what, Bit16u new_cs, bx_address void bx_instr_opcode(unsigned cpu, const Bit8u *opcode, unsigned len, bx_bool is32, bx_bool is64) {} void bx_instr_interrupt(unsigned cpu, unsigned vector) {} -void bx_instr_exception(unsigned cpu, unsigned vector) {} +void bx_instr_exception(unsigned cpu, unsigned vector, unsigned error_code) {} void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip) {} void bx_instr_tlb_cntrl(unsigned cpu, unsigned what, bx_phy_address new_cr3) {} diff --git a/bochs/instrument/stubs/instrument.h b/bochs/instrument/stubs/instrument.h index 077bbfe0b..8745bd026 100644 --- a/bochs/instrument/stubs/instrument.h +++ b/bochs/instrument/stubs/instrument.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: instrument.h,v 1.38 2008-12-29 18:02:01 sshwarts Exp $ +// $Id: instrument.h,v 1.39 2009-01-20 19:34:16 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -81,7 +81,7 @@ void bx_instr_far_branch(unsigned cpu, unsigned what, Bit16u new_cs, bx_address void bx_instr_opcode(unsigned cpu, const Bit8u *opcode, unsigned len, bx_bool is32, bx_bool is64); void bx_instr_interrupt(unsigned cpu, unsigned vector); -void bx_instr_exception(unsigned cpu, unsigned vector); +void bx_instr_exception(unsigned cpu, unsigned vector, unsigned error_code); void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip); void bx_instr_tlb_cntrl(unsigned cpu, unsigned what, bx_phy_address new_cr3); @@ -105,132 +105,134 @@ void bx_instr_phy_read(unsigned cpu, bx_address addr, unsigned len); void bx_instr_wrmsr(unsigned cpu, unsigned addr, Bit64u value); /* initialization/deinitialization of instrumentalization*/ -# define BX_INSTR_INIT_ENV() bx_instr_init_env() -# define BX_INSTR_EXIT_ENV() bx_instr_exit_env() +#define BX_INSTR_INIT_ENV() bx_instr_init_env() +#define BX_INSTR_EXIT_ENV() bx_instr_exit_env() /* simulation init, shutdown, reset */ -# define BX_INSTR_INITIALIZE(cpu_id) bx_instr_initialize(cpu_id) -# define BX_INSTR_EXIT(cpu_id) bx_instr_exit(cpu_id) -# define BX_INSTR_RESET(cpu_id, type) bx_instr_reset(cpu_id, type) -# define BX_INSTR_HLT(cpu_id) bx_instr_hlt(cpu_id) +#define BX_INSTR_INITIALIZE(cpu_id) bx_instr_initialize(cpu_id) +#define BX_INSTR_EXIT(cpu_id) bx_instr_exit(cpu_id) +#define BX_INSTR_RESET(cpu_id, type) bx_instr_reset(cpu_id, type) +#define BX_INSTR_HLT(cpu_id) bx_instr_hlt(cpu_id) -# define BX_INSTR_MWAIT(cpu_id, addr, len, flags) \ +#define BX_INSTR_MWAIT(cpu_id, addr, len, flags) \ bx_instr_mwait(cpu_id, addr, len, flags) -# define BX_INSTR_NEW_INSTRUCTION(cpu_id) bx_instr_new_instruction(cpu_id) +#define BX_INSTR_NEW_INSTRUCTION(cpu_id) bx_instr_new_instruction(cpu_id) /* called from command line debugger */ -# define BX_INSTR_DEBUG_PROMPT() bx_instr_debug_promt() -# define BX_INSTR_START() bx_instr_start() -# define BX_INSTR_STOP() bx_instr_stop() -# define BX_INSTR_PRINT() bx_instr_print() +#define BX_INSTR_DEBUG_PROMPT() bx_instr_debug_promt() +#define BX_INSTR_START() bx_instr_start() +#define BX_INSTR_STOP() bx_instr_stop() +#define BX_INSTR_PRINT() bx_instr_print() /* branch resoultion */ -# define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) bx_instr_cnear_branch_taken(cpu_id, new_eip) -# define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) bx_instr_cnear_branch_not_taken(cpu_id) -# define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) bx_instr_ucnear_branch(cpu_id, what, new_eip) -# define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) bx_instr_far_branch(cpu_id, what, new_cs, new_eip) +#define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) bx_instr_cnear_branch_taken(cpu_id, new_eip) +#define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) bx_instr_cnear_branch_not_taken(cpu_id) +#define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) bx_instr_ucnear_branch(cpu_id, what, new_eip) +#define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) bx_instr_far_branch(cpu_id, what, new_cs, new_eip) /* decoding completed */ -# define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) \ +#define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) \ bx_instr_opcode(cpu_id, opcode, len, is32, is64) /* exceptional case and interrupt */ -# define BX_INSTR_EXCEPTION(cpu_id, vector) bx_instr_exception(cpu_id, vector) -# define BX_INSTR_INTERRUPT(cpu_id, vector) bx_instr_interrupt(cpu_id, vector) -# define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) bx_instr_hwinterrupt(cpu_id, vector, cs, eip) +#define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) \ + bx_instr_exception(cpu_id, vector, error_code) + +#define BX_INSTR_INTERRUPT(cpu_id, vector) bx_instr_interrupt(cpu_id, vector) +#define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) bx_instr_hwinterrupt(cpu_id, vector, cs, eip) /* TLB/CACHE control instruction executed */ -# define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) bx_instr_clflush(cpu_id, laddr, paddr) -# define BX_INSTR_CACHE_CNTRL(cpu_id, what) bx_instr_cache_cntrl(cpu_id, what) -# define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) bx_instr_tlb_cntrl(cpu_id, what, new_cr3) -# define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) \ +#define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) bx_instr_clflush(cpu_id, laddr, paddr) +#define BX_INSTR_CACHE_CNTRL(cpu_id, what) bx_instr_cache_cntrl(cpu_id, what) +#define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) bx_instr_tlb_cntrl(cpu_id, what, new_cr3) +#define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) \ bx_instr_prefetch_hint(cpu_id, what, seg, offset) /* execution */ -# define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) bx_instr_before_execution(cpu_id, i) -# define BX_INSTR_AFTER_EXECUTION(cpu_id, i) bx_instr_after_execution(cpu_id, i) -# define BX_INSTR_REPEAT_ITERATION(cpu_id, i) bx_instr_repeat_iteration(cpu_id, i) +#define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) bx_instr_before_execution(cpu_id, i) +#define BX_INSTR_AFTER_EXECUTION(cpu_id, i) bx_instr_after_execution(cpu_id, i) +#define BX_INSTR_REPEAT_ITERATION(cpu_id, i) bx_instr_repeat_iteration(cpu_id, i) /* memory access */ -# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) bx_instr_lin_access(cpu_id, lin, phy, len, rw) +#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) bx_instr_lin_access(cpu_id, lin, phy, len, rw) /* memory access */ -# define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) bx_instr_mem_data_access(cpu_id, seg, offset, len, rw) +#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) bx_instr_mem_data_access(cpu_id, seg, offset, len, rw) /* called from memory object */ -# define BX_INSTR_PHY_WRITE(cpu_id, addr, len) bx_instr_phy_write(cpu_id, addr, len) -# define BX_INSTR_PHY_READ(cpu_id, addr, len) bx_instr_phy_read(cpu_id, addr, len) +#define BX_INSTR_PHY_WRITE(cpu_id, addr, len) bx_instr_phy_write(cpu_id, addr, len) +#define BX_INSTR_PHY_READ(cpu_id, addr, len) bx_instr_phy_read(cpu_id, addr, len) /* feedback from device units */ -# define BX_INSTR_INP(addr, len) bx_instr_inp(addr, len) -# define BX_INSTR_INP2(addr, len, val) bx_instr_inp2(addr, len, val) -# define BX_INSTR_OUTP(addr, len, val) bx_instr_outp(addr, len, val) +#define BX_INSTR_INP(addr, len) bx_instr_inp(addr, len) +#define BX_INSTR_INP2(addr, len, val) bx_instr_inp2(addr, len, val) +#define BX_INSTR_OUTP(addr, len, val) bx_instr_outp(addr, len, val) /* wrmsr callback */ -# define BX_INSTR_WRMSR(cpu_id, addr, value) bx_instr_wrmsr(cpu_id, addr, value) +#define BX_INSTR_WRMSR(cpu_id, addr, value) bx_instr_wrmsr(cpu_id, addr, value) #else -/* initialization/deinitialization of instrumentalization*/ -# define BX_INSTR_INIT_ENV() -# define BX_INSTR_EXIT_ENV() +/* initialization/deinitialization of instrumentalization */ +#define BX_INSTR_INIT_ENV() +#define BX_INSTR_EXIT_ENV() /* simulation init, shutdown, reset */ -# define BX_INSTR_INITIALIZE(cpu_id) -# define BX_INSTR_EXIT(cpu_id) -# define BX_INSTR_RESET(cpu_id, type) -# define BX_INSTR_HLT(cpu_id) -# define BX_INSTR_MWAIT(cpu_id, addr, len, flags) -# define BX_INSTR_NEW_INSTRUCTION(cpu_id) +#define BX_INSTR_INITIALIZE(cpu_id) +#define BX_INSTR_EXIT(cpu_id) +#define BX_INSTR_RESET(cpu_id, type) +#define BX_INSTR_HLT(cpu_id) +#define BX_INSTR_MWAIT(cpu_id, addr, len, flags) +#define BX_INSTR_NEW_INSTRUCTION(cpu_id) /* called from command line debugger */ -# define BX_INSTR_DEBUG_PROMPT() -# define BX_INSTR_START() -# define BX_INSTR_STOP() -# define BX_INSTR_PRINT() +#define BX_INSTR_DEBUG_PROMPT() +#define BX_INSTR_START() +#define BX_INSTR_STOP() +#define BX_INSTR_PRINT() /* branch resoultion */ -# define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) -# define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) -# define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) -# define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) +#define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, new_eip) +#define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id) +#define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, new_eip) +#define BX_INSTR_FAR_BRANCH(cpu_id, what, new_cs, new_eip) /* decoding completed */ -# define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) +#define BX_INSTR_OPCODE(cpu_id, opcode, len, is32, is64) /* exceptional case and interrupt */ -# define BX_INSTR_EXCEPTION(cpu_id, vector) -# define BX_INSTR_INTERRUPT(cpu_id, vector) -# define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) +#define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) +#define BX_INSTR_INTERRUPT(cpu_id, vector) +#define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) /* TLB/CACHE control instruction executed */ -# define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) -# define BX_INSTR_CACHE_CNTRL(cpu_id, what) -# define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) -# define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) +#define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) +#define BX_INSTR_CACHE_CNTRL(cpu_id, what) +#define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) +#define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) /* execution */ -# define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) -# define BX_INSTR_AFTER_EXECUTION(cpu_id, i) -# define BX_INSTR_REPEAT_ITERATION(cpu_id, i) +#define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) +#define BX_INSTR_AFTER_EXECUTION(cpu_id, i) +#define BX_INSTR_REPEAT_ITERATION(cpu_id, i) /* memory access */ -# define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) +#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) /* memory access */ -# define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) +#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) /* called from memory object */ -# define BX_INSTR_PHY_WRITE(cpu_id, addr, len) -# define BX_INSTR_PHY_READ(cpu_id, addr, len) +#define BX_INSTR_PHY_WRITE(cpu_id, addr, len) +#define BX_INSTR_PHY_READ(cpu_id, addr, len) /* feedback from device units */ -# define BX_INSTR_INP(addr, len) -# define BX_INSTR_INP2(addr, len, val) -# define BX_INSTR_OUTP(addr, len, val) +#define BX_INSTR_INP(addr, len) +#define BX_INSTR_INP2(addr, len, val) +#define BX_INSTR_OUTP(addr, len, val) /* wrmsr callback */ -# define BX_INSTR_WRMSR(cpu_id, addr, value) +#define BX_INSTR_WRMSR(cpu_id, addr, value) #endif