Added Corei7 ivyBridge configuration to CPUDB
This commit is contained in:
parent
55e21bedcb
commit
708fc666c8
@ -121,6 +121,7 @@ romimage: file=$BXSHARE/BIOS-bochs-latest
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# corei5_lynnfield_750 Intel(R) Core(TM) i5 750 (Lynnfield)
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# corei5_arrandale_m520 Intel(R) Core(TM) i5 M 520 (Arrandale)
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# corei7_sandy_bridge_2600k Intel(R) Core(TM) i7-2600K (Sandy Bridge)
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# corei7_ivy_bridge_3770k Intel(R) Core(TM) i7-3770K CPU (Ivy Bridge)
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#
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# COUNT:
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# Set the number of processors:cores per processor:threads per core
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@ -13,6 +13,7 @@ Changes after 2.5.1 release:
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! Added Corei5 750 (Lynnfield) configuration to the CPUDB
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! Added Turion64 (Tyler) configuration to the CPUDB
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! Added AMD Phenom X3 8650 (Toliman) configuration to the CPUDB
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! Added Corei7 3770K (Ivy Bridge) configuration to the CPUDB
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- Bugfixes for CPU emulation correctness and stability
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- Bochs Debugger and Instrumentation
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@ -50,6 +50,7 @@ CPUDB_OBJS = pentium_mmx.o \
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corei5_lynnfield_750.o \
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corei5_arrandale_m520.o \
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corei7_sandy_bridge_2600K.o \
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corei7_ivy_bridge_3770K.o \
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atom_n270.o
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BX_INCLUDES = ../../bochs.h ../../config.h
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@ -151,6 +152,15 @@ corei7_sandy_bridge_2600K.o: corei7_sandy_bridge_2600K.@CPP_SUFFIX@ ../../bochs.
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../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
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../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
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../../param_names.h corei7_sandy_bridge_2600K.h ../../cpu/cpuid.h
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corei7_ivy_bridge_3770K.o: corei7_ivy_bridge_3770K.@CPP_SUFFIX@ ../../bochs.h \
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../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
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../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
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../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
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../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
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../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
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../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
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../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
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../../param_names.h corei7_ivy_bridge_3770K.h ../../cpu/cpuid.h
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corei5_arrandale_m520.o: corei5_arrandale_m520.@CPP_SUFFIX@ ../../bochs.h \
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../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
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../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
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@ -76,7 +76,7 @@ void atom_n270_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_func
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get_std_cpuid_leaf_2(leaf);
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return;
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case 0x00000003:
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get_std_cpuid_leaf_3(leaf);
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get_reserved_leaf(leaf);
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return;
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case 0x00000004:
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get_std_cpuid_leaf_4(subfunction, leaf);
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@ -310,15 +310,7 @@ void atom_n270_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) const
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leaf->edx = 0x00000000;
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}
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// leaf 0x00000003 //
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void atom_n270_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf) const
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{
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// CPUID function 0x00000003 - Processor Serial Number
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leaf->eax = 0;
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leaf->ebx = 0;
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leaf->ecx = 0;
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leaf->edx = 0;
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}
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// leaf 0x00000003 - Processor Serial Number (not supported) //
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// leaf 0x00000004 //
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void atom_n270_t::get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const
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@ -47,7 +47,6 @@ private:
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void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_3(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_5(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_6(cpuid_function_t *leaf) const;
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@ -79,7 +79,7 @@ void core2_penryn_t9600_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, c
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get_std_cpuid_leaf_2(leaf);
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return;
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case 0x00000003:
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get_std_cpuid_leaf_3(leaf);
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get_reserved_leaf(leaf);
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return;
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case 0x00000004:
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get_std_cpuid_leaf_4(subfunction, leaf);
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@ -361,15 +361,7 @@ void core2_penryn_t9600_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) const
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leaf->edx = 0x2CB4304E;
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}
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// leaf 0x00000003 //
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void core2_penryn_t9600_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf) const
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{
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// CPUID function 0x00000003 - Processor Serial Number
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leaf->eax = 0;
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leaf->ebx = 0;
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leaf->ecx = 0;
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leaf->edx = 0;
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}
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// leaf 0x00000003 - Processor Serial Number (not supported) //
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// leaf 0x00000004 //
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void core2_penryn_t9600_t::get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const
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@ -50,7 +50,6 @@ private:
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void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_3(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_5(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_6(cpuid_function_t *leaf) const;
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@ -76,7 +76,7 @@ void core_duo_t2400_yonah_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction,
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get_std_cpuid_leaf_2(leaf);
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return;
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case 0x00000003:
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get_std_cpuid_leaf_3(leaf);
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get_reserved_leaf(leaf);
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return;
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case 0x00000004:
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get_std_cpuid_leaf_4(subfunction, leaf);
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@ -310,15 +310,7 @@ void core_duo_t2400_yonah_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) const
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leaf->edx = 0x2C04307D;
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}
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// leaf 0x00000003 //
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void core_duo_t2400_yonah_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf) const
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{
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// CPUID function 0x00000003 - Processor Serial Number
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leaf->eax = 0;
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leaf->ebx = 0;
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leaf->ecx = 0;
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leaf->edx = 0;
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}
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// leaf 0x00000003 - Processor Serial Number (not supported) //
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// leaf 0x00000004 //
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void core_duo_t2400_yonah_t::get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const
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@ -50,7 +50,6 @@ private:
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void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_3(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_5(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_6(cpuid_function_t *leaf) const;
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@ -82,7 +82,7 @@ void corei5_arrandale_m520_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction
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get_std_cpuid_leaf_2(leaf);
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return;
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case 0x00000003:
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get_std_cpuid_leaf_3(leaf);
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get_reserved_leaf(leaf);
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return;
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case 0x00000004:
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get_std_cpuid_leaf_4(subfunction, leaf);
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@ -379,15 +379,7 @@ void corei5_arrandale_m520_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) const
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leaf->edx = 0x09CA212C;
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}
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// leaf 0x00000003 //
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void corei5_arrandale_m520_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf) const
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{
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// CPUID function 0x00000003 - Processor Serial Number
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leaf->eax = 0;
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leaf->ebx = 0;
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leaf->ecx = 0;
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leaf->edx = 0;
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}
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// leaf 0x00000003 - Processor Serial Number (not supported) //
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// leaf 0x00000004 //
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void corei5_arrandale_m520_t::get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const
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@ -50,7 +50,6 @@ private:
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void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_3(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_5(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_6(cpuid_function_t *leaf) const;
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@ -82,7 +82,7 @@ void corei5_lynnfield_750_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction,
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get_std_cpuid_leaf_2(leaf);
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return;
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case 0x00000003:
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get_std_cpuid_leaf_3(leaf);
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get_reserved_leaf(leaf);
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return;
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case 0x00000004:
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get_std_cpuid_leaf_4(subfunction, leaf);
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@ -355,15 +355,7 @@ void corei5_lynnfield_750_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) const
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leaf->edx = 0x09ca212c;
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}
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// leaf 0x00000003 //
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void corei5_lynnfield_750_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf) const
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{
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// CPUID function 0x00000003 - Processor Serial Number
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leaf->eax = 0;
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leaf->ebx = 0;
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leaf->ecx = 0;
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leaf->edx = 0;
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}
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// leaf 0x00000003 - Processor Serial Number (not supported) //
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// leaf 0x00000004 //
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void corei5_lynnfield_750_t::get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const
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@ -50,7 +50,6 @@ private:
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void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_3(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_5(cpuid_function_t *leaf) const;
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void get_std_cpuid_leaf_6(cpuid_function_t *leaf) const;
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840
bochs/cpu/cpudb/corei7_ivy_bridge_3770K.cc
Executable file
840
bochs/cpu/cpudb/corei7_ivy_bridge_3770K.cc
Executable file
@ -0,0 +1,840 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2012 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#include "bochs.h"
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#include "cpu.h"
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#include "param_names.h"
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#include "corei7_ivy_bridge_3770k.h"
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#define LOG_THIS cpu->
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#if BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
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corei7_ivy_bridge_3770k_t::corei7_ivy_bridge_3770k_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
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{
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if (! BX_SUPPORT_X86_64)
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BX_PANIC(("You must enable x86-64 for Intel Core i7 Ivy Bridge configuration"));
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if (! BX_SUPPORT_AVX)
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BX_PANIC(("You must enable AVX for Intel Core i7 Ivy Bridge configuration"));
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if (BX_SUPPORT_VMX == 1)
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BX_INFO(("You must compile with --enable-vmx=2 for Intel Core i7 Ivy Bridge VMX configuration"));
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if (! BX_SUPPORT_MONITOR_MWAIT)
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BX_INFO(("WARNING: MONITOR/MWAIT support is not compiled in !"));
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BX_INFO(("WARNING: RDRAND is not implemented yet !"));
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}
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void corei7_ivy_bridge_3770k_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const
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{
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static bx_bool cpuid_limit_winnt = SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get();
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if (cpuid_limit_winnt)
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if (function > 2 && function < 0x80000000) function = 2;
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switch(function) {
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case 0x80000000:
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get_ext_cpuid_leaf_0(leaf);
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return;
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case 0x80000001:
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get_ext_cpuid_leaf_1(leaf);
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return;
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case 0x80000002:
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case 0x80000003:
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case 0x80000004:
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get_ext_cpuid_brand_string_leaf(function, leaf);
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return;
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case 0x80000005:
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get_ext_cpuid_leaf_5(leaf);
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return;
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case 0x80000006:
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get_ext_cpuid_leaf_6(leaf);
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return;
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case 0x80000007:
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get_ext_cpuid_leaf_7(leaf);
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return;
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case 0x80000008:
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get_ext_cpuid_leaf_8(leaf);
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return;
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case 0x00000000:
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get_std_cpuid_leaf_0(leaf);
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return;
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case 0x00000001:
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get_std_cpuid_leaf_1(leaf);
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return;
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case 0x00000002:
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get_std_cpuid_leaf_2(leaf);
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return;
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case 0x00000003:
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get_reserved_leaf(leaf);
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return;
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case 0x00000004:
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get_std_cpuid_leaf_4(subfunction, leaf);
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return;
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case 0x00000005:
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get_std_cpuid_leaf_5(leaf);
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return;
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case 0x00000006:
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get_std_cpuid_leaf_6(leaf);
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return;
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case 0x00000007:
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get_std_cpuid_leaf_7(subfunction, leaf);
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return;
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case 0x00000008:
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case 0x00000009:
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get_reserved_leaf(leaf);
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return;
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case 0x0000000A:
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get_std_cpuid_leaf_A(leaf);
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return;
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case 0x0000000B:
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get_std_cpuid_extended_topology_leaf(subfunction, leaf);
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return;
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case 0x0000000C:
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get_reserved_leaf(leaf);
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return;
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case 0x0000000D:
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default:
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get_std_cpuid_xsave_leaf(subfunction, leaf);
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return;
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}
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}
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Bit64u corei7_ivy_bridge_3770k_t::get_isa_extensions_bitmask(void) const
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{
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return BX_ISA_X87 |
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BX_ISA_486 |
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BX_ISA_PENTIUM |
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BX_ISA_P6 |
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BX_ISA_MMX |
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BX_ISA_SYSENTER_SYSEXIT |
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BX_ISA_CLFLUSH |
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BX_ISA_SSE |
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BX_ISA_SSE2 |
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BX_ISA_SSE3 |
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BX_ISA_SSSE3 |
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BX_ISA_SSE4_1 |
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BX_ISA_SSE4_2 |
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BX_ISA_POPCNT |
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#if BX_SUPPORT_MONITOR_MWAIT
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BX_ISA_MONITOR_MWAIT |
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#endif
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#if BX_SUPPORT_VMX >= 2
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BX_ISA_VMX |
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#endif
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/* BX_ISA_SMX | */
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BX_ISA_RDTSCP |
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BX_ISA_XSAVE |
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BX_ISA_XSAVEOPT |
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BX_ISA_AES_PCLMULQDQ |
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BX_ISA_FSGSBASE |
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BX_ISA_AVX |
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BX_ISA_AVX_F16C |
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BX_ISA_CMPXCHG16B |
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BX_ISA_LM_LAHF_SAHF;
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}
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Bit32u corei7_ivy_bridge_3770k_t::get_cpu_extensions_bitmask(void) const
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{
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return BX_CPU_DEBUG_EXTENSIONS |
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BX_CPU_VME |
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BX_CPU_PSE |
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BX_CPU_PAE |
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||||
BX_CPU_PGE |
|
||||
BX_CPU_PSE36 |
|
||||
BX_CPU_MTRR |
|
||||
BX_CPU_PAT |
|
||||
BX_CPU_XAPIC |
|
||||
/* BX_CPU_X2APIC | */
|
||||
BX_CPU_LONG_MODE |
|
||||
BX_CPU_NX |
|
||||
BX_CPU_PCID |
|
||||
BX_CPU_SMEP |
|
||||
BX_CPU_TSC_DEADLINE;
|
||||
}
|
||||
|
||||
#if BX_SUPPORT_VMX >= 2
|
||||
|
||||
//
|
||||
// MSR 00000480 : 00DA0400 00000010 BX_MSR_VMX_BASIC
|
||||
// MSR 00000481 : 0000007F 00000016 BX_MSR_VMX_PINBASED_CTRLS
|
||||
// MSR 00000482 : FFF9FFFE 0401E172 BX_MSR_VMX_PROCBASED_CTRLS
|
||||
// MSR 00000483 : 007FFFFF 00036DFF BX_MSR_VMX_VMEXIT_CTRLS
|
||||
// MSR 00000484 : 0000FFFF 000011FF BX_MSR_VMX_VMENTRY_CTRLS
|
||||
// MSR 00000485 : 00000000 100401E5 BX_MSR_VMX_MISC
|
||||
// MSR 00000486 : 00000000 80000021 BX_MSR_VMX_CR0_FIXED0
|
||||
// MSR 00000487 : 00000000 FFFFFFFF BX_MSR_VMX_CR0_FIXED1
|
||||
// MSR 00000488 : 00000000 00002000 BX_MSR_VMX_CR4_FIXED0
|
||||
// MSR 00000489 : 00000000 001727FF BX_MSR_VMX_CR4_FIXED1
|
||||
// MSR 0000048A : 00000000 0000002A BX_MSR_VMX_VMCS_ENUM
|
||||
// MSR 0000048B : 000000FF 00000000 BX_MSR_VMX_PROCBASED_CTRLS2
|
||||
// MSR 0000048C : 00000F01 06114141 BX_MSR_VMX_MSR_VMX_EPT_VPID_CAP
|
||||
// MSR 0000048D : 0000007F 00000016 BX_MSR_VMX_TRUE_PINBASED_CTRLS
|
||||
// MSR 0000048E : FFF9FFFE 04006172 BX_MSR_VMX_TRUE_PROCBASED_CTRLS
|
||||
// MSR 0000048F : 007FFFFF 00036DFB BX_MSR_VMX_TRUE_VMEXIT_CTRLS
|
||||
// MSR 00000490 : 0000FFFF 000011FB BX_MSR_VMX_TRUE_VMENTRY_CTRLS
|
||||
//
|
||||
|
||||
Bit32u corei7_ivy_bridge_3770k_t::get_vmx_extensions_bitmask(void) const
|
||||
{
|
||||
return BX_VMX_TPR_SHADOW |
|
||||
BX_VMX_VIRTUAL_NMI |
|
||||
BX_VMX_APIC_VIRTUALIZATION |
|
||||
BX_VMX_WBINVD_VMEXIT |
|
||||
/* BX_VMX_MONITOR_TRAP_FLAG | */ // not implemented yet
|
||||
BX_VMX_VPID |
|
||||
BX_VMX_EPT |
|
||||
BX_VMX_UNRESTRICTED_GUEST |
|
||||
BX_VMX_SAVE_DEBUGCTL_DISABLE |
|
||||
BX_VMX_PERF_GLOBAL_CTRL | // MSR not implemented yet
|
||||
BX_VMX_PAT |
|
||||
BX_VMX_EFER |
|
||||
BX_VMX_DESCRIPTOR_TABLE_EXIT |
|
||||
BX_VMX_X2APIC_VIRTUALIZATION |
|
||||
BX_VMX_PREEMPTION_TIMER;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
// leaf 0x00000000 //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf) const
|
||||
{
|
||||
static const char* vendor_string = "GenuineIntel";
|
||||
|
||||
// EAX: highest std function understood by CPUID
|
||||
// EBX: vendor ID string
|
||||
// EDX: vendor ID string
|
||||
// ECX: vendor ID string
|
||||
static bx_bool cpuid_limit_winnt = SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get();
|
||||
if (cpuid_limit_winnt)
|
||||
leaf->eax = 0x2;
|
||||
else
|
||||
leaf->eax = 0xD;
|
||||
|
||||
// CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...)
|
||||
memcpy(&(leaf->ebx), vendor_string, 4);
|
||||
memcpy(&(leaf->edx), vendor_string + 4, 4);
|
||||
memcpy(&(leaf->ecx), vendor_string + 8, 4);
|
||||
#ifdef BX_BIG_ENDIAN
|
||||
leaf->ebx = bx_bswap32(leaf->ebx);
|
||||
leaf->ecx = bx_bswap32(leaf->ecx);
|
||||
leaf->edx = bx_bswap32(leaf->edx);
|
||||
#endif
|
||||
}
|
||||
|
||||
// leaf 0x00000001 //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
|
||||
{
|
||||
// EAX: CPU Version Information
|
||||
// [3:0] Stepping ID
|
||||
// [7:4] Model: starts at 1
|
||||
// [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
|
||||
// [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
|
||||
// [19:16] Extended Model
|
||||
// [27:20] Extended Family
|
||||
leaf->eax = 0x000306a9;
|
||||
|
||||
// EBX:
|
||||
// [7:0] Brand ID
|
||||
// [15:8] CLFLUSH cache line size (value*8 = cache line size in bytes)
|
||||
// [23:16] Number of logical processors in one physical processor
|
||||
// [31:24] Local Apic ID
|
||||
|
||||
unsigned n_logical_processors = ncores*nthreads;
|
||||
leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
|
||||
(n_logical_processors << 16);
|
||||
#if BX_SUPPORT_APIC
|
||||
leaf->ebx |= ((cpu->get_apic_id() & 0xff) << 24);
|
||||
#endif
|
||||
|
||||
// ECX: Extended Feature Flags
|
||||
// * [0:0] SSE3: SSE3 Instructions
|
||||
// * [1:1] PCLMULQDQ Instruction support
|
||||
// * [2:2] DTES64: 64-bit DS area
|
||||
// * [3:3] MONITOR/MWAIT support
|
||||
// * [4:4] DS-CPL: CPL qualified debug store
|
||||
// * [5:5] VMX: Virtual Machine Technology
|
||||
// [6:6] SMX: Secure Virtual Machine Technology
|
||||
// * [7:7] EST: Enhanced Intel SpeedStep Technology
|
||||
// * [8:8] TM2: Thermal Monitor 2
|
||||
// * [9:9] SSSE3: SSSE3 Instructions
|
||||
// [10:10] CNXT-ID: L1 context ID
|
||||
// [11:11] reserved
|
||||
// [12:12] FMA Instructions support
|
||||
// * [13:13] CMPXCHG16B: CMPXCHG16B instruction support
|
||||
// * [14:14] xTPR update control
|
||||
// * [15:15] PDCM - Perfon and Debug Capability MSR
|
||||
// [16:16] reserved
|
||||
// * [17:17] PCID: Process Context Identifiers
|
||||
// [18:18] DCA - Direct Cache Access
|
||||
// * [19:19] SSE4.1 Instructions
|
||||
// * [20:20] SSE4.2 Instructions
|
||||
// [21:21] X2APIC
|
||||
// [22:22] MOVBE instruction
|
||||
// * [23:23] POPCNT instruction
|
||||
// * [24:24] TSC Deadline
|
||||
// * [25:25] AES Instructions
|
||||
// * [26:26] XSAVE extensions support
|
||||
// * [27:27] OSXSAVE support
|
||||
// * [28:28] AVX extensions support
|
||||
// * [29:29] AVX F16C - Float16 conversion support
|
||||
// * [30:30] RDRAND instruction
|
||||
// [31:31] reserved
|
||||
leaf->ecx = BX_CPUID_EXT_SSE3 |
|
||||
BX_CPUID_EXT_PCLMULQDQ |
|
||||
BX_CPUID_EXT_DTES64 |
|
||||
#if BX_SUPPORT_MONITOR_MWAIT
|
||||
BX_CPUID_EXT_MONITOR_MWAIT |
|
||||
#endif
|
||||
BX_CPUID_EXT_DS_CPL |
|
||||
#if BX_SUPPORT_VMX >= 2
|
||||
BX_CPUID_EXT_VMX |
|
||||
#endif
|
||||
/* BX_CPUID_EXT_SMX | */
|
||||
BX_CPUID_EXT_EST |
|
||||
BX_CPUID_EXT_THERMAL_MONITOR2 |
|
||||
BX_CPUID_EXT_SSSE3 |
|
||||
BX_CPUID_EXT_CMPXCHG16B |
|
||||
BX_CPUID_EXT_xTPR |
|
||||
BX_CPUID_EXT_PDCM |
|
||||
BX_CPUID_EXT_PCID |
|
||||
BX_CPUID_EXT_SSE4_1 |
|
||||
BX_CPUID_EXT_SSE4_2 |
|
||||
/* BX_CPUID_EXT_X2APIC | */
|
||||
BX_CPUID_EXT_POPCNT |
|
||||
BX_CPUID_EXT_TSC_DEADLINE |
|
||||
BX_CPUID_EXT_AES |
|
||||
BX_CPUID_EXT_XSAVE |
|
||||
BX_CPUID_EXT_AVX |
|
||||
BX_CPUID_EXT_AVX_F16C;
|
||||
// BX_CPUID_EXT_RDRAND not implemented yet
|
||||
if (cpu->cr4.get_OSXSAVE())
|
||||
leaf->ecx |= BX_CPUID_EXT_OSXSAVE;
|
||||
|
||||
// EDX: Standard Feature Flags
|
||||
// * [0:0] FPU on chip
|
||||
// * [1:1] VME: Virtual-8086 Mode enhancements
|
||||
// * [2:2] DE: Debug Extensions (I/O breakpoints)
|
||||
// * [3:3] PSE: Page Size Extensions
|
||||
// * [4:4] TSC: Time Stamp Counter
|
||||
// * [5:5] MSR: RDMSR and WRMSR support
|
||||
// * [6:6] PAE: Physical Address Extensions
|
||||
// * [7:7] MCE: Machine Check Exception
|
||||
// * [8:8] CXS: CMPXCHG8B instruction
|
||||
// * [9:9] APIC: APIC on Chip
|
||||
// [10:10] Reserved
|
||||
// * [11:11] SYSENTER/SYSEXIT support
|
||||
// * [12:12] MTRR: Memory Type Range Reg
|
||||
// * [13:13] PGE/PTE Global Bit
|
||||
// * [14:14] MCA: Machine Check Architecture
|
||||
// * [15:15] CMOV: Cond Mov/Cmp Instructions
|
||||
// * [16:16] PAT: Page Attribute Table
|
||||
// * [17:17] PSE-36: Physical Address Extensions
|
||||
// [18:18] PSN: Processor Serial Number
|
||||
// * [19:19] CLFLUSH: CLFLUSH Instruction support
|
||||
// [20:20] Reserved
|
||||
// * [21:21] DS: Debug Store
|
||||
// * [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities
|
||||
// * [23:23] MMX Technology
|
||||
// * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
|
||||
// * [25:25] SSE: SSE Extensions
|
||||
// * [26:26] SSE2: SSE2 Extensions
|
||||
// * [27:27] Self Snoop
|
||||
// * [28:28] Hyper Threading Technology
|
||||
// * [29:29] TM: Thermal Monitor
|
||||
// [30:30] Reserved
|
||||
// * [31:31] PBE: Pending Break Enable
|
||||
leaf->edx = BX_CPUID_STD_X87 |
|
||||
BX_CPUID_STD_VME |
|
||||
BX_CPUID_STD_DEBUG_EXTENSIONS |
|
||||
BX_CPUID_STD_PSE |
|
||||
BX_CPUID_STD_TSC |
|
||||
BX_CPUID_STD_MSR |
|
||||
BX_CPUID_STD_PAE |
|
||||
BX_CPUID_STD_MCE |
|
||||
BX_CPUID_STD_CMPXCHG8B |
|
||||
BX_CPUID_STD_SYSENTER_SYSEXIT |
|
||||
BX_CPUID_STD_MTRR |
|
||||
BX_CPUID_STD_GLOBAL_PAGES |
|
||||
BX_CPUID_STD_MCA |
|
||||
BX_CPUID_STD_CMOV |
|
||||
BX_CPUID_STD_PAT |
|
||||
BX_CPUID_STD_PSE36 |
|
||||
BX_CPUID_STD_CLFLUSH |
|
||||
BX_CPUID_STD_DEBUG_STORE |
|
||||
BX_CPUID_STD_ACPI |
|
||||
BX_CPUID_STD_MMX |
|
||||
BX_CPUID_STD_FXSAVE_FXRSTOR |
|
||||
BX_CPUID_STD_SSE |
|
||||
BX_CPUID_STD_SSE2 |
|
||||
BX_CPUID_STD_SELF_SNOOP |
|
||||
BX_CPUID_STD_HT |
|
||||
BX_CPUID_STD_THERMAL_MONITOR |
|
||||
BX_CPUID_STD_PBE;
|
||||
#if BX_SUPPORT_APIC
|
||||
// if MSR_APICBASE APIC Global Enable bit has been cleared,
|
||||
// the CPUID feature flag for the APIC is set to 0.
|
||||
if (cpu->msr.apicbase & 0x800)
|
||||
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
|
||||
#endif
|
||||
}
|
||||
|
||||
// leaf 0x00000002 //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000002 - Cache and TLB Descriptors
|
||||
leaf->eax = 0x76035A01;
|
||||
leaf->ebx = 0x00F0B2FF;
|
||||
leaf->ecx = 0x00000000;
|
||||
leaf->edx = 0x00CA0000;
|
||||
}
|
||||
|
||||
// leaf 0x00000003 - Processor Serial Number (not supported) //
|
||||
|
||||
// leaf 0x00000004 //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000004 - Deterministic Cache Parameters
|
||||
|
||||
// EAX:
|
||||
// [04-00] - Cache Type Field
|
||||
// 0 = No more caches
|
||||
// 1 = Data Cache
|
||||
// 2 = Instruction Cache
|
||||
// 3 = Unified Cache
|
||||
// [07-05] - Cache Level (starts at 1)]
|
||||
// [08] - Self Initializing cache level (doesn't need software initialization)
|
||||
// [09] - Fully Associative cache
|
||||
// [13-10] - Reserved
|
||||
// [25-14] - Maximum number of addressable IDs for logical processors sharing this cache
|
||||
// [31-26] - Maximum number of addressable IDs for processor cores in the physical package - 1
|
||||
// EBX:
|
||||
// [11-00] - L = System Coherency Line Size
|
||||
// [21-12] - P = Physical Line partitions
|
||||
// [31-22] - W = Ways of associativity
|
||||
// ECX: Number of Sets
|
||||
// EDX:
|
||||
// [00] - Writeback invalidate
|
||||
// [01] - Cache Inclusiveness
|
||||
// [02] - Complex Cache Indexing
|
||||
// [31-03] - Reserved
|
||||
|
||||
switch(subfunction) {
|
||||
case 0:
|
||||
leaf->eax = 0x1C004121;
|
||||
leaf->ebx = 0x01C0003F;
|
||||
leaf->ecx = 0x0000003F;
|
||||
leaf->edx = 0x00000000;
|
||||
break;
|
||||
case 1:
|
||||
leaf->eax = 0x1C004122;
|
||||
leaf->ebx = 0x01C0003F;
|
||||
leaf->ecx = 0x0000003F;
|
||||
leaf->edx = 0x00000000;
|
||||
break;
|
||||
case 2:
|
||||
leaf->eax = 0x1C004143;
|
||||
leaf->ebx = 0x01C0003F;
|
||||
leaf->ecx = 0x000001FF;
|
||||
leaf->edx = 0x00000000;
|
||||
break;
|
||||
case 3:
|
||||
leaf->eax = 0x1C03C163;
|
||||
leaf->ebx = 0x03C0003F;
|
||||
leaf->ecx = 0x00001FFF;
|
||||
leaf->edx = 0x00000006;
|
||||
break;
|
||||
default:
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// leaf 0x00000005 //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_leaf_5(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000005 - MONITOR/MWAIT Leaf
|
||||
|
||||
#if BX_SUPPORT_MONITOR_MWAIT
|
||||
// EAX - Smallest monitor-line size in bytes
|
||||
// EBX - Largest monitor-line size in bytes
|
||||
// ECX -
|
||||
// [31:2] - reserved
|
||||
// [1:1] - exit MWAIT even with EFLAGS.IF = 0
|
||||
// [0:0] - MONITOR/MWAIT extensions are supported
|
||||
// EDX -
|
||||
// [03-00] - number of C0 sub C-states supported using MWAIT
|
||||
// [07-04] - number of C1 sub C-states supported using MWAIT
|
||||
// [11-08] - number of C2 sub C-states supported using MWAIT
|
||||
// [15-12] - number of C3 sub C-states supported using MWAIT
|
||||
// [19-16] - number of C4 sub C-states supported using MWAIT
|
||||
// [31-20] - reserved (MBZ)
|
||||
leaf->eax = CACHE_LINE_SIZE;
|
||||
leaf->ebx = CACHE_LINE_SIZE;
|
||||
leaf->ecx = 3;
|
||||
leaf->edx = 0x00001120;
|
||||
#else
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
// leaf 0x00000006 //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_leaf_6(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000006 - Thermal and Power Management Leaf
|
||||
leaf->eax = 0x00000077;
|
||||
leaf->ebx = 0x00000002;
|
||||
leaf->ecx = 0x00000009;
|
||||
leaf->edx = 0x00000000;
|
||||
}
|
||||
|
||||
// leaf 0x00000007 //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_leaf_7(Bit32u subfunction, cpuid_function_t *leaf) const
|
||||
{
|
||||
switch(subfunction) {
|
||||
case 0:
|
||||
leaf->eax = 0; /* report max sub-leaf that supported in leaf 7 */
|
||||
|
||||
// * [0:0] FS/GS BASE access instructions
|
||||
// [2:1] reserved
|
||||
// [3:3] BMI1: Advanced Bit Manipulation Extensions
|
||||
// [4:4] reserved
|
||||
// [5:5] AVX2
|
||||
// [6:6] reserved
|
||||
// * [7:7] SMEP: Supervisor Mode Execution Protection
|
||||
// [8:8] BMI2: Advanced Bit Manipulation Extensions
|
||||
// * [9:9] Support for Enhanced REP MOVSB/STOSB
|
||||
// [10:10] Support for INVPCID instruction
|
||||
// [31:10] reserved
|
||||
leaf->ebx = BX_CPUID_EXT3_FSGSBASE |
|
||||
BX_CPUID_EXT3_SMEP |
|
||||
BX_CPUID_EXT3_ENCHANCED_REP_STRINGS;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
break;
|
||||
default:
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
}
|
||||
}
|
||||
|
||||
// leaf 0x00000008 reserved //
|
||||
// leaf 0x00000009 direct cache access not supported //
|
||||
|
||||
// leaf 0x0000000A //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_leaf_A(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x0000000A - Architectural Performance Monitoring Leaf
|
||||
leaf->eax = 0x07300403;
|
||||
leaf->ebx = 0x00000000;
|
||||
leaf->ecx = 0x00000000;
|
||||
leaf->edx = 0x00000603;
|
||||
|
||||
BX_INFO(("WARNING: Architectural Performance Monitoring is not implemented"));
|
||||
}
|
||||
|
||||
BX_CPP_INLINE static Bit32u ilog2(Bit32u x)
|
||||
{
|
||||
Bit32u count = 0;
|
||||
while(x>>=1) count++;
|
||||
return count;
|
||||
}
|
||||
|
||||
// leaf 0x0000000B //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_extended_topology_leaf(Bit32u subfunction, cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x0000000B - Extended Topology Leaf
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = subfunction;
|
||||
leaf->edx = cpu->get_apic_id();
|
||||
|
||||
#if BX_SUPPORT_SMP
|
||||
switch(subfunction) {
|
||||
case 0:
|
||||
if (nthreads > 1) {
|
||||
leaf->eax = ilog2(nthreads-1)+1;
|
||||
leaf->ebx = nthreads;
|
||||
leaf->ecx |= (1<<8);
|
||||
}
|
||||
else if (ncores > 1) {
|
||||
leaf->eax = ilog2(ncores-1)+1;
|
||||
leaf->ebx = ncores;
|
||||
leaf->ecx |= (2<<8);
|
||||
}
|
||||
else if (nprocessors > 1) {
|
||||
leaf->eax = ilog2(nprocessors-1)+1;
|
||||
leaf->ebx = nprocessors;
|
||||
}
|
||||
else {
|
||||
leaf->eax = 1;
|
||||
leaf->ebx = 1; // number of logical CPUs at this level
|
||||
}
|
||||
break;
|
||||
|
||||
case 1:
|
||||
if (nthreads > 1) {
|
||||
if (ncores > 1) {
|
||||
leaf->eax = ilog2(ncores-1)+1;
|
||||
leaf->ebx = ncores;
|
||||
leaf->ecx |= (2<<8);
|
||||
}
|
||||
else if (nprocessors > 1) {
|
||||
leaf->eax = ilog2(nprocessors-1)+1;
|
||||
leaf->ebx = nprocessors;
|
||||
}
|
||||
}
|
||||
else if (ncores > 1) {
|
||||
if (nprocessors > 1) {
|
||||
leaf->eax = ilog2(nprocessors-1)+1;
|
||||
leaf->ebx = nprocessors;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 2:
|
||||
if (nthreads > 1) {
|
||||
if (nprocessors > 1) {
|
||||
leaf->eax = ilog2(nprocessors-1)+1;
|
||||
leaf->ebx = nprocessors;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
// leaf 0x0000000C reserved //
|
||||
|
||||
// leaf 0x0000000D //
|
||||
void corei7_ivy_bridge_3770k_t::get_std_cpuid_xsave_leaf(Bit32u subfunction, cpuid_function_t *leaf) const
|
||||
{
|
||||
switch(subfunction) {
|
||||
case 0:
|
||||
// EAX - valid bits of XCR0 (lower part)
|
||||
// EBX - Maximum size (in bytes) required by enabled features
|
||||
// ECX - Maximum size (in bytes) required by CPU supported features
|
||||
// EDX - valid bits of XCR0 (upper part)
|
||||
leaf->eax = cpu->xcr0_suppmask;
|
||||
leaf->ebx = 512+64;
|
||||
if (cpu->xcr0.get_AVX())
|
||||
leaf->ebx += 256;
|
||||
leaf->ecx = 512+64+256 /* AVX */;
|
||||
leaf->edx = 0;
|
||||
return;
|
||||
|
||||
case 1:
|
||||
leaf->eax = 1; /* XSAVEOPT supported */
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
return;
|
||||
|
||||
case 2: // AVX leaf
|
||||
leaf->eax = 256;
|
||||
leaf->ebx = 576;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
return;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
leaf->eax = 0; // reserved
|
||||
leaf->ebx = 0; // reserved
|
||||
leaf->ecx = 0; // reserved
|
||||
leaf->edx = 0; // reserved
|
||||
}
|
||||
|
||||
// leaf 0x80000000 //
|
||||
void corei7_ivy_bridge_3770k_t::get_ext_cpuid_leaf_0(cpuid_function_t *leaf) const
|
||||
{
|
||||
// EAX: highest extended function understood by CPUID
|
||||
// EBX: reserved
|
||||
// EDX: reserved
|
||||
// ECX: reserved
|
||||
leaf->eax = 0x80000008;
|
||||
leaf->ebx = 0;
|
||||
leaf->edx = 0; // Reserved for Intel
|
||||
leaf->ecx = 0;
|
||||
}
|
||||
|
||||
// leaf 0x80000001 //
|
||||
void corei7_ivy_bridge_3770k_t::get_ext_cpuid_leaf_1(cpuid_function_t *leaf) const
|
||||
{
|
||||
// EAX: CPU Version Information (reserved for Intel)
|
||||
leaf->eax = 0;
|
||||
|
||||
// EBX: Brand ID (reserved for Intel)
|
||||
leaf->ebx = 0;
|
||||
|
||||
// ECX:
|
||||
// * [0:0] LAHF/SAHF instructions support in 64-bit mode
|
||||
// [1:1] CMP_Legacy: Core multi-processing legacy mode (AMD)
|
||||
// [2:2] SVM: Secure Virtual Machine (AMD)
|
||||
// [3:3] Extended APIC Space
|
||||
// [4:4] AltMovCR8: LOCK MOV CR0 means MOV CR8
|
||||
// [5:5] LZCNT: LZCNT instruction support
|
||||
// [6:6] SSE4A: SSE4A Instructions support (deprecated?)
|
||||
// [7:7] Misaligned SSE support
|
||||
// [8:8] PREFETCHW: PREFETCHW instruction support
|
||||
// [9:9] OSVW: OS visible workarounds (AMD)
|
||||
// [11:10] reserved
|
||||
// [12:12] SKINIT support
|
||||
// [13:13] WDT: Watchdog timer support
|
||||
// [31:14] reserved
|
||||
|
||||
leaf->ecx = BX_CPUID_EXT2_LAHF_SAHF;
|
||||
|
||||
// EDX:
|
||||
// Many of the bits in EDX are the same as FN 0x00000001 [*] for AMD
|
||||
// [10:0] Reserved for Intel
|
||||
// * [11:11] SYSCALL/SYSRET support
|
||||
// [19:12] Reserved for Intel
|
||||
// * [20:20] No-Execute page protection
|
||||
// [25:21] Reserved
|
||||
// [26:26] 1G paging support
|
||||
// * [27:27] Support RDTSCP Instruction
|
||||
// [28:28] Reserved
|
||||
// * [29:29] Long Mode
|
||||
// [30:30] AMD 3DNow! Extensions
|
||||
// [31:31] AMD 3DNow! Instructions
|
||||
|
||||
leaf->edx = BX_CPUID_STD2_NX |
|
||||
BX_CPUID_STD2_RDTSCP |
|
||||
BX_CPUID_STD2_LONG_MODE;
|
||||
if (cpu->long64_mode())
|
||||
leaf->edx |= BX_CPUID_STD2_SYSCALL_SYSRET;
|
||||
}
|
||||
|
||||
// leaf 0x80000002 //
|
||||
// leaf 0x80000003 //
|
||||
// leaf 0x80000004 //
|
||||
void corei7_ivy_bridge_3770k_t::get_ext_cpuid_brand_string_leaf(Bit32u function, cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x80000002-0x80000004 - Processor Name String Identifier
|
||||
static const char* brand_string = " Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz";
|
||||
|
||||
switch(function) {
|
||||
case 0x80000002:
|
||||
memcpy(&(leaf->eax), brand_string , 4);
|
||||
memcpy(&(leaf->ebx), brand_string + 4, 4);
|
||||
memcpy(&(leaf->ecx), brand_string + 8, 4);
|
||||
memcpy(&(leaf->edx), brand_string + 12, 4);
|
||||
break;
|
||||
case 0x80000003:
|
||||
memcpy(&(leaf->eax), brand_string + 16, 4);
|
||||
memcpy(&(leaf->ebx), brand_string + 20, 4);
|
||||
memcpy(&(leaf->ecx), brand_string + 24, 4);
|
||||
memcpy(&(leaf->edx), brand_string + 28, 4);
|
||||
break;
|
||||
case 0x80000004:
|
||||
memcpy(&(leaf->eax), brand_string + 32, 4);
|
||||
memcpy(&(leaf->ebx), brand_string + 36, 4);
|
||||
memcpy(&(leaf->ecx), brand_string + 40, 4);
|
||||
memcpy(&(leaf->edx), brand_string + 44, 4);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
#ifdef BX_BIG_ENDIAN
|
||||
leaf->eax = bx_bswap32(leaf->eax);
|
||||
leaf->ebx = bx_bswap32(leaf->ebx);
|
||||
leaf->ecx = bx_bswap32(leaf->ecx);
|
||||
leaf->edx = bx_bswap32(leaf->edx);
|
||||
#endif
|
||||
}
|
||||
|
||||
// leaf 0x80000005 //
|
||||
void corei7_ivy_bridge_3770k_t::get_ext_cpuid_leaf_5(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x800000005 - L1 Cache and TLB Identifiers
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0; // reserved for Intel
|
||||
leaf->edx = 0;
|
||||
}
|
||||
|
||||
// leaf 0x80000006 //
|
||||
void corei7_ivy_bridge_3770k_t::get_ext_cpuid_leaf_6(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x800000006 - L2 Cache and TLB Identifiers
|
||||
leaf->eax = 0x00000000;
|
||||
leaf->ebx = 0x00000000;
|
||||
leaf->ecx = 0x01006040;
|
||||
leaf->edx = 0x00000000;
|
||||
}
|
||||
|
||||
// leaf 0x80000007 //
|
||||
void corei7_ivy_bridge_3770k_t::get_ext_cpuid_leaf_7(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x800000007 - Advanced Power Management
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0x00000100; // bit 8 - invariant TSC
|
||||
}
|
||||
|
||||
// leaf 0x80000008 //
|
||||
void corei7_ivy_bridge_3770k_t::get_ext_cpuid_leaf_8(cpuid_function_t *leaf) const
|
||||
{
|
||||
// virtual & phys address size in low 2 bytes.
|
||||
leaf->eax = BX_PHY_ADDRESS_WIDTH | (BX_LIN_ADDRESS_WIDTH << 8);
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0; // Reserved, undefined
|
||||
leaf->edx = 0;
|
||||
}
|
||||
|
||||
void corei7_ivy_bridge_3770k_t::dump_cpuid(void) const
|
||||
{
|
||||
struct cpuid_function_t leaf;
|
||||
unsigned n;
|
||||
|
||||
for (n=0; n<=0xd; n++) {
|
||||
get_cpuid_leaf(n, 0x00000000, &leaf);
|
||||
BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, leaf.edx));
|
||||
}
|
||||
|
||||
for (n=0x80000000; n<=0x80000008; n++) {
|
||||
get_cpuid_leaf(n, 0x00000000, &leaf);
|
||||
BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, leaf.edx));
|
||||
}
|
||||
}
|
||||
|
||||
bx_cpuid_t *create_corei7_ivy_bridge_3770k_cpuid(BX_CPU_C *cpu) { return new corei7_ivy_bridge_3770k_t(cpu); }
|
||||
|
||||
#endif
|
74
bochs/cpu/cpudb/corei7_ivy_bridge_3770K.h
Executable file
74
bochs/cpu/cpudb/corei7_ivy_bridge_3770K.h
Executable file
@ -0,0 +1,74 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id$
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2011 Stanislav Shwartsman
|
||||
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
|
||||
//
|
||||
// This library is free software; you can redistribute it and/or
|
||||
// modify it under the terms of the GNU Lesser General Public
|
||||
// License as published by the Free Software Foundation; either
|
||||
// version 2 of the License, or (at your option) any later version.
|
||||
//
|
||||
// This library is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
// Lesser General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU Lesser General Public
|
||||
// License along with this library; if not, write to the Free Software
|
||||
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
|
||||
//
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#ifndef BX_COREI7_IVY_BRIDGE_3770K_CPUID_DEFINITIONS_H
|
||||
#define BX_COREI7_IVY_BRIDGE_3770K_CPUID_DEFINITIONS_H
|
||||
|
||||
#if BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
|
||||
|
||||
#include "cpu/cpuid.h"
|
||||
|
||||
class corei7_ivy_bridge_3770k_t : public bx_cpuid_t {
|
||||
public:
|
||||
corei7_ivy_bridge_3770k_t(BX_CPU_C *cpu);
|
||||
virtual ~corei7_ivy_bridge_3770k_t() {}
|
||||
|
||||
// return CPU name
|
||||
virtual const char *get_name(void) const { return "corei7_ivy_bridge_3770k"; }
|
||||
|
||||
virtual Bit64u get_isa_extensions_bitmask(void) const;
|
||||
virtual Bit32u get_cpu_extensions_bitmask(void) const;
|
||||
#if BX_SUPPORT_VMX >= 2
|
||||
virtual Bit32u get_vmx_extensions_bitmask(void) const;
|
||||
#endif
|
||||
|
||||
virtual void get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
|
||||
virtual void dump_cpuid(void) const;
|
||||
|
||||
private:
|
||||
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_5(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_6(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_7(Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_A(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_extended_topology_leaf(Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_xsave_leaf(Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
|
||||
void get_ext_cpuid_leaf_0(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_1(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_brand_string_leaf(Bit32u function, cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_5(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_6(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_7(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_8(cpuid_function_t *leaf) const;
|
||||
};
|
||||
|
||||
extern bx_cpuid_t *create_corei7_ivy_bridge_3770k_cpuid(BX_CPU_C *cpu);
|
||||
|
||||
#endif // BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
|
||||
|
||||
#endif
|
635
bochs/cpu/cpudb/corei7_ivy_bridge_3770K.txt
Executable file
635
bochs/cpu/cpudb/corei7_ivy_bridge_3770K.txt
Executable file
@ -0,0 +1,635 @@
|
||||
CPU-Z TXT Report
|
||||
-------------------------------------------------------------------------
|
||||
|
||||
Binaries
|
||||
-------------------------------------------------------------------------
|
||||
|
||||
CPU-Z version 1.60
|
||||
|
||||
Processors
|
||||
-------------------------------------------------------------------------
|
||||
|
||||
Number of processors 1
|
||||
Number of threads 8
|
||||
|
||||
APICs
|
||||
-------------------------------------------------------------------------
|
||||
|
||||
Processor 0
|
||||
-- Core 0
|
||||
-- Thread 0 0
|
||||
-- Thread 1 1
|
||||
-- Core 1
|
||||
-- Thread 0 2
|
||||
-- Thread 1 3
|
||||
-- Core 2
|
||||
-- Thread 0 4
|
||||
-- Thread 1 5
|
||||
-- Core 3
|
||||
-- Thread 0 6
|
||||
-- Thread 1 7
|
||||
|
||||
Processors Information
|
||||
-------------------------------------------------------------------------
|
||||
|
||||
Processor 1 ID = 0
|
||||
Number of cores 4 (max 8)
|
||||
Number of threads 8 (max 16)
|
||||
Name Intel Core i7 3770K
|
||||
Codename Ivy Bridge
|
||||
Specification Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz
|
||||
Package (platform ID) Socket 1155 LGA (0x1)
|
||||
CPUID 6.A.9
|
||||
Extended CPUID 6.3A
|
||||
Core Stepping
|
||||
Technology 22 nm
|
||||
TDP Limit 77 Watts
|
||||
Core Speed 1635.3 MHz
|
||||
Multiplier x FSB 16.0 x 102.2 MHz
|
||||
Stock frequency 3500 MHz
|
||||
Instructions sets MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, EM64T, VT-x, AES, AVX
|
||||
L1 Data cache 4 x 32 KBytes, 8-way set associative, 64-byte line size
|
||||
L1 Instruction cache 4 x 32 KBytes, 8-way set associative, 64-byte line size
|
||||
L2 cache 4 x 256 KBytes, 8-way set associative, 64-byte line size
|
||||
L3 cache 8 MBytes, 16-way set associative, 64-byte line size
|
||||
FID/VID Control yes
|
||||
|
||||
|
||||
Turbo Mode supported, enabled
|
||||
Max non-turbo ratio 35x
|
||||
Max turbo ratio 42x
|
||||
Max efficiency ratio 16x
|
||||
Min Power 60 Watts
|
||||
O/C bins unlimited
|
||||
|
||||
|
||||
Thread dumps
|
||||
-------------------------------------------------------------------------
|
||||
|
||||
CPU Thread 0
|
||||
APIC ID 0
|
||||
Topology Processor ID 0, Core ID 0, Thread ID 0
|
||||
Type 01020101h
|
||||
Max CPUID level 0000000Dh
|
||||
Max CPUID ext. level 80000008h
|
||||
Cache descriptor Level 1, D, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 1, I, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 2, U, 256 KB, 2 thread(s)
|
||||
Cache descriptor Level 3, U, 8 MB, 16 thread(s)
|
||||
|
||||
CPUID
|
||||
0x00000000 0x0000000D 0x756E6547 0x6C65746E 0x49656E69
|
||||
0x00000001 0x000306A9 0x00100800 0x7F9AE3BF 0xBFEBFBFF
|
||||
0x00000002 0x76035A01 0x00F0B2FF 0x00000000 0x00CA0000
|
||||
0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000004 0x1C004121 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004122 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004143 0x01C0003F 0x000001FF 0x00000000
|
||||
0x00000004 0x1C03C163 0x03C0003F 0x00001FFF 0x00000006
|
||||
0x00000005 0x00000040 0x00000040 0x00000003 0x00001120
|
||||
0x00000006 0x00000077 0x00000002 0x00000009 0x00000000
|
||||
0x00000007 0x00000000 0x00000281 0x00000000 0x00000000
|
||||
0x00000008 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000A 0x07300403 0x00000000 0x00000000 0x00000603
|
||||
0x0000000B 0x00000001 0x00000002 0x00000100 0x00000000
|
||||
0x0000000B 0x00000004 0x00000008 0x00000201 0x00000000
|
||||
0x0000000C 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000D 0x00000007 0x00000340 0x00000340 0x00000000
|
||||
0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
|
||||
0x80000001 0x00000000 0x00000000 0x00000001 0x28100800
|
||||
0x80000002 0x20202020 0x49202020 0x6C65746E 0x20295228
|
||||
0x80000003 0x65726F43 0x294D5428 0x2D376920 0x30373733
|
||||
0x80000004 0x5043204B 0x20402055 0x30352E33 0x007A4847
|
||||
0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x80000006 0x00000000 0x00000000 0x01006040 0x00000000
|
||||
0x80000007 0x00000000 0x00000000 0x00000000 0x00000100
|
||||
0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
|
||||
|
||||
MSR 0x0000001B 0x00000000 0xFEE00900
|
||||
MSR 0x0000003A 0x00000000 0x00000005
|
||||
MSR 0x000001A0 0x00000000 0x00850089
|
||||
MSR 0x000000CE 0x00081010 0xF0012300
|
||||
MSR 0x00000017 0x00040000 0x00000000
|
||||
MSR 0x00000035 0x00000000 0x00040008
|
||||
MSR 0x000000C1 0x00000000 0x00000000
|
||||
MSR 0x000000C2 0x00000000 0x00000000
|
||||
MSR 0x000000C3 0x00000000 0x00000000
|
||||
MSR 0x000000C4 0x00000000 0x00000000
|
||||
MSR 0x00000186 0x00000000 0x00000000
|
||||
MSR 0x00000187 0x00000000 0x00000000
|
||||
MSR 0x000001AD 0x00000000 0x252A2A2A
|
||||
MSR 0x00000194 0x00000000 0x000F0000
|
||||
MSR 0x0000019A 0x00000000 0x00000000
|
||||
MSR 0x000001A4 0x00000000 0x00000000
|
||||
MSR 0x000001B1 0x00000000 0x88490000
|
||||
MSR 0x000001FC 0x00000000 0x0014005D
|
||||
MSR 0x00000601 0x18141494 0x80001FFF
|
||||
MSR 0x00000602 0x18141494 0x80001FFF
|
||||
MSR 0x00000606 0x00000000 0x000A1003
|
||||
MSR 0x00000610 0x800087F8 0x001487F8
|
||||
MSR 0x00000611 0x00000000 0x96F5A31F
|
||||
MSR 0x00000639 0x00000000 0x0C959E46
|
||||
MSR 0x00000641 0x00000000 0x00075FC9
|
||||
MSR 0x00000614 0x00000000 0x01E00268
|
||||
MSR 0x0000019C 0x00000000 0x884B0000
|
||||
MSR 0x000001A2 0x00000000 0x00691400
|
||||
MSR 0x00000198 0x00002578 0x00002A00
|
||||
MSR 0x00000199 0x00000000 0x0000FF00
|
||||
|
||||
CPU Thread 1
|
||||
APIC ID 1
|
||||
Topology Processor ID 0, Core ID 0, Thread ID 1
|
||||
Type 01020101h
|
||||
Max CPUID level 0000000Dh
|
||||
Max CPUID ext. level 80000008h
|
||||
Cache descriptor Level 1, D, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 1, I, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 2, U, 256 KB, 2 thread(s)
|
||||
Cache descriptor Level 3, U, 8 MB, 16 thread(s)
|
||||
|
||||
CPUID
|
||||
0x00000000 0x0000000D 0x756E6547 0x6C65746E 0x49656E69
|
||||
0x00000001 0x000306A9 0x01100800 0x7F9AE3BF 0xBFEBFBFF
|
||||
0x00000002 0x76035A01 0x00F0B2FF 0x00000000 0x00CA0000
|
||||
0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000004 0x1C004121 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004122 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004143 0x01C0003F 0x000001FF 0x00000000
|
||||
0x00000004 0x1C03C163 0x03C0003F 0x00001FFF 0x00000006
|
||||
0x00000005 0x00000040 0x00000040 0x00000003 0x00001120
|
||||
0x00000006 0x00000077 0x00000002 0x00000009 0x00000000
|
||||
0x00000007 0x00000000 0x00000281 0x00000000 0x00000000
|
||||
0x00000008 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000A 0x07300403 0x00000000 0x00000000 0x00000603
|
||||
0x0000000B 0x00000001 0x00000002 0x00000100 0x00000001
|
||||
0x0000000B 0x00000004 0x00000008 0x00000201 0x00000001
|
||||
0x0000000C 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000D 0x00000007 0x00000340 0x00000340 0x00000000
|
||||
0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
|
||||
0x80000001 0x00000000 0x00000000 0x00000001 0x28100800
|
||||
0x80000002 0x20202020 0x49202020 0x6C65746E 0x20295228
|
||||
0x80000003 0x65726F43 0x294D5428 0x2D376920 0x30373733
|
||||
0x80000004 0x5043204B 0x20402055 0x30352E33 0x007A4847
|
||||
0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x80000006 0x00000000 0x00000000 0x01006040 0x00000000
|
||||
0x80000007 0x00000000 0x00000000 0x00000000 0x00000100
|
||||
0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
|
||||
|
||||
MSR 0x0000001B 0x00000000 0xFEE00800
|
||||
MSR 0x0000003A 0x00000000 0x00000005
|
||||
MSR 0x000001A0 0x00000000 0x00850089
|
||||
MSR 0x000000CE 0x00081010 0xF0012300
|
||||
MSR 0x00000017 0x00040000 0x00000000
|
||||
MSR 0x00000035 0x00000000 0x00040008
|
||||
MSR 0x000000C1 0x00000000 0x00000000
|
||||
MSR 0x000000C2 0x00000000 0x00000000
|
||||
MSR 0x000000C3 0x00000000 0x00000000
|
||||
MSR 0x000000C4 0x00000000 0x00000000
|
||||
MSR 0x00000186 0x00000000 0x00000000
|
||||
MSR 0x00000187 0x00000000 0x00000000
|
||||
MSR 0x000001AD 0x00000000 0x252A2A2A
|
||||
MSR 0x00000194 0x00000000 0x000F0000
|
||||
MSR 0x0000019A 0x00000000 0x00000000
|
||||
MSR 0x000001A4 0x00000000 0x00000000
|
||||
MSR 0x000001B1 0x00000000 0x884A0000
|
||||
MSR 0x000001FC 0x00000000 0x0014005D
|
||||
MSR 0x00000601 0x18141494 0x80001FFF
|
||||
MSR 0x00000602 0x18141494 0x80001FFF
|
||||
MSR 0x00000606 0x00000000 0x000A1003
|
||||
MSR 0x00000610 0x800087F8 0x001487F8
|
||||
MSR 0x00000611 0x00000000 0x96F6FB06
|
||||
MSR 0x00000639 0x00000000 0x0C95FCFD
|
||||
MSR 0x00000641 0x00000000 0x0007605F
|
||||
MSR 0x00000614 0x00000000 0x01E00268
|
||||
MSR 0x0000019C 0x00000000 0x884D0000
|
||||
MSR 0x000001A2 0x00000000 0x00691400
|
||||
MSR 0x00000198 0x0000254F 0x00002500
|
||||
MSR 0x00000199 0x00000000 0x0000FF00
|
||||
|
||||
CPU Thread 2
|
||||
APIC ID 2
|
||||
Topology Processor ID 0, Core ID 1, Thread ID 0
|
||||
Type 01020101h
|
||||
Max CPUID level 0000000Dh
|
||||
Max CPUID ext. level 80000008h
|
||||
Cache descriptor Level 1, D, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 1, I, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 2, U, 256 KB, 2 thread(s)
|
||||
Cache descriptor Level 3, U, 8 MB, 16 thread(s)
|
||||
|
||||
CPUID
|
||||
0x00000000 0x0000000D 0x756E6547 0x6C65746E 0x49656E69
|
||||
0x00000001 0x000306A9 0x02100800 0x7F9AE3BF 0xBFEBFBFF
|
||||
0x00000002 0x76035A01 0x00F0B2FF 0x00000000 0x00CA0000
|
||||
0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000004 0x1C004121 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004122 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004143 0x01C0003F 0x000001FF 0x00000000
|
||||
0x00000004 0x1C03C163 0x03C0003F 0x00001FFF 0x00000006
|
||||
0x00000005 0x00000040 0x00000040 0x00000003 0x00001120
|
||||
0x00000006 0x00000077 0x00000002 0x00000009 0x00000000
|
||||
0x00000007 0x00000000 0x00000281 0x00000000 0x00000000
|
||||
0x00000008 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000A 0x07300403 0x00000000 0x00000000 0x00000603
|
||||
0x0000000B 0x00000001 0x00000002 0x00000100 0x00000002
|
||||
0x0000000B 0x00000004 0x00000008 0x00000201 0x00000002
|
||||
0x0000000C 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000D 0x00000007 0x00000340 0x00000340 0x00000000
|
||||
0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
|
||||
0x80000001 0x00000000 0x00000000 0x00000001 0x28100800
|
||||
0x80000002 0x20202020 0x49202020 0x6C65746E 0x20295228
|
||||
0x80000003 0x65726F43 0x294D5428 0x2D376920 0x30373733
|
||||
0x80000004 0x5043204B 0x20402055 0x30352E33 0x007A4847
|
||||
0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x80000006 0x00000000 0x00000000 0x01006040 0x00000000
|
||||
0x80000007 0x00000000 0x00000000 0x00000000 0x00000100
|
||||
0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
|
||||
|
||||
MSR 0x0000001B 0x00000000 0xFEE00800
|
||||
MSR 0x0000003A 0x00000000 0x00000005
|
||||
MSR 0x000001A0 0x00000000 0x00850089
|
||||
MSR 0x000000CE 0x00081010 0xF0012300
|
||||
MSR 0x00000017 0x00040000 0x00000000
|
||||
MSR 0x00000035 0x00000000 0x00040008
|
||||
MSR 0x000000C1 0x00000000 0x00000000
|
||||
MSR 0x000000C2 0x00000000 0x00000000
|
||||
MSR 0x000000C3 0x00000000 0x00000000
|
||||
MSR 0x000000C4 0x00000000 0x00000000
|
||||
MSR 0x00000186 0x00000000 0x00000000
|
||||
MSR 0x00000187 0x00000000 0x00000000
|
||||
MSR 0x000001AD 0x00000000 0x252A2A2A
|
||||
MSR 0x00000194 0x00000000 0x000F0000
|
||||
MSR 0x0000019A 0x00000000 0x00000000
|
||||
MSR 0x000001A4 0x00000000 0x00000000
|
||||
MSR 0x000001B1 0x00000000 0x884B0000
|
||||
MSR 0x000001FC 0x00000000 0x0014005D
|
||||
MSR 0x00000601 0x18141494 0x80001FFF
|
||||
MSR 0x00000602 0x18141494 0x80001FFF
|
||||
MSR 0x00000606 0x00000000 0x000A1003
|
||||
MSR 0x00000610 0x800087F8 0x001487F8
|
||||
MSR 0x00000611 0x00000000 0x96F81804
|
||||
MSR 0x00000639 0x00000000 0x0C9620C3
|
||||
MSR 0x00000641 0x00000000 0x000760D2
|
||||
MSR 0x00000614 0x00000000 0x01E00268
|
||||
MSR 0x0000019C 0x00000000 0x884C0000
|
||||
MSR 0x000001A2 0x00000000 0x00691400
|
||||
MSR 0x00000198 0x000024AB 0x00002A00
|
||||
MSR 0x00000199 0x00000000 0x0000FF00
|
||||
|
||||
CPU Thread 3
|
||||
APIC ID 3
|
||||
Topology Processor ID 0, Core ID 1, Thread ID 1
|
||||
Type 01020101h
|
||||
Max CPUID level 0000000Dh
|
||||
Max CPUID ext. level 80000008h
|
||||
Cache descriptor Level 1, D, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 1, I, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 2, U, 256 KB, 2 thread(s)
|
||||
Cache descriptor Level 3, U, 8 MB, 16 thread(s)
|
||||
|
||||
CPUID
|
||||
0x00000000 0x0000000D 0x756E6547 0x6C65746E 0x49656E69
|
||||
0x00000001 0x000306A9 0x03100800 0x7F9AE3BF 0xBFEBFBFF
|
||||
0x00000002 0x76035A01 0x00F0B2FF 0x00000000 0x00CA0000
|
||||
0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000004 0x1C004121 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004122 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004143 0x01C0003F 0x000001FF 0x00000000
|
||||
0x00000004 0x1C03C163 0x03C0003F 0x00001FFF 0x00000006
|
||||
0x00000005 0x00000040 0x00000040 0x00000003 0x00001120
|
||||
0x00000006 0x00000077 0x00000002 0x00000009 0x00000000
|
||||
0x00000007 0x00000000 0x00000281 0x00000000 0x00000000
|
||||
0x00000008 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000A 0x07300403 0x00000000 0x00000000 0x00000603
|
||||
0x0000000B 0x00000001 0x00000002 0x00000100 0x00000003
|
||||
0x0000000B 0x00000004 0x00000008 0x00000201 0x00000003
|
||||
0x0000000C 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000D 0x00000007 0x00000340 0x00000340 0x00000000
|
||||
0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
|
||||
0x80000001 0x00000000 0x00000000 0x00000001 0x28100800
|
||||
0x80000002 0x20202020 0x49202020 0x6C65746E 0x20295228
|
||||
0x80000003 0x65726F43 0x294D5428 0x2D376920 0x30373733
|
||||
0x80000004 0x5043204B 0x20402055 0x30352E33 0x007A4847
|
||||
0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x80000006 0x00000000 0x00000000 0x01006040 0x00000000
|
||||
0x80000007 0x00000000 0x00000000 0x00000000 0x00000100
|
||||
0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
|
||||
|
||||
MSR 0x0000001B 0x00000000 0xFEE00800
|
||||
MSR 0x0000003A 0x00000000 0x00000005
|
||||
MSR 0x000001A0 0x00000000 0x00850089
|
||||
MSR 0x000000CE 0x00081010 0xF0012300
|
||||
MSR 0x00000017 0x00040000 0x00000000
|
||||
MSR 0x00000035 0x00000000 0x00040008
|
||||
MSR 0x000000C1 0x00000000 0x00000000
|
||||
MSR 0x000000C2 0x00000000 0x00000000
|
||||
MSR 0x000000C3 0x00000000 0x00000000
|
||||
MSR 0x000000C4 0x00000000 0x00000000
|
||||
MSR 0x00000186 0x00000000 0x00000000
|
||||
MSR 0x00000187 0x00000000 0x00000000
|
||||
MSR 0x000001AD 0x00000000 0x252A2A2A
|
||||
MSR 0x00000194 0x00000000 0x000F0000
|
||||
MSR 0x0000019A 0x00000000 0x00000000
|
||||
MSR 0x000001A4 0x00000000 0x00000000
|
||||
MSR 0x000001B1 0x00000000 0x884C0000
|
||||
MSR 0x000001FC 0x00000000 0x0014005D
|
||||
MSR 0x00000601 0x18141494 0x80001FFF
|
||||
MSR 0x00000602 0x18141494 0x80001FFF
|
||||
MSR 0x00000606 0x00000000 0x000A1003
|
||||
MSR 0x00000610 0x800087F8 0x001487F8
|
||||
MSR 0x00000611 0x00000000 0x96F930C8
|
||||
MSR 0x00000639 0x00000000 0x0C964038
|
||||
MSR 0x00000641 0x00000000 0x00076174
|
||||
MSR 0x00000614 0x00000000 0x01E00268
|
||||
MSR 0x0000019C 0x00000000 0x884C0000
|
||||
MSR 0x000001A2 0x00000000 0x00691400
|
||||
MSR 0x00000198 0x000024AB 0x00002A00
|
||||
MSR 0x00000199 0x00000000 0x0000FF00
|
||||
|
||||
CPU Thread 4
|
||||
APIC ID 4
|
||||
Topology Processor ID 0, Core ID 2, Thread ID 0
|
||||
Type 01020101h
|
||||
Max CPUID level 0000000Dh
|
||||
Max CPUID ext. level 80000008h
|
||||
Cache descriptor Level 1, D, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 1, I, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 2, U, 256 KB, 2 thread(s)
|
||||
Cache descriptor Level 3, U, 8 MB, 16 thread(s)
|
||||
|
||||
CPUID
|
||||
0x00000000 0x0000000D 0x756E6547 0x6C65746E 0x49656E69
|
||||
0x00000001 0x000306A9 0x04100800 0x7F9AE3BF 0xBFEBFBFF
|
||||
0x00000002 0x76035A01 0x00F0B2FF 0x00000000 0x00CA0000
|
||||
0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000004 0x1C004121 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004122 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004143 0x01C0003F 0x000001FF 0x00000000
|
||||
0x00000004 0x1C03C163 0x03C0003F 0x00001FFF 0x00000006
|
||||
0x00000005 0x00000040 0x00000040 0x00000003 0x00001120
|
||||
0x00000006 0x00000077 0x00000002 0x00000009 0x00000000
|
||||
0x00000007 0x00000000 0x00000281 0x00000000 0x00000000
|
||||
0x00000008 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000A 0x07300403 0x00000000 0x00000000 0x00000603
|
||||
0x0000000B 0x00000001 0x00000002 0x00000100 0x00000004
|
||||
0x0000000B 0x00000004 0x00000008 0x00000201 0x00000004
|
||||
0x0000000C 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000D 0x00000007 0x00000340 0x00000340 0x00000000
|
||||
0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
|
||||
0x80000001 0x00000000 0x00000000 0x00000001 0x28100800
|
||||
0x80000002 0x20202020 0x49202020 0x6C65746E 0x20295228
|
||||
0x80000003 0x65726F43 0x294D5428 0x2D376920 0x30373733
|
||||
0x80000004 0x5043204B 0x20402055 0x30352E33 0x007A4847
|
||||
0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x80000006 0x00000000 0x00000000 0x01006040 0x00000000
|
||||
0x80000007 0x00000000 0x00000000 0x00000000 0x00000100
|
||||
0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
|
||||
|
||||
MSR 0x0000001B 0x00000000 0xFEE00800
|
||||
MSR 0x0000003A 0x00000000 0x00000005
|
||||
MSR 0x000001A0 0x00000000 0x00850089
|
||||
MSR 0x000000CE 0x00081010 0xF0012300
|
||||
MSR 0x00000017 0x00040000 0x00000000
|
||||
MSR 0x00000035 0x00000000 0x00040008
|
||||
MSR 0x000000C1 0x00000000 0x00000000
|
||||
MSR 0x000000C2 0x00000000 0x00000000
|
||||
MSR 0x000000C3 0x00000000 0x00000000
|
||||
MSR 0x000000C4 0x00000000 0x00000000
|
||||
MSR 0x00000186 0x00000000 0x00000000
|
||||
MSR 0x00000187 0x00000000 0x00000000
|
||||
MSR 0x000001AD 0x00000000 0x252A2A2A
|
||||
MSR 0x00000194 0x00000000 0x000F0000
|
||||
MSR 0x0000019A 0x00000000 0x00000000
|
||||
MSR 0x000001A4 0x00000000 0x00000000
|
||||
MSR 0x000001B1 0x00000000 0x88470000
|
||||
MSR 0x000001FC 0x00000000 0x0014005D
|
||||
MSR 0x00000601 0x18141494 0x80001FFF
|
||||
MSR 0x00000602 0x18141494 0x80001FFF
|
||||
MSR 0x00000606 0x00000000 0x000A1003
|
||||
MSR 0x00000610 0x800087F8 0x001487F8
|
||||
MSR 0x00000611 0x00000000 0x96FA4695
|
||||
MSR 0x00000639 0x00000000 0x0C965CBA
|
||||
MSR 0x00000641 0x00000000 0x000761E7
|
||||
MSR 0x00000614 0x00000000 0x01E00268
|
||||
MSR 0x0000019C 0x00000000 0x88470000
|
||||
MSR 0x000001A2 0x00000000 0x00691400
|
||||
MSR 0x00000198 0x0000233A 0x00002500
|
||||
MSR 0x00000199 0x00000000 0x0000FF00
|
||||
|
||||
CPU Thread 5
|
||||
APIC ID 5
|
||||
Topology Processor ID 0, Core ID 2, Thread ID 1
|
||||
Type 01020101h
|
||||
Max CPUID level 0000000Dh
|
||||
Max CPUID ext. level 80000008h
|
||||
Cache descriptor Level 1, D, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 1, I, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 2, U, 256 KB, 2 thread(s)
|
||||
Cache descriptor Level 3, U, 8 MB, 16 thread(s)
|
||||
|
||||
CPUID
|
||||
0x00000000 0x0000000D 0x756E6547 0x6C65746E 0x49656E69
|
||||
0x00000001 0x000306A9 0x05100800 0x7F9AE3BF 0xBFEBFBFF
|
||||
0x00000002 0x76035A01 0x00F0B2FF 0x00000000 0x00CA0000
|
||||
0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000004 0x1C004121 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004122 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004143 0x01C0003F 0x000001FF 0x00000000
|
||||
0x00000004 0x1C03C163 0x03C0003F 0x00001FFF 0x00000006
|
||||
0x00000005 0x00000040 0x00000040 0x00000003 0x00001120
|
||||
0x00000006 0x00000077 0x00000002 0x00000009 0x00000000
|
||||
0x00000007 0x00000000 0x00000281 0x00000000 0x00000000
|
||||
0x00000008 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000A 0x07300403 0x00000000 0x00000000 0x00000603
|
||||
0x0000000B 0x00000001 0x00000002 0x00000100 0x00000005
|
||||
0x0000000B 0x00000004 0x00000008 0x00000201 0x00000005
|
||||
0x0000000C 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000D 0x00000007 0x00000340 0x00000340 0x00000000
|
||||
0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
|
||||
0x80000001 0x00000000 0x00000000 0x00000001 0x28100800
|
||||
0x80000002 0x20202020 0x49202020 0x6C65746E 0x20295228
|
||||
0x80000003 0x65726F43 0x294D5428 0x2D376920 0x30373733
|
||||
0x80000004 0x5043204B 0x20402055 0x30352E33 0x007A4847
|
||||
0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x80000006 0x00000000 0x00000000 0x01006040 0x00000000
|
||||
0x80000007 0x00000000 0x00000000 0x00000000 0x00000100
|
||||
0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
|
||||
|
||||
MSR 0x0000001B 0x00000000 0xFEE00800
|
||||
MSR 0x0000003A 0x00000000 0x00000005
|
||||
MSR 0x000001A0 0x00000000 0x00850089
|
||||
MSR 0x000000CE 0x00081010 0xF0012300
|
||||
MSR 0x00000017 0x00040000 0x00000000
|
||||
MSR 0x00000035 0x00000000 0x00040008
|
||||
MSR 0x000000C1 0x00000000 0x00000000
|
||||
MSR 0x000000C2 0x00000000 0x00000000
|
||||
MSR 0x000000C3 0x00000000 0x00000000
|
||||
MSR 0x000000C4 0x00000000 0x00000000
|
||||
MSR 0x00000186 0x00000000 0x00000000
|
||||
MSR 0x00000187 0x00000000 0x00000000
|
||||
MSR 0x000001AD 0x00000000 0x252A2A2A
|
||||
MSR 0x00000194 0x00000000 0x000F0000
|
||||
MSR 0x0000019A 0x00000000 0x00000000
|
||||
MSR 0x000001A4 0x00000000 0x00000000
|
||||
MSR 0x000001B1 0x00000000 0x884B0000
|
||||
MSR 0x000001FC 0x00000000 0x0014005D
|
||||
MSR 0x00000601 0x18141494 0x80001FFF
|
||||
MSR 0x00000602 0x18141494 0x80001FFF
|
||||
MSR 0x00000606 0x00000000 0x000A1003
|
||||
MSR 0x00000610 0x800087F8 0x001487F8
|
||||
MSR 0x00000611 0x00000000 0x96FB6402
|
||||
MSR 0x00000639 0x00000000 0x0C967C4A
|
||||
MSR 0x00000641 0x00000000 0x0007625A
|
||||
MSR 0x00000614 0x00000000 0x01E00268
|
||||
MSR 0x0000019C 0x00000000 0x884B0000
|
||||
MSR 0x000001A2 0x00000000 0x00691400
|
||||
MSR 0x00000198 0x00002578 0x00002A00
|
||||
MSR 0x00000199 0x00000000 0x0000FF00
|
||||
|
||||
CPU Thread 6
|
||||
APIC ID 6
|
||||
Topology Processor ID 0, Core ID 3, Thread ID 0
|
||||
Type 01020101h
|
||||
Max CPUID level 0000000Dh
|
||||
Max CPUID ext. level 80000008h
|
||||
Cache descriptor Level 1, D, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 1, I, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 2, U, 256 KB, 2 thread(s)
|
||||
Cache descriptor Level 3, U, 8 MB, 16 thread(s)
|
||||
|
||||
CPUID
|
||||
0x00000000 0x0000000D 0x756E6547 0x6C65746E 0x49656E69
|
||||
0x00000001 0x000306A9 0x06100800 0x7F9AE3BF 0xBFEBFBFF
|
||||
0x00000002 0x76035A01 0x00F0B2FF 0x00000000 0x00CA0000
|
||||
0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000004 0x1C004121 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004122 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004143 0x01C0003F 0x000001FF 0x00000000
|
||||
0x00000004 0x1C03C163 0x03C0003F 0x00001FFF 0x00000006
|
||||
0x00000005 0x00000040 0x00000040 0x00000003 0x00001120
|
||||
0x00000006 0x00000077 0x00000002 0x00000009 0x00000000
|
||||
0x00000007 0x00000000 0x00000281 0x00000000 0x00000000
|
||||
0x00000008 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000A 0x07300403 0x00000000 0x00000000 0x00000603
|
||||
0x0000000B 0x00000001 0x00000002 0x00000100 0x00000006
|
||||
0x0000000B 0x00000004 0x00000008 0x00000201 0x00000006
|
||||
0x0000000C 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000D 0x00000007 0x00000340 0x00000340 0x00000000
|
||||
0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
|
||||
0x80000001 0x00000000 0x00000000 0x00000001 0x28100800
|
||||
0x80000002 0x20202020 0x49202020 0x6C65746E 0x20295228
|
||||
0x80000003 0x65726F43 0x294D5428 0x2D376920 0x30373733
|
||||
0x80000004 0x5043204B 0x20402055 0x30352E33 0x007A4847
|
||||
0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x80000006 0x00000000 0x00000000 0x01006040 0x00000000
|
||||
0x80000007 0x00000000 0x00000000 0x00000000 0x00000100
|
||||
0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
|
||||
|
||||
MSR 0x0000001B 0x00000000 0xFEE00800
|
||||
MSR 0x0000003A 0x00000000 0x00000005
|
||||
MSR 0x000001A0 0x00000000 0x00850089
|
||||
MSR 0x000000CE 0x00081010 0xF0012300
|
||||
MSR 0x00000017 0x00040000 0x00000000
|
||||
MSR 0x00000035 0x00000000 0x00040008
|
||||
MSR 0x000000C1 0x00000000 0x00000000
|
||||
MSR 0x000000C2 0x00000000 0x00000000
|
||||
MSR 0x000000C3 0x00000000 0x00000000
|
||||
MSR 0x000000C4 0x00000000 0x00000000
|
||||
MSR 0x00000186 0x00000000 0x00000000
|
||||
MSR 0x00000187 0x00000000 0x00000000
|
||||
MSR 0x000001AD 0x00000000 0x252A2A2A
|
||||
MSR 0x00000194 0x00000000 0x000F0000
|
||||
MSR 0x0000019A 0x00000000 0x00000000
|
||||
MSR 0x000001A4 0x00000000 0x00000000
|
||||
MSR 0x000001B1 0x00000000 0x884B0000
|
||||
MSR 0x000001FC 0x00000000 0x0014005D
|
||||
MSR 0x00000601 0x18141494 0x80001FFF
|
||||
MSR 0x00000602 0x18141494 0x80001FFF
|
||||
MSR 0x00000606 0x00000000 0x000A1003
|
||||
MSR 0x00000610 0x800087F8 0x001487F8
|
||||
MSR 0x00000611 0x00000000 0x96FCAB7F
|
||||
MSR 0x00000639 0x00000000 0x0C96C517
|
||||
MSR 0x00000641 0x00000000 0x000762F8
|
||||
MSR 0x00000614 0x00000000 0x01E00268
|
||||
MSR 0x0000019C 0x00000000 0x884B0000
|
||||
MSR 0x000001A2 0x00000000 0x00691400
|
||||
MSR 0x00000198 0x0000254F 0x00002500
|
||||
MSR 0x00000199 0x00000000 0x0000FF00
|
||||
|
||||
CPU Thread 7
|
||||
APIC ID 7
|
||||
Topology Processor ID 0, Core ID 3, Thread ID 1
|
||||
Type 01020101h
|
||||
Max CPUID level 0000000Dh
|
||||
Max CPUID ext. level 80000008h
|
||||
Cache descriptor Level 1, D, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 1, I, 32 KB, 2 thread(s)
|
||||
Cache descriptor Level 2, U, 256 KB, 2 thread(s)
|
||||
Cache descriptor Level 3, U, 8 MB, 16 thread(s)
|
||||
|
||||
CPUID
|
||||
0x00000000 0x0000000D 0x756E6547 0x6C65746E 0x49656E69
|
||||
0x00000001 0x000306A9 0x07100800 0x7F9AE3BF 0xBFEBFBFF
|
||||
0x00000002 0x76035A01 0x00F0B2FF 0x00000000 0x00CA0000
|
||||
0x00000003 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000004 0x1C004121 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004122 0x01C0003F 0x0000003F 0x00000000
|
||||
0x00000004 0x1C004143 0x01C0003F 0x000001FF 0x00000000
|
||||
0x00000004 0x1C03C163 0x03C0003F 0x00001FFF 0x00000006
|
||||
0x00000005 0x00000040 0x00000040 0x00000003 0x00001120
|
||||
0x00000006 0x00000077 0x00000002 0x00000009 0x00000000
|
||||
0x00000007 0x00000000 0x00000281 0x00000000 0x00000000
|
||||
0x00000008 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x00000009 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000A 0x07300403 0x00000000 0x00000000 0x00000603
|
||||
0x0000000B 0x00000001 0x00000002 0x00000100 0x00000007
|
||||
0x0000000B 0x00000004 0x00000008 0x00000201 0x00000007
|
||||
0x0000000C 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x0000000D 0x00000007 0x00000340 0x00000340 0x00000000
|
||||
0x80000000 0x80000008 0x00000000 0x00000000 0x00000000
|
||||
0x80000001 0x00000000 0x00000000 0x00000001 0x28100800
|
||||
0x80000002 0x20202020 0x49202020 0x6C65746E 0x20295228
|
||||
0x80000003 0x65726F43 0x294D5428 0x2D376920 0x30373733
|
||||
0x80000004 0x5043204B 0x20402055 0x30352E33 0x007A4847
|
||||
0x80000005 0x00000000 0x00000000 0x00000000 0x00000000
|
||||
0x80000006 0x00000000 0x00000000 0x01006040 0x00000000
|
||||
0x80000007 0x00000000 0x00000000 0x00000000 0x00000100
|
||||
0x80000008 0x00003024 0x00000000 0x00000000 0x00000000
|
||||
|
||||
MSR 0x0000001B 0x00000000 0xFEE00800
|
||||
MSR 0x0000003A 0x00000000 0x00000005
|
||||
MSR 0x000001A0 0x00000000 0x00850089
|
||||
MSR 0x000000CE 0x00081010 0xF0012300
|
||||
MSR 0x00000017 0x00040000 0x00000000
|
||||
MSR 0x00000035 0x00000000 0x00040008
|
||||
MSR 0x000000C1 0x00000000 0x00000000
|
||||
MSR 0x000000C2 0x00000000 0x00000000
|
||||
MSR 0x000000C3 0x00000000 0x00000000
|
||||
MSR 0x000000C4 0x00000000 0x00000000
|
||||
MSR 0x00000186 0x00000000 0x00000000
|
||||
MSR 0x00000187 0x00000000 0x00000000
|
||||
MSR 0x000001AD 0x00000000 0x252A2A2A
|
||||
MSR 0x00000194 0x00000000 0x000F0000
|
||||
MSR 0x0000019A 0x00000000 0x00000000
|
||||
MSR 0x000001A4 0x00000000 0x00000000
|
||||
MSR 0x000001B1 0x00000000 0x884D0000
|
||||
MSR 0x000001FC 0x00000000 0x0014005D
|
||||
MSR 0x00000601 0x18141494 0x80001FFF
|
||||
MSR 0x00000602 0x18141494 0x80001FFF
|
||||
MSR 0x00000606 0x00000000 0x000A1003
|
||||
MSR 0x00000610 0x800087F8 0x001487F8
|
||||
MSR 0x00000611 0x00000000 0x96FDC342
|
||||
MSR 0x00000639 0x00000000 0x0C96E3AD
|
||||
MSR 0x00000641 0x00000000 0x0007636C
|
||||
MSR 0x00000614 0x00000000 0x01E00268
|
||||
MSR 0x0000019C 0x00000000 0x884D0000
|
||||
MSR 0x000001A2 0x00000000 0x00691400
|
||||
MSR 0x00000198 0x000024AB 0x00002A00
|
||||
MSR 0x00000199 0x00000000 0x0000FF00
|
@ -2,7 +2,7 @@
|
||||
// $Id$
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2011 Stanislav Shwartsman
|
||||
// Copyright (c) 2011-2012 Stanislav Shwartsman
|
||||
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
|
||||
//
|
||||
// This library is free software; you can redistribute it and/or
|
||||
@ -85,7 +85,7 @@ void corei7_sandy_bridge_2600k_t::get_cpuid_leaf(Bit32u function, Bit32u subfunc
|
||||
get_std_cpuid_leaf_2(leaf);
|
||||
return;
|
||||
case 0x00000003:
|
||||
get_std_cpuid_leaf_3(leaf);
|
||||
get_reserved_leaf(leaf);
|
||||
return;
|
||||
case 0x00000004:
|
||||
get_std_cpuid_leaf_4(subfunction, leaf);
|
||||
@ -401,15 +401,7 @@ void corei7_sandy_bridge_2600k_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) c
|
||||
leaf->edx = 0x00CA0000;
|
||||
}
|
||||
|
||||
// leaf 0x00000003 //
|
||||
void corei7_sandy_bridge_2600k_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000003 - Processor Serial Number
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
}
|
||||
// leaf 0x00000003 - Processor Serial Number (not supported) //
|
||||
|
||||
// leaf 0x00000004 //
|
||||
void corei7_sandy_bridge_2600k_t::get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const
|
||||
|
@ -50,7 +50,6 @@ private:
|
||||
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_3(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_5(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_6(cpuid_function_t *leaf) const;
|
||||
|
@ -42,6 +42,7 @@ bx_define_cpudb(corei5_lynnfield_750)
|
||||
bx_define_cpudb(corei5_arrandale_m520)
|
||||
#if BX_SUPPORT_AVX
|
||||
bx_define_cpudb(corei7_sandy_bridge_2600k)
|
||||
bx_define_cpudb(corei7_ivy_bridge_3770k)
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user