From 6d71bdb785ee878940eb5a803694c778fe041548 Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Mon, 2 Nov 2009 15:00:47 +0000 Subject: [PATCH] cleanups and optimizations --- bochs/cpu/apic.cc | 3 +- bochs/cpu/bit.cc | 4 +- bochs/cpu/crregs.h | 8 +--- bochs/cpu/flag_ctrl.cc | 74 ++++++++++++++--------------- bochs/cpu/soft_int.cc | 16 +++---- bochs/cpu/stack32.cc | 6 +-- bochs/cpu/vm8086.cc | 103 +++++++++-------------------------------- 7 files changed, 75 insertions(+), 139 deletions(-) diff --git a/bochs/cpu/apic.cc b/bochs/cpu/apic.cc index 720d67373..7a56b7fb4 100644 --- a/bochs/cpu/apic.cc +++ b/bochs/cpu/apic.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: apic.cc,v 1.130 2009-10-14 20:45:29 sshwarts Exp $ +// $Id: apic.cc,v 1.131 2009-11-02 15:00:47 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2002-2009 Zwane Mwaikambo, Stanislav Shwartsman @@ -991,6 +991,7 @@ void bx_local_apic_c::register_state(bx_param_c *parent) BXRS_HEX_PARAM_SIMPLE(lapic, timer_current); BXRS_HEX_PARAM_SIMPLE(lapic, timer_divconf); BXRS_DEC_PARAM_SIMPLE(lapic, timer_divide_factor); + BXRS_DEC_PARAM_SIMPLE(lapic, timer_handle); BXRS_PARAM_BOOL(lapic, timer_active, timer_active); BXRS_HEX_PARAM_SIMPLE(lapic, ticksInitial); BXRS_PARAM_BOOL(lapic, INTR, INTR); diff --git a/bochs/cpu/bit.cc b/bochs/cpu/bit.cc index f0e6fa69c..3009988c3 100644 --- a/bochs/cpu/bit.cc +++ b/bochs/cpu/bit.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: bit.cc,v 1.63 2009-03-22 21:23:12 sshwarts Exp $ +// $Id: bit.cc,v 1.64 2009-11-02 15:00:47 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -437,7 +437,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_EqGq(bxInstruction_c *i) } else { bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); - write_virtual_qword(i->seg(), eaddr, val64); + write_virtual_qword_64(i->seg(), eaddr, val64); } #else BX_INFO(("MOVBE_EqGq: required MOVBE support, use --enable-movbe option")); diff --git a/bochs/cpu/crregs.h b/bochs/cpu/crregs.h index 0fd619397..8dfa54b25 100755 --- a/bochs/cpu/crregs.h +++ b/bochs/cpu/crregs.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: crregs.h,v 1.19 2009-10-14 20:45:29 sshwarts Exp $ +// $Id: crregs.h,v 1.20 2009-11-02 15:00:47 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2007-2009 Stanislav Shwartsman @@ -105,12 +105,6 @@ struct bx_cr4_t { extern bx_address get_cr4_allow_mask(void); -#if BX_CPU_LEVEL >= 5 - #define BX_CR4_VME_ENABLED (BX_CPU_THIS_PTR cr4.get_VME()) -#else - #define BX_CR4_VME_ENABLED (0) -#endif - #if BX_SUPPORT_X86_64 struct bx_efer_t { diff --git a/bochs/cpu/flag_ctrl.cc b/bochs/cpu/flag_ctrl.cc index 70c6480cc..eb883cf5e 100644 --- a/bochs/cpu/flag_ctrl.cc +++ b/bochs/cpu/flag_ctrl.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: flag_ctrl.cc,v 1.46 2009-08-10 15:44:50 sshwarts Exp $ +// $Id: flag_ctrl.cc,v 1.47 2009-11-02 15:00:47 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2002 MandrakeSoft S.A. @@ -86,7 +86,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CLI(bxInstruction_c *i) { if (IOPL != 3) { #if BX_CPU_LEVEL >= 5 - if (BX_CR4_VME_ENABLED) { + if (BX_CPU_THIS_PTR cr4.get_VME()) { BX_CPU_THIS_PTR clear_VIF(); return; } @@ -129,7 +129,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::STI(bxInstruction_c *i) { if (IOPL != 3) { #if BX_CPU_LEVEL >= 5 - if (BX_CR4_VME_ENABLED && BX_CPU_THIS_PTR get_VIP() == 0) + if (BX_CPU_THIS_PTR cr4.get_VME() && BX_CPU_THIS_PTR get_VIP() == 0) { BX_CPU_THIS_PTR assert_VIF(); return; @@ -167,19 +167,22 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSHF_Fw(bxInstruction_c *i) Bit16u flags = (Bit16u) read_eflags(); if (v8086_mode()) { - if ((BX_CPU_THIS_PTR get_IOPL() < 3) && (BX_CR4_VME_ENABLED == 0)) { - BX_DEBUG(("PUSHFW: #GP(0) in v8086 (no VME) mode")); - exception(BX_GP_EXCEPTION, 0, 0); - } + if (BX_CPU_THIS_PTR get_IOPL() < 3) { #if BX_CPU_LEVEL >= 5 - if (BX_CR4_VME_ENABLED && BX_CPU_THIS_PTR get_IOPL() < 3) { - flags |= EFlagsIOPLMask; - if (BX_CPU_THIS_PTR get_VIF()) - flags |= EFlagsIFMask; + if (BX_CPU_THIS_PTR cr4.get_VME()) { + flags |= EFlagsIOPLMask; + if (BX_CPU_THIS_PTR get_VIF()) + flags |= EFlagsIFMask; + else + flags &= ~EFlagsIFMask; + } else - flags &= ~EFlagsIFMask; - } #endif + { + BX_DEBUG(("PUSHFW: #GP(0) in v8086 (no VME) mode")); + exception(BX_GP_EXCEPTION, 0, 0); + } + } } push_16(flags); @@ -189,10 +192,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::POPF_Fw(bxInstruction_c *i) { // Build a mask of the following bits: // x,NT,IOPL,OF,DF,IF,TF,SF,ZF,x,AF,x,PF,x,CF - Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask | EFlagsDFMask; -#if BX_CPU_LEVEL >= 3 - changeMask |= EFlagsNTMask; // NT could be modified -#endif + Bit32u changeMask = EFlagsOSZAPCMask | EFlagsTFMask | EFlagsDFMask | EFlagsNTMask; RSP_SPECULATIVE; @@ -205,31 +205,31 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::POPF_Fw(bxInstruction_c *i) changeMask |= EFlagsIFMask; } else if (v8086_mode()) { - if ((BX_CPU_THIS_PTR get_IOPL() < 3) && (BX_CR4_VME_ENABLED == 0)) { + if (BX_CPU_THIS_PTR get_IOPL() < 3) { +#if BX_CPU_LEVEL >= 5 + if (BX_CPU_THIS_PTR cr4.get_VME()) { + + if (((flags16 & EFlagsIFMask) && BX_CPU_THIS_PTR get_VIP()) || + (flags16 & EFlagsTFMask)) + { + BX_ERROR(("POPFW: #GP(0) in VME mode")); + exception(BX_GP_EXCEPTION, 0, 0); + } + + // IF, IOPL unchanged, EFLAGS.VIF = TMP_FLAGS.IF + changeMask |= EFlagsVIFMask; + Bit32u flags32 = (Bit32u) flags16; + if (BX_CPU_THIS_PTR get_IF()) flags32 |= EFlagsVIFMask; + writeEFlags(flags32, changeMask); + RSP_COMMIT; + return; + } +#endif BX_DEBUG(("POPFW: #GP(0) in v8086 (no VME) mode")); exception(BX_GP_EXCEPTION, 0, 0); } -#if BX_CPU_LEVEL >= 5 - if (BX_CR4_VME_ENABLED && BX_CPU_THIS_PTR get_IOPL() < 3) { - if (((flags16 & EFlagsIFMask) && BX_CPU_THIS_PTR get_VIP()) || - (flags16 & EFlagsTFMask)) - { - BX_ERROR(("POPFW: #GP(0) in VME mode")); - exception(BX_GP_EXCEPTION, 0, 0); - } - - // IF, IOPL unchanged, EFLAGS.VIF = TMP_FLAGS.IF - changeMask |= EFlagsVIFMask; - Bit32u flags32 = (Bit32u) flags16; - if (BX_CPU_THIS_PTR get_IF()) flags32 |= EFlagsVIFMask; - writeEFlags(flags32, changeMask); - RSP_COMMIT; - return; - } -#endif changeMask |= EFlagsIFMask; - } else { // All non-reserved flags can be modified diff --git a/bochs/cpu/soft_int.cc b/bochs/cpu/soft_int.cc index 75bc04d23..44ef80b06 100644 --- a/bochs/cpu/soft_int.cc +++ b/bochs/cpu/soft_int.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: soft_int.cc,v 1.54 2009-08-10 15:44:50 sshwarts Exp $ +// $Id: soft_int.cc,v 1.55 2009-11-02 15:00:47 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -37,13 +37,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::BOUND_GwMa(bxInstruction_c *i) { - Bit16s bound_min, bound_max; Bit16s op1_16 = BX_READ_16BIT_REG(i->nnn()); - bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); + Bit32u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); - bound_min = (Bit16s) read_virtual_word(i->seg(), eaddr); - bound_max = (Bit16s) read_virtual_word(i->seg(), eaddr+2); + Bit16s bound_min = (Bit16s) read_virtual_word_32(i->seg(), eaddr); + Bit16s bound_max = (Bit16s) read_virtual_word_32(i->seg(), eaddr+2); if (op1_16 < bound_min || op1_16 > bound_max) { BX_INFO(("BOUND_GdMa: fails bounds test")); @@ -53,13 +52,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::BOUND_GwMa(bxInstruction_c *i) void BX_CPP_AttrRegparmN(1) BX_CPU_C::BOUND_GdMa(bxInstruction_c *i) { - Bit32s bound_min, bound_max; Bit32s op1_32 = BX_READ_32BIT_REG(i->nnn()); - bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); + Bit32u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); - bound_min = (Bit32s) read_virtual_dword(i->seg(), eaddr); - bound_max = (Bit32s) read_virtual_dword(i->seg(), eaddr+4); + Bit32s bound_min = (Bit32s) read_virtual_dword_32(i->seg(), eaddr); + Bit32s bound_max = (Bit32s) read_virtual_dword_32(i->seg(), eaddr+4); if (op1_32 < bound_min || op1_32 > bound_max) { BX_INFO(("BOUND_GdMa: fails bounds test")); diff --git a/bochs/cpu/stack32.cc b/bochs/cpu/stack32.cc index 9abd6a471..2e781d94f 100644 --- a/bochs/cpu/stack32.cc +++ b/bochs/cpu/stack32.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: stack32.cc,v 1.62 2009-08-06 14:50:38 sshwarts Exp $ +// $Id: stack32.cc,v 1.63 2009-11-02 15:00:47 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -44,9 +44,9 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::POP_EdM(bxInstruction_c *i) // Note: there is one little weirdism here. It is possible to use // ESP in the modrm addressing. If used, the value of ESP after the // pop is used to calculate the address. - bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); + Bit32u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i)); - write_virtual_dword(i->seg(), eaddr, val32); + write_virtual_dword_32(i->seg(), eaddr, val32); RSP_COMMIT; } diff --git a/bochs/cpu/vm8086.cc b/bochs/cpu/vm8086.cc index e5fa6575b..54daee40d 100644 --- a/bochs/cpu/vm8086.cc +++ b/bochs/cpu/vm8086.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: vm8086.cc,v 1.56 2009-08-10 15:44:50 sshwarts Exp $ +// $Id: vm8086.cc,v 1.57 2009-11-02 15:00:47 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -98,6 +98,12 @@ void BX_CPU_C::stack_return_to_v86(Bit32u new_eip, Bit32u raw_cs_selector, Bit32 init_v8086_mode(); } +#if BX_CPU_LEVEL >= 5 + #define BX_CR4_VME_ENABLED (BX_CPU_THIS_PTR cr4.get_VME()) +#else + #define BX_CR4_VME_ENABLED (0) +#endif + void BX_CPU_C::iret16_stack_return_from_v86(bxInstruction_c *i) { if ((BX_CPU_THIS_PTR get_IOPL() < 3) && (BX_CR4_VME_ENABLED == 0)) { @@ -113,7 +119,7 @@ void BX_CPU_C::iret16_stack_return_from_v86(bxInstruction_c *i) flags16 = pop_16(); #if BX_CPU_LEVEL >= 5 - if (BX_CR4_VME_ENABLED && BX_CPU_THIS_PTR get_IOPL() < 3) + if (BX_CPU_THIS_PTR cr4.get_VME() && BX_CPU_THIS_PTR get_IOPL() < 3) { if (((flags16 & EFlagsIFMask) && BX_CPU_THIS_PTR get_VIP()) || (flags16 & EFlagsTFMask)) @@ -199,7 +205,7 @@ void BX_CPU_C::v86_redirect_interrupt(Bit32u vector) BX_CPU_THIS_PTR clear_TF(); BX_CPU_THIS_PTR clear_RF(); if (BX_CPU_THIS_PTR get_IOPL() == 3) - BX_CPU_THIS_PTR clear_IF (); + BX_CPU_THIS_PTR clear_IF(); else BX_CPU_THIS_PTR clear_VIF(); } @@ -207,90 +213,27 @@ void BX_CPU_C::v86_redirect_interrupt(Bit32u vector) void BX_CPU_C::init_v8086_mode(void) { - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.valid = SegValidCache | SegAccessROK | SegAccessWOK; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.p = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.dpl = 3; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.segment = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.type = BX_DATA_READ_WRITE_ACCESSED; + for(unsigned sreg = 0; sreg < 6; sreg++) { + BX_CPU_THIS_PTR sregs[sreg].cache.valid = SegValidCache | SegAccessROK | SegAccessWOK; + BX_CPU_THIS_PTR sregs[sreg].cache.p = 1; + BX_CPU_THIS_PTR sregs[sreg].cache.dpl = 3; + BX_CPU_THIS_PTR sregs[sreg].cache.segment = 1; + BX_CPU_THIS_PTR sregs[sreg].cache.type = BX_DATA_READ_WRITE_ACCESSED; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.base = - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value << 4; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled = 0xffff; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.g = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl = 3; + BX_CPU_THIS_PTR sregs[sreg].cache.u.segment.base = + BX_CPU_THIS_PTR sregs[sreg].selector.value << 4; + BX_CPU_THIS_PTR sregs[sreg].cache.u.segment.limit_scaled = 0xffff; + BX_CPU_THIS_PTR sregs[sreg].cache.u.segment.g = 0; + BX_CPU_THIS_PTR sregs[sreg].cache.u.segment.d_b = 0; + BX_CPU_THIS_PTR sregs[sreg].cache.u.segment.avl = 0; + BX_CPU_THIS_PTR sregs[sreg].selector.rpl = 3; + } handleCpuModeChange(); #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK handleAlignmentCheck(); // CPL was modified #endif - - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.valid = SegValidCache | SegAccessROK | SegAccessWOK; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.p = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.dpl = 3; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.segment = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.type = BX_DATA_READ_WRITE_ACCESSED; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base = - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value << 4; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled = 0xffff; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.g = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.avl = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.rpl = 3; - - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.valid = SegValidCache | SegAccessROK | SegAccessWOK; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.p = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.dpl = 3; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.segment = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.type = BX_DATA_READ_WRITE_ACCESSED; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.base = - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value << 4; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.limit_scaled = 0xffff; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.g = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.d_b = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.u.segment.avl = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.rpl = 3; - - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid = SegValidCache | SegAccessROK | SegAccessWOK; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.p = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.dpl = 3; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.segment = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.type = BX_DATA_READ_WRITE_ACCESSED; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.base = - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value << 4; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.limit_scaled = 0xffff; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.g = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.d_b = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.u.segment.avl = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.rpl = 3; - - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid = SegValidCache | SegAccessROK | SegAccessWOK; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.p = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.dpl = 3; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.segment = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.type = BX_DATA_READ_WRITE_ACCESSED; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.base = - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value << 4; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.limit_scaled = 0xffff; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.g = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.d_b = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.avl = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.rpl = 3; - - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid = SegValidCache | SegAccessROK | SegAccessWOK; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.p = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.dpl = 3; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.segment = 1; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.type = BX_DATA_READ_WRITE_ACCESSED; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.base = - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value << 4; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.limit_scaled = 0xffff; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.g = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.d_b = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.avl = 0; - BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.rpl = 3; } #endif /* BX_CPU_LEVEL >= 3 */