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Integrated patches/patch.logicalxx_asm from Jas Sandys-Lumsdaine.

Browse Source 
Essentially, when I coded a few of the instructions to use
  asm()s for acceleration of the eflags, I got lazy and only
  used the asm() to compute eflags and let the normal C operation
  do the actual operation.  Jas's patch, moved the asm()s such
  that they now do the work of the operation as well.

  The patches look great.  The code reads a lot better as well.

  Further work can be done to give the compiler more options with
  register scheduling.
This commit is contained in:
Kevin Lawton 2002-09-28 01:48:18 +00:00
parent 11139670ad
commit 6843c3dfe8
3 changed files with 109 additions and 85 deletions
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62
bochs/cpu/logical16.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: logical16.cc,v 1.11 2002-09-23 17:59:17 kevinlawton Exp $ // $Id: logical16.cc,v 1.12 2002-09-28 01:48:17 kevinlawton Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -289,15 +289,6 @@ BX_CPU_C::AND_EwGw(bxInstruction_c *i)
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
} }
result_16 = op1_16 & op2_16;
if (i->modC0()) {
BX_WRITE_16BIT_REG(i->rm(), result_16);
}
else {
Write_RMW_virtual_word(result_16);
}
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -313,6 +304,17 @@ BX_CPU_C::AND_EwGw(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result_16 = op1_16 & op2_16;
#endif
if (i->modC0()) {
BX_WRITE_16BIT_REG(i->rm(), result_16);
}
else {
Write_RMW_virtual_word(result_16);
}
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16);
#endif #endif
} }
@ -332,10 +334,6 @@ BX_CPU_C::AND_GwEw(bxInstruction_c *i)
read_virtual_word(i->seg(), RMAddr(i), &op2_16); read_virtual_word(i->seg(), RMAddr(i), &op2_16);
} }
result_16 = op1_16 & op2_16;
BX_WRITE_16BIT_REG(i->nnn(), result_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -351,6 +349,12 @@ BX_CPU_C::AND_GwEw(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result_16 = op1_16 & op2_16;
#endif
BX_WRITE_16BIT_REG(i->nnn(), result_16);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16);
#endif #endif
} }
@ -365,10 +369,6 @@ BX_CPU_C::AND_AXIw(bxInstruction_c *i)
op2_16 = i->Iw(); op2_16 = i->Iw();
result_16 = op1_16 & op2_16;
AX = result_16;
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -384,6 +384,12 @@ BX_CPU_C::AND_AXIw(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result_16 = op1_16 & op2_16;
#endif
AX = result_16;
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16);
#endif #endif
} }
@ -402,15 +408,6 @@ BX_CPU_C::AND_EwIw(bxInstruction_c *i)
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16); read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
} }
result_16 = op1_16 & op2_16;
if (i->modC0()) {
BX_WRITE_16BIT_REG(i->rm(), result_16);
}
else {
Write_RMW_virtual_word(result_16);
}
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -426,6 +423,17 @@ BX_CPU_C::AND_EwIw(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result_16 = op1_16 & op2_16;
#endif
if (i->modC0()) {
BX_WRITE_16BIT_REG(i->rm(), result_16);
}
else {
Write_RMW_virtual_word(result_16);
}
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, result_16, BX_INSTR_AND16);
#endif #endif
} }

70
bochs/cpu/logical32.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: logical32.cc,v 1.12 2002-09-23 17:59:17 kevinlawton Exp $ // $Id: logical32.cc,v 1.13 2002-09-28 01:48:17 kevinlawton Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -294,15 +294,6 @@ BX_CPU_C::AND_EdGd(bxInstruction_c *i)
read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
} }
result_32 = op1_32 & op2_32;
if (i->modC0()) {
BX_WRITE_32BIT_REGZ(i->rm(), result_32);
}
else {
Write_RMW_virtual_dword(result_32);
}
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -318,6 +309,17 @@ BX_CPU_C::AND_EdGd(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result_32 = op1_32 & op2_32;
#endif
if (i->modC0()) {
BX_WRITE_32BIT_REGZ(i->rm(), result_32);
}
else {
Write_RMW_virtual_dword(result_32);
}
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32);
#endif #endif
} }
@ -337,10 +339,6 @@ BX_CPU_C::AND_GdEd(bxInstruction_c *i)
read_virtual_dword(i->seg(), RMAddr(i), &op2_32); read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
} }
result_32 = op1_32 & op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), result_32);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -356,6 +354,12 @@ BX_CPU_C::AND_GdEd(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result_32 = op1_32 & op2_32;
#endif
BX_WRITE_32BIT_REGZ(i->nnn(), result_32);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32);
#endif #endif
} }
@ -370,14 +374,6 @@ BX_CPU_C::AND_EAXId(bxInstruction_c *i)
op2_32 = i->Id(); op2_32 = i->Id();
result_32 = op1_32 & op2_32;
#if BX_SUPPORT_X86_64
RAX = result_32;
#else
EAX = result_32;
#endif
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -393,6 +389,16 @@ BX_CPU_C::AND_EAXId(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result_32 = op1_32 & op2_32;
#endif
#if BX_SUPPORT_X86_64
RAX = result_32;
#else
EAX = result_32;
#endif
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32);
#endif #endif
} }
@ -412,15 +418,6 @@ BX_CPU_C::AND_EdId(bxInstruction_c *i)
read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32); read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
} }
result_32 = op1_32 & op2_32;
if (i->modC0()) {
BX_WRITE_32BIT_REGZ(i->rm(), result_32);
}
else {
Write_RMW_virtual_dword(result_32);
}
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -436,6 +433,17 @@ BX_CPU_C::AND_EdId(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result_32 = op1_32 & op2_32;
#endif
if (i->modC0()) {
BX_WRITE_32BIT_REGZ(i->rm(), result_32);
}
else {
Write_RMW_virtual_dword(result_32);
}
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, result_32, BX_INSTR_AND32);
#endif #endif
} }

62
bochs/cpu/logical8.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: logical8.cc,v 1.13 2002-09-23 17:59:18 kevinlawton Exp $ // $Id: logical8.cc,v 1.14 2002-09-28 01:48:18 kevinlawton Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -290,15 +290,6 @@ BX_CPU_C::AND_EbGb(bxInstruction_c *i)
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1); read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
} }
result = op1 & op2;
if (i->modC0()) {
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
}
else {
Write_RMW_virtual_byte(result);
}
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -314,6 +305,17 @@ BX_CPU_C::AND_EbGb(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result = op1 & op2;
#endif
if (i->modC0()) {
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
}
else {
Write_RMW_virtual_byte(result);
}
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif #endif
} }
@ -333,10 +335,6 @@ BX_CPU_C::AND_GbEb(bxInstruction_c *i)
read_virtual_byte(i->seg(), RMAddr(i), &op2); read_virtual_byte(i->seg(), RMAddr(i), &op2);
} }
result = op1 & op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -352,6 +350,12 @@ BX_CPU_C::AND_GbEb(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result = op1 & op2;
#endif
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif #endif
} }
@ -367,10 +371,6 @@ BX_CPU_C::AND_ALIb(bxInstruction_c *i)
op2 = i->Ib(); op2 = i->Ib();
result = op1 & op2;
AL = result;
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -386,6 +386,12 @@ BX_CPU_C::AND_ALIb(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result = op1 & op2;
#endif
AL = result;
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif #endif
} }
@ -408,15 +414,6 @@ BX_CPU_C::AND_EbIb(bxInstruction_c *i)
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1); read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
} }
result = op1 & op2;
if (i->modC0()) {
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
}
else {
Write_RMW_virtual_byte(result);
}
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asm ( asm (
@ -432,6 +429,17 @@ BX_CPU_C::AND_EbIb(bxInstruction_c *i)
(flags32 & EFlagsOSZAPCMask); (flags32 & EFlagsOSZAPCMask);
BX_CPU_THIS_PTR lf_flags_status = 0; BX_CPU_THIS_PTR lf_flags_status = 0;
#else #else
result = op1 & op2;
#endif
if (i->modC0()) {
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
}
else {
Write_RMW_virtual_byte(result);
}
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8); SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif #endif
} }