Implemented FCMOVcc instructions.

Removed undocumented FPU opcodes, they are not supported by real CPUs
This commit is contained in:
Stanislav Shwartsman 2003-11-01 18:36:19 +00:00
parent 6c398a7170
commit 66549cc16b
9 changed files with 274 additions and 124 deletions

View File

@ -60,16 +60,12 @@ C_OBJS = fpu_entry.o errors.o reg_ld_str.o load_store.o \
fpu_arith.o fpu_aux.o fpu_etc.o fpu_tags.o fpu_trig.o \
poly_atan.o poly_l2.o poly_2xm1.o poly_sin.o poly_tan.o \
reg_add_sub.o reg_compare.o reg_constant.o reg_convert.o \
reg_divide.o reg_mul.o
# From 80x86 assembler sources:
A_OBJS =reg_u_add.o reg_u_div.o reg_u_mul.o reg_u_sub.o \
reg_norm.o reg_round.o \
wm_shrx.o wm_sqrt.o \
div_Xsig.o polynom_Xsig.o round_Xsig.o \
reg_divide.o reg_mul.o fpu_compare.o reg_u_add.o \
reg_u_div.o reg_u_mul.o reg_u_sub.o reg_norm.o reg_round.o \
wm_shrx.o wm_sqrt.o div_Xsig.o polynom_Xsig.o round_Xsig.o \
shr_Xsig.o mul_Xsig.o
L_OBJS = $(C_OBJS) $(A_OBJS)
L_OBJS = $(C_OBJS)
OBJS = \
@FPU_GLUE_OBJ@ \
@ -113,6 +109,8 @@ fpu_arith.o: fpu_arith.c fpu_system.h fpu_emu.h fpu_proto.h \
control_w.h status_w.h
fpu_aux.o: fpu_aux.c fpu_system.h exception.h fpu_emu.h fpu_proto.h \
status_w.h control_w.h
fpu_compare.o: fpu_compare.c fpu_system.h exception.h fpu_emu.h fpu_proto.h \
status_w.h control_w.h
fpu_entry.o: fpu_entry.c fpu_system.h fpu_emu.h fpu_proto.h \
exception.h control_w.h status_w.h
fpu_etc.o: fpu_etc.c fpu_system.h exception.h fpu_emu.h fpu_proto.h \

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@ -1,6 +1,6 @@
/*---------------------------------------------------------------------------+
| errors.c |
| $Id: errors.c,v 1.14 2003-10-31 11:06:23 sshwarts Exp $
| $Id: errors.c,v 1.15 2003-11-01 18:36:19 sshwarts Exp $
| |
| The error handling functions for wm-FPU-emu |
| |
@ -612,8 +612,3 @@ void FPU_stack_underflow_pop(int i)
EXCEPTION(EX_StackUnder);
}
int printk(const char * fmt, ...)
{
return(0);
}

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@ -1,6 +1,6 @@
/*---------------------------------------------------------------------------+
| fpu_arith.c |
| $Id: fpu_arith.c,v 1.4 2003-07-31 21:07:38 sshwarts Exp $
| $Id: fpu_arith.c,v 1.5 2003-11-01 18:36:19 sshwarts Exp $
| |
| Code to implement the FPU register/register arithmetic instructions |
| |
@ -25,7 +25,6 @@ void fadd__()
FPU_add(&st(i), FPU_gettagi(i), 0, FPU_control_word);
}
void fmul__()
{
/* fmul st,st(i) */
@ -34,8 +33,6 @@ void fmul__()
FPU_mul(&st(i), FPU_gettagi(i), 0, FPU_control_word);
}
void fsub__()
{
/* fsub st,st(i) */
@ -43,7 +40,6 @@ void fsub__()
FPU_sub(0, REGNO2PTR(FPU_rm), FPU_control_word);
}
void fsubr_()
{
/* fsubr st,st(i) */
@ -51,7 +47,6 @@ void fsubr_()
FPU_sub(REV, REGNO2PTR(FPU_rm), FPU_control_word);
}
void fdiv__()
{
/* fdiv st,st(i) */
@ -59,7 +54,6 @@ void fdiv__()
FPU_div(0, REGNO2PTR(FPU_rm), FPU_control_word);
}
void fdivr_()
{
/* fdivr st,st(i) */
@ -67,8 +61,6 @@ void fdivr_()
FPU_div(REV, REGNO2PTR(FPU_rm), FPU_control_word);
}
void fadd_i()
{
/* fadd st(i),st */
@ -77,7 +69,6 @@ void fadd_i()
FPU_add(&st(i), FPU_gettagi(i), i, FPU_control_word);
}
void fmul_i()
{
/* fmul st(i),st */
@ -85,7 +76,6 @@ void fmul_i()
FPU_mul(&st(0), FPU_gettag0(), FPU_rm, FPU_control_word);
}
void fsubri()
{
/* fsubr st(i),st */
@ -93,7 +83,6 @@ void fsubri()
FPU_sub(DEST_RM, REGNO2PTR(FPU_rm), FPU_control_word);
}
void fsub_i()
{
/* fsub st(i),st */
@ -101,7 +90,6 @@ void fsub_i()
FPU_sub(REV|DEST_RM, REGNO2PTR(FPU_rm), FPU_control_word);
}
void fdivri()
{
/* fdivr st(i),st */
@ -109,7 +97,6 @@ void fdivri()
FPU_div(DEST_RM, REGNO2PTR(FPU_rm), FPU_control_word);
}
void fdiv_i()
{
/* fdiv st(i),st */
@ -117,8 +104,6 @@ void fdiv_i()
FPU_div(REV|DEST_RM, REGNO2PTR(FPU_rm), FPU_control_word);
}
void faddp_()
{
/* faddp st(i),st */
@ -128,7 +113,6 @@ void faddp_()
FPU_pop();
}
void fmulp_()
{
/* fmulp st(i),st */
@ -137,8 +121,6 @@ void fmulp_()
FPU_pop();
}
void fsubrp()
{
/* fsubrp st(i),st */
@ -147,7 +129,6 @@ void fsubrp()
FPU_pop();
}
void fsubp_()
{
/* fsubp st(i),st */
@ -156,7 +137,6 @@ void fsubp_()
FPU_pop();
}
void fdivrp()
{
/* fdivrp st(i),st */
@ -165,7 +145,6 @@ void fdivrp()
FPU_pop();
}
void fdivp_()
{
/* fdivp st(i),st */

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@ -1,6 +1,6 @@
/*---------------------------------------------------------------------------+
| fpu_aux.c |
| $Id: fpu_aux.c,v 1.6 2003-10-04 16:47:57 sshwarts Exp $
| $Id: fpu_aux.c,v 1.7 2003-11-01 18:36:19 sshwarts Exp $
| |
| Code to implement some of the FPU auxiliary instructions. |
| |
@ -61,10 +61,9 @@ void finit_()
(finit_table[FPU_rm])();
}
static void fstsw_ax(void)
{
SET_AX(status_word());
fpu_set_ax(status_word());
no_ip_update = 1;
}
@ -89,7 +88,6 @@ void fp_nop()
(fp_nop_table[FPU_rm])();
}
void fld_i_()
{
FPU_REG *st_new_ptr;
@ -123,7 +121,6 @@ void fld_i_()
}
void fxch_i()
{
/* fxch st(i) */
@ -135,6 +132,8 @@ void fxch_i()
u_char st0_tag = (tag_word >> (regnr*2)) & 3;
u_char sti_tag = (tag_word >> (regnri*2)) & 3;
clear_C1();
if ( st0_tag == TAG_Empty )
{
if ( sti_tag == TAG_Empty )
@ -161,7 +160,6 @@ void fxch_i()
FPU_stack_underflow();
return;
}
clear_C1();
reg_copy(st0_ptr, &t);
reg_copy(sti_ptr, st0_ptr);
@ -172,29 +170,18 @@ void fxch_i()
FPU_tag_word = tag_word;
}
void ffree_()
{
/* ffree st(i) */
FPU_settagi(FPU_rm, TAG_Empty);
}
void ffreep()
{
/* ffree st(i) + pop - unofficial code */
FPU_settagi(FPU_rm, TAG_Empty);
FPU_pop();
}
void fst_i_()
{
/* fst st(i) */
FPU_copy_to_regi(&st(0), FPU_gettag0(), FPU_rm);
}
void fstp_i()
{
/* fstp st(i) */

184
bochs/fpu/fpu_compare.c Executable file
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@ -0,0 +1,184 @@
/*---------------------------------------------------------------------------+
| fpu_compare.c |
| $Id: fpu_compare.c,v 1.1 2003-11-01 18:36:19 sshwarts Exp $
| |
| Code to implement FMOVcc and other P6 FPU instructions. |
| |
+---------------------------------------------------------------------------*/
#include "fpu_system.h"
#include "exception.h"
#include "fpu_emu.h"
#include "status_w.h"
/* EFLAGS: */
/* 31|30|29|28|27|26|25|24|23|22|21|20|19|18|17|16
* ==|==|=====|==|==|==|==|==|==|==|==|==|==|==|==
* 0| 0| 0| 0| 0| 0| 0| 0| 0| 0|ID|VP|VF|AC|VM|RF
*
* 15|14|13|12|11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1| 0
* ==|==|=====|==|==|==|==|==|==|==|==|==|==|==|==
* 0|NT| IOPL|OF|DF|IF|TF|SF|ZF| 0|AF| 0|PF| 1|CF
*/
#define EFLAGS_CF 0x01
#define EFLAGS_PF 0x04
#define EFLAGS_AF 0x10
#define EFLAGS_ZF 0x40
void FPU_fcmovb()
{
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
u_char st0_tag = FPU_gettagi(0);
u_char sti_tag = FPU_gettagi(i);
u32 eflags = fpu_get_eflags();
if (st0_tag == TAG_Empty || sti_tag == TAG_Empty) {
clear_C1();
FPU_stack_underflow();
}
if (eflags & EFLAGS_CF)
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
void FPU_fcmove()
{
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
u_char st0_tag = FPU_gettagi(0);
u_char sti_tag = FPU_gettagi(i);
u32 eflags = fpu_get_eflags();
if (st0_tag == TAG_Empty || sti_tag == TAG_Empty) {
clear_C1();
FPU_stack_underflow();
}
if (eflags & EFLAGS_ZF)
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
void FPU_fcmovbe()
{
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
u_char st0_tag = FPU_gettagi(0);
u_char sti_tag = FPU_gettagi(i);
u32 eflags = fpu_get_eflags();
if (st0_tag == TAG_Empty || sti_tag == TAG_Empty) {
clear_C1();
FPU_stack_underflow();
}
if (eflags & (EFLAGS_ZF | EFLAGS_CF))
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
void FPU_fcmovu()
{
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
u_char st0_tag = FPU_gettagi(0);
u_char sti_tag = FPU_gettagi(i);
u32 eflags = fpu_get_eflags();
if (st0_tag == TAG_Empty || sti_tag == TAG_Empty) {
clear_C1();
FPU_stack_underflow();
}
if (eflags & EFLAGS_PF)
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
void FPU_fcmovnb()
{
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
u_char st0_tag = FPU_gettagi(0);
u_char sti_tag = FPU_gettagi(i);
u32 eflags = fpu_get_eflags();
if (st0_tag == TAG_Empty || sti_tag == TAG_Empty) {
clear_C1();
FPU_stack_underflow();
}
if (!(eflags & EFLAGS_CF))
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
void FPU_fcmovne()
{
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
u_char st0_tag = FPU_gettagi(0);
u_char sti_tag = FPU_gettagi(i);
u32 eflags = fpu_get_eflags();
if (st0_tag == TAG_Empty || sti_tag == TAG_Empty) {
clear_C1();
FPU_stack_underflow();
}
if (!(eflags & EFLAGS_ZF))
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
void FPU_fcmovnbe()
{
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
u_char st0_tag = FPU_gettagi(0);
u_char sti_tag = FPU_gettagi(i);
u32 eflags = fpu_get_eflags();
if (st0_tag == TAG_Empty || sti_tag == TAG_Empty) {
clear_C1();
FPU_stack_underflow();
}
if (!(eflags & EFLAGS_CF) && !(eflags & EFLAGS_ZF))
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
void FPU_fcmovnu()
{
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
u_char st0_tag = FPU_gettagi(0);
u_char sti_tag = FPU_gettagi(i);
u32 eflags = fpu_get_eflags();
if (st0_tag == TAG_Empty || sti_tag == TAG_Empty) {
clear_C1();
FPU_stack_underflow();
}
if (!(eflags & EFLAGS_PF))
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
void FPU_fucomip()
{
printk("WARNING: FUCOMIP instruction still not implemented");
}
void FPU_fcomip()
{
printk("WARNING: FCOMIP instruction still not implemented");
}
void FPU_fucomi()
{
printk("WARNING: FUCOMI instruction still not implemented");
}
void FPU_fcomi()
{
printk("WARNING: FCOMI instruction still not implemented");
}

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@ -1,6 +1,6 @@
/*---------------------------------------------------------------------------+
| fpu_entry.c |
| $Id: fpu_entry.c,v 1.17 2003-10-04 12:32:56 sshwarts Exp $
| $Id: fpu_entry.c,v 1.18 2003-11-01 18:36:19 sshwarts Exp $
| |
| The entry functions for wm-FPU-emu |
| |
@ -35,49 +35,33 @@
#define __BAD__ FPU_illegal /* Illegal on an 80486, causes SIGILL */
#ifndef NO_UNDOC_CODE /* Un-documented FPU op-codes supported by default. */
/* WARNING: These codes are not documented by Intel in their 80486 manual
and may not work on FPU clones or later Intel FPUs. */
/* Changes to support the un-doc codes provided by Linus Torvalds. */
#define _d9_d8_ fstp_i /* unofficial code (19) */
#define _dc_d0_ fcom_st /* unofficial code (14) */
#define _dc_d8_ fcompst /* unofficial code (1c) */
#define _dd_c8_ fxch_i /* unofficial code (0d) */
#define _de_d0_ fcompst /* unofficial code (16) */
#define _df_c0_ ffreep /* unofficial code (07) ffree + pop */
#define _df_c8_ fxch_i /* unofficial code (0f) */
#define _df_d0_ fstp_i /* unofficial code (17) */
#define _df_d8_ fstp_i /* unofficial code (1f) */
#if BX_CPU_LEVEL < 6
static FUNC const st_instr_table[64] = {
fadd__, fld_i_, __BAD__, __BAD__, fadd_i, ffree_, faddp_, _df_c0_,
fmul__, fxch_i, __BAD__, __BAD__, fmul_i, _dd_c8_, fmulp_, _df_c8_,
fcom_st, fp_nop, __BAD__, __BAD__, _dc_d0_, fst_i_, _de_d0_, _df_d0_,
fcompst, _d9_d8_, __BAD__, __BAD__, _dc_d8_, fstp_i, fcompp, _df_d8_,
fsub__, FPU_etc, __BAD__, finit_, fsubri, fucom_, fsubrp, fstsw_,
fsubr_, fconst, fucompp, __BAD__, fsub_i, fucomp, fsubp_, __BAD__,
fdiv__, FPU_triga, __BAD__, __BAD__, fdivri, __BAD__, fdivrp, __BAD__,
fdivr_, FPU_trigb, __BAD__, __BAD__, fdiv_i, __BAD__, fdivp_, __BAD__,
fadd__, fld_i_, __BAD__, __BAD__, fadd_i, ffree_, faddp_, __BAD__,
fmul__, fxch_i, __BAD__, __BAD__, fmul_i, __BAD__, fmulp_, __BAD__,
fcom_st, fp_nop, __BAD__, __BAD__, __BAD__, fst_i_, __BAD__, __BAD__,
fcompst, __BAD__, __BAD__, __BAD__, __BAD__, fstp_i, fcompp, __BAD__,
fsub__, FPU_etc, __BAD__, finit_, fsubri, fucom_, fsubrp, fstsw_,
fsubr_, fconst, fucompp, __BAD__, fsub_i, fucomp, fsubp_, __BAD__,
fdiv__, FPU_triga, __BAD__, __BAD__, fdivri, __BAD__, fdivrp, __BAD__,
fdivr_, FPU_trigb, __BAD__, __BAD__, fdiv_i, __BAD__, fdivp_, __BAD__,
};
#else /* Support only documented FPU op-codes */
#else
static FUNC const st_instr_table[64] = {
fadd__, fld_i_, __BAD__, __BAD__, fadd_i, ffree_, faddp_, __BAD__,
fmul__, fxch_i, __BAD__, __BAD__, fmul_i, __BAD__, fmulp_, __BAD__,
fcom_st, fp_nop, __BAD__, __BAD__, __BAD__, fst_i_, __BAD__, __BAD__,
fcompst, __BAD__, __BAD__, __BAD__, __BAD__, fstp_i, fcompp, __BAD__,
fsub__, FPU_etc, __BAD__, finit_, fsubri, fucom_, fsubrp, fstsw_,
fsubr_, fconst, fucompp, __BAD__, fsub_i, fucomp, fsubp_, __BAD__,
fdiv__, FPU_triga, __BAD__, __BAD__, fdivri, __BAD__, fdivrp, __BAD__,
fdivr_, FPU_trigb, __BAD__, __BAD__, fdiv_i, __BAD__, fdivp_, __BAD__,
fadd__, fld_i_, FPU_fcmovb, FPU_fcmovnb, fadd_i, ffree_, faddp_, __BAD__,
fmul__, fxch_i, FPU_fcmove, FPU_fcmovne, fmul_i, __BAD__, fmulp_, __BAD__,
fcom_st, fp_nop, FPU_fcmovbe, FPU_fcmovnbe, __BAD__, fst_i_, __BAD__, __BAD__,
fcompst, __BAD__, FPU_fcmovu, FPU_fcmovnu, __BAD__, fstp_i, fcompp, __BAD__,
fsub__, FPU_etc, __BAD__, finit_, fsubri, fucom_, fsubrp, fstsw_,
fsubr_, fconst, fucompp, FPU_fucomi, fsub_i, fucomp, fsubp_, FPU_fucomip,
fdiv__, FPU_triga, __BAD__, FPU_fcomi, fdivri, __BAD__, fdivrp, FPU_fcomip,
fdivr_, FPU_trigb, __BAD__, __BAD__, fdiv_i, __BAD__, fdivp_, __BAD__,
};
#endif /* NO_UNDOC_CODE */
#endif
#define _NONE_ 0 /* Take no special action */
#define _REG0_ 1 /* Need to check for not empty st(0) */
@ -90,22 +74,7 @@ static FUNC const st_instr_table[64] = {
#define _REGIc 0 /* Compare st(0) and st(rm) */
#define _REGIn 0 /* Uses st(0) and st(rm), but handle checks later */
#ifndef NO_UNDOC_CODE
/* Un-documented FPU op-codes supported by default. (see above) */
static u_char const type_table[64] = {
_REGI_, _NONE_, _null_, _null_, _REGIi, _REGi_, _REGIp, _REGi_,
_REGI_, _REGIn, _null_, _null_, _REGIi, _REGI_, _REGIp, _REGI_,
_REGIc, _NONE_, _null_, _null_, _REGIc, _REG0_, _REGIc, _REG0_,
_REGIc, _REG0_, _null_, _null_, _REGIc, _REG0_, _REGIc, _REG0_,
_REGI_, _NONE_, _null_, _NONE_, _REGIi, _REGIc, _REGIp, _NONE_,
_REGI_, _NONE_, _REGIc, _null_, _REGIi, _REGIc, _REGIp, _null_,
_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_,
_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_
};
#else /* Support only documented FPU op-codes */
#if BX_CPU_LEVEL < 6
static u_char const type_table[64] = {
_REGI_, _NONE_, _null_, _null_, _REGIi, _REGi_, _REGIp, _null_,
@ -118,8 +87,20 @@ static u_char const type_table[64] = {
_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_
};
#endif /* NO_UNDOC_CODE */
#else
static u_char const type_table[64] = {
_REGI_, _NONE_, _REGIn, _REGIn, _REGIi, _REGi_, _REGIp, _null_,
_REGI_, _REGIn, _REGIn, _REGIn, _REGIi, _null_, _REGIp, _null_,
_REGIc, _NONE_, _REGIn, _REGIn, _null_, _REG0_, _null_, _null_,
_REGIc, _null_, _REGIn, _REGIn, _null_, _REG0_, _REGIc, _null_,
_REGI_, _NONE_, _null_, _NONE_, _REGIi, _REGIc, _REGIp, _NONE_,
_REGI_, _NONE_, _REGIc, _REGIc, _REGIi, _REGIc, _REGIp, _REGIc,
_REGI_, _NONE_, _null_, _REGIc, _REGIi, _null_, _REGIp, _REGIc,
_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_
};
#endif
/* Note, this is a version of fpu_entry.c, modified to interface
* to a CPU simulator, rather than a kernel.

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@ -80,7 +80,6 @@ extern void fp_nop(void);
extern void fld_i_(void);
extern void fxch_i(void);
extern void ffree_(void);
extern void ffreep(void);
extern void fst_i_(void);
extern void fstp_i(void);
/* fpu_entry.c */
@ -165,4 +164,18 @@ extern int FPU_div(int flags, FPU_REG *regrm, int control_w);
/* reg_convert.c */
extern int FPU_to_exp16(FPU_REG const *a, FPU_REG *x) BX_CPP_AttrRegparmN(2);
/* fpu_compare.c */
extern void FPU_fcmovb();
extern void FPU_fcmove();
extern void FPU_fcmovbe();
extern void FPU_fcmovu();
extern void FPU_fcmovnb();
extern void FPU_fcmovne();
extern void FPU_fcmovnbe();
extern void FPU_fcmovnu();
extern void FPU_fucomip();
extern void FPU_fcomip();
extern void FPU_fucomi();
extern void FPU_fcomi();
#endif /* _FPU_PROTO_H */

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@ -1,6 +1,6 @@
/*---------------------------------------------------------------------------+
| fpu_system.h |
| $Id: fpu_system.h,v 1.19 2003-10-05 12:14:02 sshwarts Exp $
| $Id: fpu_system.h,v 1.20 2003-11-01 18:36:19 sshwarts Exp $
| |
| Copyright (C) 1992,1994,1997 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
@ -48,11 +48,13 @@ typedef Bit8u u_char;
*/
#endif
extern unsigned fpu_get_user(bx_address ptr, unsigned len) BX_CPP_AttrRegparmN(2);
extern void fpu_put_user(unsigned val, bx_address ptr, unsigned len) BX_CPP_AttrRegparmN(3);
extern u32 fpu_get_user(bx_address ptr, unsigned len) BX_CPP_AttrRegparmN(2);
extern void fpu_put_user(u32 val, bx_address ptr, unsigned len) BX_CPP_AttrRegparmN(3);
extern void fpu_verify_area(unsigned what, bx_address ptr, unsigned n) BX_CPP_AttrRegparmN(3);
extern unsigned fpu_get_ds(void);
extern void fpu_set_ax(u16);
extern void fpu_set_ax(u16 ax);
extern u32 fpu_get_eflags();
extern void fpu_set_eflags(u32 eflags);
#define SIGSEGV 11
@ -60,8 +62,6 @@ extern struct i387_t *current_i387;
#define i387 (*current_i387)
#define SET_AX(val16) fpu_set_ax(val16);
#define no_ip_update (*(u_char *)&(i387.no_update))
#define FPU_rm (*(u_char *)&(i387.rm))

View File

@ -123,11 +123,11 @@ BX_CPU_C::fpu_execute(bxInstruction_c *i)
data_sel_off, entry_sel_off);
}
static double sigh_scale_factor = pow(2.0, -31.0);
static double sigl_scale_factor = pow(2.0, -63.0);
void BX_CPU_C::print_state_FPU()
{
static double sigh_scale_factor = pow(2.0, -31.0);
static double sigl_scale_factor = pow(2.0, -63.0);
Bit32u reg;
reg = i387.cwd;
fprintf(stderr, "cwd 0x%-8x\t%d\n", (unsigned) reg, (int) reg);
@ -162,13 +162,21 @@ fpu_get_ds(void)
}
void
fpu_set_ax(unsigned short val16)
fpu_set_ax(Bit16u val16)
{
// define to set AX in the current CPU -- not ideal.
#undef AX
#define AX (fpu_cpu_ptr->gen_reg[0].word.rx)
AX = val16;
#undef AX
fpu_cpu_ptr->set_AX(val16);
}
void
fpu_set_eflags(Bit32u val32)
{
fpu_cpu_ptr->writeEFlags(val32, 0xFFFFFFFF);
}
Bit32u
fpu_get_eflags(void)
{
return fpu_cpu_ptr->read_eflags();
}
void BX_CPP_AttrRegparmN(3)
@ -186,7 +194,7 @@ fpu_verify_area(unsigned what, bx_address ptr, unsigned n)
}
}
unsigned BX_CPP_AttrRegparmN(2)
Bit32u BX_CPP_AttrRegparmN(2)
fpu_get_user(bx_address ptr, unsigned len)
{
Bit32u val32;
@ -212,7 +220,7 @@ fpu_get_user(bx_address ptr, unsigned len)
}
void BX_CPP_AttrRegparmN(3)
fpu_put_user(unsigned val, bx_address ptr, unsigned len)
fpu_put_user(Bit32u val, bx_address ptr, unsigned len)
{
Bit32u val32;
Bit16u val16;
@ -273,3 +281,8 @@ math_abort(void *info, unsigned int signal)
BX_INFO(("math_abort: CPU<4 not supported yet"));
#endif
}
extern "C" int printk(const char * fmt, ...)
{
BX_INFO(("math abort: %s", fmt));
}