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Remove repeat speedups from 16-bit address size methods - they not gonna speed up anyway because of segment limit issue

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This commit is contained in:
Stanislav Shwartsman 2008-06-25 10:34:21 +00:00
parent c1f308d80d
commit 65275ffc02
6 changed files with 41 additions and 157 deletions
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5
bochs/cpu/fetchdecode.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode.cc,v 1.193 2008-06-23 02:56:31 sshwarts Exp $
// $Id: fetchdecode.cc,v 1.194 2008-06-25 10:34:20 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -2931,7 +2931,10 @@ modrm_done:
i->setB1(b1);
i->setILen(ilen);
#if BX_INSTRUMENTATION
i->ia_opcode = ia_opcode;
BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
#endif
return(1);
}

5
bochs/cpu/fetchdecode64.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode64.cc,v 1.202 2008-06-23 02:56:31 sshwarts Exp $
// $Id: fetchdecode64.cc,v 1.203 2008-06-25 10:34:20 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -3852,7 +3852,10 @@ modrm_done:
i->setB1(b1);
i->setILen(ilen);
#if BX_INSTRUMENTATION
i->ia_opcode = ia_opcode;
BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
#endif
return(1);
}

5
bochs/cpu/instr.h
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: instr.h,v 1.11 2008-04-14 21:48:35 sshwarts Exp $
// $Id: instr.h,v 1.12 2008-06-25 10:34:21 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2008 Stanislav Shwartsman
@ -45,6 +45,9 @@ public:
// the memory address (if any).
BxExecutePtr_tR ResolveModrm;
BxExecutePtr_tR execute;
#if BX_INSTRUMENTATION
Bit16u ia_opcode;
#endif
struct {
// 7...2 (unused)

87
bochs/cpu/io.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: io.cc,v 1.61 2008-06-12 20:12:25 sshwarts Exp $
// $Id: io.cc,v 1.62 2008-06-25 10:34:21 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -341,59 +341,25 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INSW16_YwDX(bxInstruction_c *i)
{
Bit16u value16=0;
Bit16u di = DI;
unsigned incr = 2;
if (! BX_CPU_THIS_PTR allow_io(DX, 2)) {
BX_DEBUG(("INSW16_YwDX: I/O access not allowed !"));
exception(BX_GP_EXCEPTION, 0, 0);
}
#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
/* If conditions are right, we can transfer IO to physical memory
* in a batch, rather than one instruction at a time.
*/
if (i->repUsedL() && !BX_CPU_THIS_PTR async_event)
{
Bit32u wordCount = CX;
BX_ASSERT(wordCount > 0);
wordCount = FastRepINSW(i, di, DX, wordCount);
if (wordCount) {
// Decrement the ticks count by the number of iterations, minus
// one, since the main cpu loop will decrement one. Also,
// the count is predecremented before examined, so defintely
// don't roll it under zero.
BX_TICKN(wordCount-1);
CX -= (wordCount-1);
incr = wordCount << 1; // count * 2
}
else {
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_word_32(BX_SEG_REG_ES, di, value16);
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_word_32(BX_SEG_REG_ES, di, value16);
value16 = BX_INP(DX, 2);
value16 = BX_INP(DX, 2);
/* no seg override allowed */
write_virtual_word_32(BX_SEG_REG_ES, di, value16);
}
}
else
#endif
{
// Write a zero to memory, to trigger any segment or page
// faults before reading from IO port.
write_virtual_word_32(BX_SEG_REG_ES, di, value16);
value16 = BX_INP(DX, 2);
/* no seg override allowed */
write_virtual_word_32(BX_SEG_REG_ES, di, value16);
}
/* no seg override allowed */
write_virtual_word_32(BX_SEG_REG_ES, di, value16);
if (BX_CPU_THIS_PTR get_DF())
DI -= incr;
DI -= 2;
else
DI += incr;
DI += 2;
}
// 16-bit operand size, 32-bit address size
@ -703,40 +669,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::OUTSW16_DXXw(bxInstruction_c *i)
exception(BX_GP_EXCEPTION, 0, 0);
}
Bit16u value16;
Bit16u si = SI;
unsigned incr = 2;
#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
/* If conditions are right, we can transfer IO to physical memory
* in a batch, rather than one instruction at a time.
*/
if (i->repUsedL() && !BX_CPU_THIS_PTR async_event) {
Bit32u wordCount = CX;
wordCount = FastRepOUTSW(i, i->seg(), si, DX, wordCount);
if (wordCount) {
// Decrement eCX. Note, the main loop will decrement 1 also, so
// decrement by one less than expected, like the case above.
BX_TICKN(wordCount-1); // Main cpu loop also decrements one more.
CX -= (wordCount-1);
incr = wordCount << 1; // count * 2.
}
else {
value16 = read_virtual_word_32(i->seg(), si);
BX_OUTP(DX, value16, 2);
}
}
else
#endif
{
value16 = read_virtual_word_32(i->seg(), si);
BX_OUTP(DX, value16, 2);
}
Bit16u value16 = read_virtual_word_32(i->seg(), SI);
BX_OUTP(DX, value16, 2);
if (BX_CPU_THIS_PTR get_DF())
SI = SI - incr;
SI -= 2;
else
SI = SI + incr;
SI += 2;
}
// 16-bit operand size, 32-bit address size

5
bochs/cpu/proc_ctrl.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: proc_ctrl.cc,v 1.245 2008-06-25 02:28:31 sshwarts Exp $
// $Id: proc_ctrl.cc,v 1.246 2008-06-25 10:34:21 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -1923,7 +1923,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MONITOR(bxInstruction_c *i)
// check if we could access the memory segment
if (!(seg->cache.valid & SegAccessROK4G)) {
read_virtual_checks(&BX_CPU_THIS_PTR sregs[i->seg()], offset, 1);
if (! read_virtual_checks(&BX_CPU_THIS_PTR sregs[i->seg()], offset, 1))
exception(int_number(i->seg()), 0, 0);
}
// set MONITOR

91
bochs/cpu/string.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: string.cc,v 1.61 2008-06-12 19:14:39 sshwarts Exp $
// $Id: string.cc,v 1.62 2008-06-25 10:34:21 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -609,50 +609,18 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::REP_MOVSQ_XqYq(bxInstruction_c *i)
// 16 bit address size
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSB16_XbYb(bxInstruction_c *i)
{
Bit8u temp8;
Bit32u incr = 1;
#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
/* If conditions are right, we can transfer IO to physical memory
* in a batch, rather than one instruction at a time */
if (i->repUsedL() && !BX_CPU_THIS_PTR async_event)
{
Bit32u byteCount = FastRepMOVSB(i, i->seg(), SI, BX_SEG_REG_ES, DI, CX);
if (byteCount) {
// Decrement the ticks count by the number of iterations, minus
// one, since the main cpu loop will decrement one. Also,
// the count is predecremented before examined, so defintely
// don't roll it under zero.
BX_TICKN(byteCount-1);
// Decrement eCX. Note, the main loop will decrement 1 also, so
// decrement by one less than expected, like the case above.
CX -= (byteCount-1);
incr = byteCount;
}
else {
temp8 = read_virtual_byte(i->seg(), SI);
write_virtual_byte_32(BX_SEG_REG_ES, DI, temp8);
}
}
else
#endif
{
temp8 = read_virtual_byte_32(i->seg(), SI);
write_virtual_byte_32(BX_SEG_REG_ES, DI, temp8);
}
Bit8u temp8 = read_virtual_byte_32(i->seg(), SI);
write_virtual_byte_32(BX_SEG_REG_ES, DI, temp8);
if (BX_CPU_THIS_PTR get_DF()) {
/* decrement SI, DI */
SI -= incr;
DI -= incr;
SI--;
DI--;
}
else {
/* increment SI, DI */
SI += incr;
DI += incr;
SI++;
DI++;
}
}
@ -735,54 +703,21 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSB64_XbYb(bxInstruction_c *i)
/* 16 bit opsize mode, 16 bit address size */
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSW16_XwYw(bxInstruction_c *i)
{
Bit16u temp16;
Bit32u incr = 2;
Bit16u si = SI;
Bit16u di = DI;
#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
/* If conditions are right, we can transfer IO to physical memory
* in a batch, rather than one instruction at a time.
*/
if (i->repUsedL() && !BX_CPU_THIS_PTR async_event)
{
Bit32u wordCount = FastRepMOVSW(i, i->seg(), si, BX_SEG_REG_ES, di, CX);
if (wordCount) {
// Decrement the ticks count by the number of iterations, minus
// one, since the main cpu loop will decrement one. Also,
// the count is predecremented before examined, so defintely
// don't roll it under zero.
BX_TICKN(wordCount-1);
// Decrement eCX. Note, the main loop will decrement 1 also, so
// decrement by one less than expected, like the case above.
CX -= (wordCount-1);
incr = wordCount << 1; // count * 2
}
else {
temp16 = read_virtual_word_32(i->seg(), si);
write_virtual_word_32(BX_SEG_REG_ES, di, temp16);
}
}
else
#endif
{
temp16 = read_virtual_word_32(i->seg(), si);
write_virtual_word_32(BX_SEG_REG_ES, di, temp16);
}
Bit16u temp16 = read_virtual_word_32(i->seg(), si);
write_virtual_word_32(BX_SEG_REG_ES, di, temp16);
if (BX_CPU_THIS_PTR get_DF()) {
/* decrement SI, DI */
si -= incr;
di -= incr;
si -= 2;
di -= 2;
}
else {
/* increment SI, DI */
si += incr;
di += incr;
si += 2;
di += 2;
}
SI = si;