Remove repeat speedups from 16-bit address size methods - they not gonna speed up anyway because of segment limit issue
This commit is contained in:
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c1f308d80d
commit
65275ffc02
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc,v 1.193 2008-06-23 02:56:31 sshwarts Exp $
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// $Id: fetchdecode.cc,v 1.194 2008-06-25 10:34:20 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -2931,7 +2931,10 @@ modrm_done:
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i->setB1(b1);
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i->setB1(b1);
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i->setILen(ilen);
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i->setILen(ilen);
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#if BX_INSTRUMENTATION
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i->ia_opcode = ia_opcode;
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BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
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BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
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#endif
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return(1);
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return(1);
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}
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}
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode64.cc,v 1.202 2008-06-23 02:56:31 sshwarts Exp $
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// $Id: fetchdecode64.cc,v 1.203 2008-06-25 10:34:20 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -3852,7 +3852,10 @@ modrm_done:
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i->setB1(b1);
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i->setB1(b1);
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i->setILen(ilen);
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i->setILen(ilen);
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#if BX_INSTRUMENTATION
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i->ia_opcode = ia_opcode;
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BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
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BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
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#endif
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return(1);
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return(1);
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}
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}
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: instr.h,v 1.11 2008-04-14 21:48:35 sshwarts Exp $
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// $Id: instr.h,v 1.12 2008-06-25 10:34:21 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (c) 2008 Stanislav Shwartsman
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// Copyright (c) 2008 Stanislav Shwartsman
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@ -45,6 +45,9 @@ public:
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// the memory address (if any).
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// the memory address (if any).
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BxExecutePtr_tR ResolveModrm;
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BxExecutePtr_tR ResolveModrm;
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BxExecutePtr_tR execute;
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BxExecutePtr_tR execute;
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#if BX_INSTRUMENTATION
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Bit16u ia_opcode;
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#endif
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struct {
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struct {
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// 7...2 (unused)
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// 7...2 (unused)
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: io.cc,v 1.61 2008-06-12 20:12:25 sshwarts Exp $
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// $Id: io.cc,v 1.62 2008-06-25 10:34:21 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -341,59 +341,25 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INSW16_YwDX(bxInstruction_c *i)
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{
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{
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Bit16u value16=0;
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Bit16u value16=0;
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Bit16u di = DI;
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Bit16u di = DI;
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unsigned incr = 2;
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if (! BX_CPU_THIS_PTR allow_io(DX, 2)) {
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if (! BX_CPU_THIS_PTR allow_io(DX, 2)) {
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BX_DEBUG(("INSW16_YwDX: I/O access not allowed !"));
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BX_DEBUG(("INSW16_YwDX: I/O access not allowed !"));
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exception(BX_GP_EXCEPTION, 0, 0);
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
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// Write a zero to memory, to trigger any segment or page
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/* If conditions are right, we can transfer IO to physical memory
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// faults before reading from IO port.
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* in a batch, rather than one instruction at a time.
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write_virtual_word_32(BX_SEG_REG_ES, di, value16);
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*/
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if (i->repUsedL() && !BX_CPU_THIS_PTR async_event)
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{
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Bit32u wordCount = CX;
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BX_ASSERT(wordCount > 0);
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wordCount = FastRepINSW(i, di, DX, wordCount);
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if (wordCount) {
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// Decrement the ticks count by the number of iterations, minus
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// one, since the main cpu loop will decrement one. Also,
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// the count is predecremented before examined, so defintely
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// don't roll it under zero.
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BX_TICKN(wordCount-1);
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CX -= (wordCount-1);
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incr = wordCount << 1; // count * 2
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}
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else {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_word_32(BX_SEG_REG_ES, di, value16);
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value16 = BX_INP(DX, 2);
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value16 = BX_INP(DX, 2);
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/* no seg override allowed */
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/* no seg override allowed */
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write_virtual_word_32(BX_SEG_REG_ES, di, value16);
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write_virtual_word_32(BX_SEG_REG_ES, di, value16);
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}
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}
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else
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#endif
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{
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_word_32(BX_SEG_REG_ES, di, value16);
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value16 = BX_INP(DX, 2);
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/* no seg override allowed */
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write_virtual_word_32(BX_SEG_REG_ES, di, value16);
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}
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if (BX_CPU_THIS_PTR get_DF())
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if (BX_CPU_THIS_PTR get_DF())
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DI -= incr;
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DI -= 2;
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else
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else
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DI += incr;
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DI += 2;
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}
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}
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// 16-bit operand size, 32-bit address size
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// 16-bit operand size, 32-bit address size
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@ -703,40 +669,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::OUTSW16_DXXw(bxInstruction_c *i)
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exception(BX_GP_EXCEPTION, 0, 0);
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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Bit16u value16;
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Bit16u value16 = read_virtual_word_32(i->seg(), SI);
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Bit16u si = SI;
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BX_OUTP(DX, value16, 2);
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unsigned incr = 2;
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#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
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/* If conditions are right, we can transfer IO to physical memory
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* in a batch, rather than one instruction at a time.
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*/
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if (i->repUsedL() && !BX_CPU_THIS_PTR async_event) {
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Bit32u wordCount = CX;
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wordCount = FastRepOUTSW(i, i->seg(), si, DX, wordCount);
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if (wordCount) {
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// Decrement eCX. Note, the main loop will decrement 1 also, so
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// decrement by one less than expected, like the case above.
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BX_TICKN(wordCount-1); // Main cpu loop also decrements one more.
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CX -= (wordCount-1);
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incr = wordCount << 1; // count * 2.
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}
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else {
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value16 = read_virtual_word_32(i->seg(), si);
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BX_OUTP(DX, value16, 2);
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}
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}
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else
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#endif
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{
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value16 = read_virtual_word_32(i->seg(), si);
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BX_OUTP(DX, value16, 2);
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}
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if (BX_CPU_THIS_PTR get_DF())
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if (BX_CPU_THIS_PTR get_DF())
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SI = SI - incr;
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SI -= 2;
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else
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else
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SI = SI + incr;
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SI += 2;
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}
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}
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// 16-bit operand size, 32-bit address size
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// 16-bit operand size, 32-bit address size
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: proc_ctrl.cc,v 1.245 2008-06-25 02:28:31 sshwarts Exp $
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// $Id: proc_ctrl.cc,v 1.246 2008-06-25 10:34:21 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1923,7 +1923,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MONITOR(bxInstruction_c *i)
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// check if we could access the memory segment
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// check if we could access the memory segment
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if (!(seg->cache.valid & SegAccessROK4G)) {
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if (!(seg->cache.valid & SegAccessROK4G)) {
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read_virtual_checks(&BX_CPU_THIS_PTR sregs[i->seg()], offset, 1);
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if (! read_virtual_checks(&BX_CPU_THIS_PTR sregs[i->seg()], offset, 1))
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exception(int_number(i->seg()), 0, 0);
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}
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}
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// set MONITOR
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// set MONITOR
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: string.cc,v 1.61 2008-06-12 19:14:39 sshwarts Exp $
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// $Id: string.cc,v 1.62 2008-06-25 10:34:21 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -609,50 +609,18 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::REP_MOVSQ_XqYq(bxInstruction_c *i)
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// 16 bit address size
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// 16 bit address size
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSB16_XbYb(bxInstruction_c *i)
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSB16_XbYb(bxInstruction_c *i)
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{
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{
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Bit8u temp8;
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Bit8u temp8 = read_virtual_byte_32(i->seg(), SI);
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write_virtual_byte_32(BX_SEG_REG_ES, DI, temp8);
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Bit32u incr = 1;
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#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
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/* If conditions are right, we can transfer IO to physical memory
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* in a batch, rather than one instruction at a time */
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if (i->repUsedL() && !BX_CPU_THIS_PTR async_event)
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{
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Bit32u byteCount = FastRepMOVSB(i, i->seg(), SI, BX_SEG_REG_ES, DI, CX);
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if (byteCount) {
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// Decrement the ticks count by the number of iterations, minus
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// one, since the main cpu loop will decrement one. Also,
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// the count is predecremented before examined, so defintely
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// don't roll it under zero.
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BX_TICKN(byteCount-1);
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// Decrement eCX. Note, the main loop will decrement 1 also, so
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// decrement by one less than expected, like the case above.
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CX -= (byteCount-1);
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incr = byteCount;
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}
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else {
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temp8 = read_virtual_byte(i->seg(), SI);
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write_virtual_byte_32(BX_SEG_REG_ES, DI, temp8);
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}
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}
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else
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#endif
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{
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temp8 = read_virtual_byte_32(i->seg(), SI);
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write_virtual_byte_32(BX_SEG_REG_ES, DI, temp8);
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}
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if (BX_CPU_THIS_PTR get_DF()) {
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if (BX_CPU_THIS_PTR get_DF()) {
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/* decrement SI, DI */
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/* decrement SI, DI */
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SI -= incr;
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SI--;
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DI -= incr;
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DI--;
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}
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}
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else {
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else {
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/* increment SI, DI */
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/* increment SI, DI */
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SI += incr;
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SI++;
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DI += incr;
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DI++;
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}
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}
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}
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}
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@ -735,54 +703,21 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSB64_XbYb(bxInstruction_c *i)
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/* 16 bit opsize mode, 16 bit address size */
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/* 16 bit opsize mode, 16 bit address size */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSW16_XwYw(bxInstruction_c *i)
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSW16_XwYw(bxInstruction_c *i)
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{
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{
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Bit16u temp16;
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Bit32u incr = 2;
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Bit16u si = SI;
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Bit16u si = SI;
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Bit16u di = DI;
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Bit16u di = DI;
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#if (BX_SupportRepeatSpeedups) && (BX_DEBUGGER == 0)
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Bit16u temp16 = read_virtual_word_32(i->seg(), si);
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/* If conditions are right, we can transfer IO to physical memory
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write_virtual_word_32(BX_SEG_REG_ES, di, temp16);
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* in a batch, rather than one instruction at a time.
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*/
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if (i->repUsedL() && !BX_CPU_THIS_PTR async_event)
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{
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Bit32u wordCount = FastRepMOVSW(i, i->seg(), si, BX_SEG_REG_ES, di, CX);
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if (wordCount) {
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// Decrement the ticks count by the number of iterations, minus
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// one, since the main cpu loop will decrement one. Also,
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// the count is predecremented before examined, so defintely
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// don't roll it under zero.
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BX_TICKN(wordCount-1);
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// Decrement eCX. Note, the main loop will decrement 1 also, so
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// decrement by one less than expected, like the case above.
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CX -= (wordCount-1);
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incr = wordCount << 1; // count * 2
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}
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else {
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temp16 = read_virtual_word_32(i->seg(), si);
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write_virtual_word_32(BX_SEG_REG_ES, di, temp16);
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}
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}
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else
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#endif
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{
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temp16 = read_virtual_word_32(i->seg(), si);
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write_virtual_word_32(BX_SEG_REG_ES, di, temp16);
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}
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if (BX_CPU_THIS_PTR get_DF()) {
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if (BX_CPU_THIS_PTR get_DF()) {
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/* decrement SI, DI */
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/* decrement SI, DI */
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si -= incr;
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si -= 2;
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di -= incr;
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di -= 2;
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}
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}
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else {
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else {
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/* increment SI, DI */
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/* increment SI, DI */
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si += incr;
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si += 2;
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di += incr;
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di += 2;
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}
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}
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SI = si;
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SI = si;
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