Print 64-bit registers in 'info registers' command and in dump_regs
This commit is contained in:
Stanislav Shwartsman
parent
e410fa4a5a
commit
650086669c
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: dbg_main.cc,v 1.82 2006-10-21 21:28:20 sshwarts Exp $
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// $Id: dbg_main.cc,v 1.83 2006-10-21 22:06:39 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1340,19 +1340,8 @@ void bx_dbg_disassemble_current(int which_cpu, int print_time)
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// way out I have thought of would be to keep a prev_eax, prev_ebx, etc copies
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// in each cpu description (see cpu/cpu.h) and update/compare those "prev" values
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// from here. (eks)
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if(BX_CPU(dbg_cpu)->trace_reg) {
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dbg_printf (
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"eax: %08X\tecx: %08X\tedx: %08X\tebx: %08X\nesp: %08X\tebp: %08X\tesi: %08X\tedi: %08X\n",
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BX_CPU(which_cpu)->get_reg32(BX_32BIT_REG_EAX),
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BX_CPU(which_cpu)->get_reg32(BX_32BIT_REG_ECX),
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BX_CPU(which_cpu)->get_reg32(BX_32BIT_REG_EDX),
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BX_CPU(which_cpu)->get_reg32(BX_32BIT_REG_EBX),
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BX_CPU(which_cpu)->get_reg32(BX_32BIT_REG_ESP),
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BX_CPU(which_cpu)->get_reg32(BX_32BIT_REG_EBP),
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BX_CPU(which_cpu)->get_reg32(BX_32BIT_REG_ESI),
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BX_CPU(which_cpu)->get_reg32(BX_32BIT_REG_EDI));
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dbg_printf("eflags: "); bx_dbg_info_flags();
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}
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if(BX_CPU(dbg_cpu)->trace_reg)
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bx_dbg_info_registers_command(BX_INFO_CPU_REGS);
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if (print_time)
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dbg_printf("(%u).[" FMT_LL "d] ", which_cpu, bx_pc_system.time_ticks());
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@ -1805,124 +1794,159 @@ void bx_dbg_take_command(const char *what, unsigned n)
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void bx_dbg_info_registers_command(int which_regs_mask)
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{
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Bit32u reg;
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bx_dbg_cpu_t cpu;
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for (unsigned i=0; i<BX_SMP_PROCESSORS; i++) {
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if (which_regs_mask & BX_INFO_CPU_REGS) {
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memset(&cpu, 0, sizeof(cpu));
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BX_CPU(i)->dbg_get_cpu(&cpu);
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bx_address reg;
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if (which_regs_mask & BX_INFO_CPU_REGS) {
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#if BX_SUPPORT_SMP
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dbg_printf("%s:\n", BX_CPU(i)->name);
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dbg_printf("%s:\n", BX_CPU(dbg_cpu)->name);
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#endif
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reg = cpu.eax;
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dbg_printf("eax: 0x%-8x %d\n", (unsigned) reg, (int) reg);
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reg = cpu.ecx;
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dbg_printf("ecx: 0x%-8x %d\n", (unsigned) reg, (int) reg);
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reg = cpu.edx;
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dbg_printf("edx: 0x%-8x %d\n", (unsigned) reg, (int) reg);
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reg = cpu.ebx;
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dbg_printf("ebx: 0x%-8x %d\n", (unsigned) reg, (int) reg);
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reg = cpu.esp;
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dbg_printf("esp: 0x%-8x %d\n", (unsigned) reg, (int) reg);
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reg = cpu.ebp;
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dbg_printf("ebp: 0x%-8x %d\n", (unsigned) reg, (int) reg);
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reg = cpu.esi;
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dbg_printf("esi: 0x%-8x %d\n", (unsigned) reg, (int) reg);
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reg = cpu.edi;
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dbg_printf("edi: 0x%-8x %d\n", (unsigned) reg, (int) reg);
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reg = cpu.eip;
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dbg_printf("eip: 0x%-8x\n", (unsigned) reg);
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reg = cpu.eflags;
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dbg_printf("eflags 0x%-8x\n", (unsigned) reg);
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reg = cpu.cs.sel;
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dbg_printf("cs: 0x%-8x\n", (unsigned) reg);
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reg = cpu.ss.sel;
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dbg_printf("ss: 0x%-8x\n", (unsigned) reg);
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reg = cpu.ds.sel;
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dbg_printf("ds: 0x%-8x\n", (unsigned) reg);
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reg = cpu.es.sel;
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dbg_printf("es: 0x%-8x\n", (unsigned) reg);
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reg = cpu.fs.sel;
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dbg_printf("fs: 0x%-8x\n", (unsigned) reg);
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reg = cpu.gs.sel;
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dbg_printf("gs: 0x%-8x\n", (unsigned) reg);
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}
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#if BX_SUPPORT_X86_64 == 0
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_32BIT_REG_EAX);
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dbg_printf("eax: 0x%08x %d\n", (unsigned) reg, (int) reg);
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_32BIT_REG_ECX);
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dbg_printf("ecx: 0x%08x %d\n", (unsigned) reg, (int) reg);
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_32BIT_REG_EDX);
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dbg_printf("edx: 0x%08x %d\n", (unsigned) reg, (int) reg);
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_32BIT_REG_EBX);
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dbg_printf("ebx: 0x%08x %d\n", (unsigned) reg, (int) reg);
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_32BIT_REG_ESP);
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dbg_printf("esp: 0x%08x %d\n", (unsigned) reg, (int) reg);
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_32BIT_REG_EBP);
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dbg_printf("ebp: 0x%08x %d\n", (unsigned) reg, (int) reg);
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_32BIT_REG_ESI);
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dbg_printf("esi: 0x%08x %d\n", (unsigned) reg, (int) reg);
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_32BIT_REG_EDI);
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dbg_printf("edi: 0x%08x %d\n", (unsigned) reg, (int) reg);
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reg = bx_dbg_get_eip();
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dbg_printf("eip: 0x%08x\n", (unsigned) reg);
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#else
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_RAX);
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dbg_printf("rax: 0x%08x:%08x ",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_RCX);
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dbg_printf("rcx: 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_RDX);
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dbg_printf("rdx: 0x%08x:%08x ",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_RBX);
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dbg_printf("rbx: 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_RSP);
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dbg_printf("rsp: 0x%08x:%08x ",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_RBP);
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dbg_printf("rbp: 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_RSI);
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dbg_printf("rsi: 0x%08x:%08x ",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_RDI);
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dbg_printf("rdi: 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_R8);
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dbg_printf("r8 : 0x%08x:%08x ",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_R9);
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dbg_printf("r9 : 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_R10);
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dbg_printf("r10: 0x%08x:%08x ",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_R11);
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dbg_printf("r11: 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_R12);
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dbg_printf("r12: 0x%08x:%08x ",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_R13);
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dbg_printf("r13: 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_R14);
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dbg_printf("r14: 0x%08x:%08x ",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = BX_CPU(dbg_cpu)->get_reg32(BX_64BIT_REG_R15);
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dbg_printf("r15: 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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reg = bx_dbg_get_instruction_pointer();
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dbg_printf("rip: 0x%08x:%08x\n",
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(unsigned)(reg>>32), (unsigned)(reg & 0xffffffff));
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#endif
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reg = BX_CPU(dbg_cpu)->read_eflags();
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dbg_printf("eflags 0x%08x\n", (unsigned) reg);
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bx_dbg_info_flags();
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}
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#if BX_SUPPORT_FPU
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if (which_regs_mask & BX_INFO_FPU_REGS) {
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BX_CPU(i)->print_state_FPU();
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}
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if (which_regs_mask & BX_INFO_FPU_REGS) {
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BX_CPU(i)->print_state_FPU();
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}
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#endif
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#if BX_SUPPORT_SSE
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if (which_regs_mask & BX_INFO_SSE_REGS) {
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BX_CPU(i)->print_state_SSE();
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}
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#endif
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if (which_regs_mask & BX_INFO_SSE_REGS) {
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BX_CPU(i)->print_state_SSE();
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}
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#endif
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}
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void bx_dbg_dump_cpu_command(void)
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{
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bx_dbg_cpu_t cpu;
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for (unsigned i=0; i<BX_SMP_PROCESSORS; i++) {
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BX_CPU(i)->dbg_get_cpu(&cpu);
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BX_CPU(dbg_cpu)->dbg_get_cpu(&cpu);
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#if BX_SUPPORT_SMP
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dbg_printf("CPU#%u\n", i);
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dbg_printf("CPU#%u\n", i);
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#endif
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dbg_printf("eax:0x%08x, ebx:0x%08x, ecx:0x%08x, edx:0x%08x\n",
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dbg_printf("eax:0x%08x, ebx:0x%08x, ecx:0x%08x, edx:0x%08x\n",
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(unsigned) cpu.eax, (unsigned) cpu.ebx,
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(unsigned) cpu.ecx, (unsigned) cpu.edx);
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dbg_printf("ebp:0x%08x, esp:0x%08x, esi:0x%08x, edi:0x%08x\n",
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dbg_printf("ebp:0x%08x, esp:0x%08x, esi:0x%08x, edi:0x%08x\n",
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(unsigned) cpu.ebp, (unsigned) cpu.esp,
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(unsigned) cpu.esi, (unsigned) cpu.edi);
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dbg_printf("eip:0x%08x, eflags:0x%08x, inhibit_mask:%u\n",
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dbg_printf("eip:0x%08x, eflags:0x%08x, inhibit_mask:%u\n",
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(unsigned) cpu.eip, (unsigned) cpu.eflags, cpu.inhibit_mask);
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dbg_printf("cs:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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dbg_printf("cs:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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(unsigned) cpu.cs.sel, (unsigned) cpu.cs.des_l,
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(unsigned) cpu.cs.des_h, (unsigned) cpu.cs.valid);
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dbg_printf("ss:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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dbg_printf("ss:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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(unsigned) cpu.ss.sel, (unsigned) cpu.ss.des_l,
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(unsigned) cpu.ss.des_h, (unsigned) cpu.ss.valid);
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dbg_printf("ds:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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dbg_printf("ds:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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(unsigned) cpu.ds.sel, (unsigned) cpu.ds.des_l,
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(unsigned) cpu.ds.des_h, (unsigned) cpu.ds.valid);
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dbg_printf("es:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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dbg_printf("es:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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(unsigned) cpu.es.sel, (unsigned) cpu.es.des_l,
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(unsigned) cpu.es.des_h, (unsigned) cpu.es.valid);
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dbg_printf("fs:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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dbg_printf("fs:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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(unsigned) cpu.fs.sel, (unsigned) cpu.fs.des_l,
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(unsigned) cpu.fs.des_h, (unsigned) cpu.fs.valid);
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dbg_printf("gs:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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dbg_printf("gs:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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(unsigned) cpu.gs.sel, (unsigned) cpu.gs.des_l,
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(unsigned) cpu.gs.des_h, (unsigned) cpu.gs.valid);
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dbg_printf("ldtr:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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dbg_printf("ldtr:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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(unsigned) cpu.ldtr.sel, (unsigned) cpu.ldtr.des_l,
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(unsigned) cpu.ldtr.des_h, (unsigned) cpu.ldtr.valid);
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dbg_printf("tr:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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dbg_printf("tr:s=0x%04x, dl=0x%08x, dh=0x%08x, valid=%u\n",
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(unsigned) cpu.tr.sel, (unsigned) cpu.tr.des_l,
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(unsigned) cpu.tr.des_h, (unsigned) cpu.tr.valid);
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dbg_printf("gdtr:base=0x%08x, limit=0x%x\n",
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dbg_printf("gdtr:base=0x%08x, limit=0x%x\n",
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(unsigned) cpu.gdtr.base, (unsigned) cpu.gdtr.limit);
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dbg_printf("idtr:base=0x%08x, limit=0x%x\n",
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dbg_printf("idtr:base=0x%08x, limit=0x%x\n",
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(unsigned) cpu.idtr.base, (unsigned) cpu.idtr.limit);
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dbg_printf("dr0:0x%08x, dr1:0x%08x, dr2:0x%08x\n",
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dbg_printf("dr0:0x%08x, dr1:0x%08x, dr2:0x%08x\n",
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(unsigned) cpu.dr0, (unsigned) cpu.dr1, (unsigned) cpu.dr2);
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dbg_printf("dr3:0x%08x, dr6:0x%08x, dr7:0x%08x\n",
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dbg_printf("dr3:0x%08x, dr6:0x%08x, dr7:0x%08x\n",
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(unsigned) cpu.dr3, (unsigned) cpu.dr6, (unsigned) cpu.dr7);
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dbg_printf("cr0:0x%08x, cr1:0x%08x, cr2:0x%08x\n",
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dbg_printf("cr0:0x%08x, cr1:0x%08x, cr2:0x%08x\n",
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(unsigned) cpu.cr0, (unsigned) cpu.cr1, (unsigned) cpu.cr2);
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dbg_printf("cr3:0x%08x, cr4:0x%08x\n",
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dbg_printf("cr3:0x%08x, cr4:0x%08x\n",
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(unsigned) cpu.cr3, (unsigned) cpu.cr4);
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}
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#if BX_SUPPORT_PCI
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if (SIM->get_param_bool(BXPN_I440FX_SUPPORT)->get()) {
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.304 2006-10-04 19:08:39 sshwarts Exp $
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// $Id: cpu.h,v 1.305 2006-10-21 22:06:39 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -88,6 +88,15 @@
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#define BX_64BIT_REG_RSI 6
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#define BX_64BIT_REG_RDI 7
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#define BX_64BIT_REG_R8 8
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#define BX_64BIT_REG_R9 9
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#define BX_64BIT_REG_R10 10
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#define BX_64BIT_REG_R11 11
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#define BX_64BIT_REG_R12 12
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#define BX_64BIT_REG_R13 13
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#define BX_64BIT_REG_R14 14
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#define BX_64BIT_REG_R15 15
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#if defined(NEED_CPU_REG_SHORTCUTS)
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/* WARNING:
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