From 5f339a5fd81b985d44f8902f30e748ad903be7b3 Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Mon, 12 Dec 2005 22:01:22 +0000 Subject: [PATCH] Small debug fixes --- bochs/cpu/apic.cc | 3 ++- bochs/cpu/exception.cc | 15 ++++++--------- bochs/cpu/iret.cc | 4 +++- bochs/cpu/tasking.cc | 8 ++++++-- 4 files changed, 17 insertions(+), 13 deletions(-) diff --git a/bochs/cpu/apic.cc b/bochs/cpu/apic.cc index a80b0a491..d8e74a24f 100644 --- a/bochs/cpu/apic.cc +++ b/bochs/cpu/apic.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: apic.cc,v 1.67 2005-12-11 21:58:53 sshwarts Exp $ +// $Id: apic.cc,v 1.68 2005-12-12 22:01:22 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -998,6 +998,7 @@ Bit8u bx_local_apic_c::get_apr(void) bx_bool bx_local_apic_c::is_focus(Bit32u vector) { + if (focus_disable) return 0; return (irr[vector] || isr[vector]) ? 1 : 0; } diff --git a/bochs/cpu/exception.cc b/bochs/cpu/exception.cc index 4ddbd0610..f9c839c74 100644 --- a/bochs/cpu/exception.cc +++ b/bochs/cpu/exception.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: exception.cc,v 1.67 2005-12-12 19:54:48 sshwarts Exp $ +// $Id: exception.cc,v 1.68 2005-12-12 22:01:22 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -355,7 +355,7 @@ void BX_CPU_C::protected_mode_int(Bit8u vector, bx_bool is_INT, bx_bool is_error } // index must be within GDT limits, else #TS(TSS selector) - fetch_raw_descriptor(&tss_selector, &dword1, &dword2, BX_TS_EXCEPTION); + fetch_raw_descriptor(&tss_selector, &dword1, &dword2, BX_GP_EXCEPTION); parse_descriptor(dword1, dword2, &tss_descriptor); @@ -610,7 +610,7 @@ void BX_CPU_C::protected_mode_int(Bit8u vector, bx_bool is_INT, bx_bool is_error push_32(old_CS); push_32(old_EIP); - if ( is_error_code ) + if (is_error_code) push_32(error_code); } else { // 286 int/trap gate @@ -625,7 +625,7 @@ void BX_CPU_C::protected_mode_int(Bit8u vector, bx_bool is_INT, bx_bool is_error push_16(old_CS); push_16(old_EIP); // ignores upper 16bits - if ( is_error_code ) + if (is_error_code) push_16(error_code); } @@ -811,7 +811,6 @@ void BX_CPU_C::exception(unsigned vector, Bit16u error_code, bx_bool is_INT) { bx_bool push_error; Bit8u exception_type; - unsigned prev_errno; invalidate_prefetch_q(); UNUSED(is_INT); @@ -981,7 +980,7 @@ void BX_CPU_C::exception(unsigned vector, Bit16u error_code, bx_bool is_INT) case 17: // alignment check BX_PANIC(("exception(): alignment-check, vector 17 unimplemented")); push_error = 0; // keep compiler happy for now - exception_type = 0; // keep compiler happy for now + exception_type = BX_ET_BENIGN; BX_CPU_THIS_PTR assert_RF (); break; #endif @@ -989,7 +988,7 @@ void BX_CPU_C::exception(unsigned vector, Bit16u error_code, bx_bool is_INT) case 18: // machine check BX_PANIC(("exception(): machine-check, vector 18 unimplemented")); push_error = 0; // keep compiler happy for now - exception_type = 0; // keep compiler happy for now + exception_type = BX_ET_BENIGN; break; #endif default: @@ -1020,10 +1019,8 @@ void BX_CPU_C::exception(unsigned vector, Bit16u error_code, bx_bool is_INT) BX_CPU_THIS_PTR curr_exception[0] = exception_type; } - #if BX_CPU_LEVEL >= 2 if (!real_mode()) { - prev_errno = BX_CPU_THIS_PTR errorno; BX_CPU_THIS_PTR interrupt(vector, 0, push_error, error_code); BX_CPU_THIS_PTR errorno = 0; // error resolved longjmp(BX_CPU_THIS_PTR jmp_buf_env, 1); // go back to main decode loop diff --git a/bochs/cpu/iret.cc b/bochs/cpu/iret.cc index 01cdfab33..dafd8b395 100755 --- a/bochs/cpu/iret.cc +++ b/bochs/cpu/iret.cc @@ -1,5 +1,5 @@ //////////////////////////////////////////////////////////////////////// -// $Id: iret.cc,v 1.9 2005-10-17 13:06:09 sshwarts Exp $ +// $Id: iret.cc,v 1.10 2005-12-12 22:01:22 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -44,6 +44,8 @@ BX_CPU_C::iret_protected(bxInstruction_c *i) Bit32u dword1, dword2; bx_descriptor_t cs_descriptor, ss_descriptor; + BX_DEBUG(("IRET PROTECTED")); + #if BX_SUPPORT_X86_64 if (BX_CPU_THIS_PTR msr.lma) { diff --git a/bochs/cpu/tasking.cc b/bochs/cpu/tasking.cc index 1bc8bad5b..36e4f4230 100644 --- a/bochs/cpu/tasking.cc +++ b/bochs/cpu/tasking.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: tasking.cc,v 1.27 2005-11-21 21:10:59 sshwarts Exp $ +// $Id: tasking.cc,v 1.28 2005-12-12 22:01:22 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -149,7 +149,7 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector, // // 1) TSS DPL must be >= CPL // 2) TSS DPL must be >= TSS selector RPL - // 3) TSS descriptor is not busy. TS(for IRET); GP(for JMP, CALL, INT) + // 3) TSS descriptor is not busy. // TSS must be present, else #NP(TSS selector) if (tss_descriptor->p==0) { @@ -194,6 +194,10 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector, exception(BX_TS_EXCEPTION, tss_selector->value & 0xfffc, 0); } + if (obase32 == nbase32) { + BX_INFO(("TASK SWITCH: switching to the same TSS !")); + } + #if BX_SUPPORT_PAGING // Check that old TSS, new TSS, and all segment descriptors // used in the task switch are paged in.