mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Fixed instrumentation example

Browse Source
This commit is contained in:
Stanislav Shwartsman 2002-09-29 16:05:13 +00:00
parent 895693b3b5
commit 5bcef53393
2 changed files with 30 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

62
bochs/instrument/example0/instrument.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: instrument.cc,v 1.5 2002-09-28 17:09:04 sshwarts Exp $ // $Id: instrument.cc,v 1.6 2002-09-29 16:05:13 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -26,6 +26,7 @@
#include "bochs.h" #include "bochs.h"
#include "cpu/cpu.h"
// maximum size of an instruction // maximum size of an instruction
@ -37,7 +38,7 @@
// Use this variable to turn on/off collection of instrumentation data // Use this variable to turn on/off collection of instrumentation data
// If you are not using the debugger to turn this on/off, then possibly // If you are not using the debugger to turn this on/off, then possibly
// start this at 1 instead of 0. // start this at 1 instead of 0.
static Boolean active = 0; static Boolean active = 1;
static struct instruction_t { static struct instruction_t {
@ -46,8 +47,6 @@ static struct instruction_t {
unsigned nprefixes; unsigned nprefixes;
Bit8u opcode[MAX_OPCODE_SIZE]; Bit8u opcode[MAX_OPCODE_SIZE];
Boolean is32; Boolean is32;
Bit32u linear_iaddr;
Bit32u phy_iaddr;
unsigned num_data_accesses; unsigned num_data_accesses;
struct { struct {
bx_address laddr; // linear address bx_address laddr; // linear address
@ -66,13 +65,10 @@ static logfunctions *instrument_log = new logfunctions ();
void bx_instr_reset(unsigned cpu) void bx_instr_reset(unsigned cpu)
{ {
for(int i=0;i<BX_SMP_PROCESSORS;i++) instruction[cpu].valid = 0;
{ instruction[cpu].nprefixes = 0;
instruction[cpu].valid = 0; instruction[cpu].num_data_accesses = 0;
instruction[cpu].nprefixes = 0; instruction[cpu].is_branch = 0;
instruction[cpu].num_data_accesses = 0;
instruction[cpu].is_branch = 0;
}
} }
void bx_instr_new_instruction(unsigned cpu) void bx_instr_new_instruction(unsigned cpu)
@ -89,7 +85,7 @@ void bx_instr_new_instruction(unsigned cpu)
char disasm_tbuf[512]; // buffer for instruction disassembly char disasm_tbuf[512]; // buffer for instruction disassembly
unsigned length = i->opcode_size, n; unsigned length = i->opcode_size, n;
bx_disassemble.disasm(i->is32, i->opcode, disasm_tbuf); bx_disassemble.disasm(i->is32, 0, i->opcode, disasm_tbuf);
if(length != 0) if(length != 0)
{ {
@ -97,7 +93,7 @@ void bx_instr_new_instruction(unsigned cpu)
fprintf(stderr, "CPU: %d: %s\n", cpu, disasm_tbuf); fprintf(stderr, "CPU: %d: %s\n", cpu, disasm_tbuf);
fprintf(stderr, "LEN: %d\tPREFIX: %d\tBYTES: ", length, i->nprefixes); fprintf(stderr, "LEN: %d\tPREFIX: %d\tBYTES: ", length, i->nprefixes);
for(n=0;n<length;n++) fprintf(stderr, "%02x", i->opcode[n]); for(n=0;n<length;n++) fprintf(stderr, "%02x", i->opcode[n]);
if(instruction[cpu].is_branch) if(i->is_branch)
{ {
fprintf(stderr, "\tBRANCH "); fprintf(stderr, "\tBRANCH ");
@ -190,7 +186,7 @@ void bx_instr_opcode(unsigned cpu, Bit8u *opcode, unsigned len, Boolean is32)
instruction[cpu].opcode_size = len; instruction[cpu].opcode_size = len;
} }
void bx_instr_fetch_decode_completed(unsigned cpu, BxInstruction_t *i) void bx_instr_fetch_decode_completed(unsigned cpu, const bxInstruction_c *i)
{ {
if(active) if(active)
{ {
@ -241,9 +237,11 @@ void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address e
} }
} }
void bx_instr_lin_read(unsigned cpu, bx_address lin, bx_address phy, unsigned len) void bx_instr_mem_data(unsigned cpu, bx_address lin, unsigned size, unsigned rw)
{ {
unsigned index; unsigned index;
bx_address phy;
Boolean page_valid;
if(!active) if(!active)
{ {
@ -259,36 +257,20 @@ void bx_instr_lin_read(unsigned cpu, bx_address lin, bx_address phy, unsigned le
return; return;
} }
index = instruction[cpu].num_data_accesses; BX_CPU(cpu)->dbg_xlate_linear2phy(lin, &phy, &page_valid);
instruction[cpu].data_access[index].paddr = A20ADDR(phy); phy = A20ADDR(phy);
instruction[cpu].data_access[index].laddr = lin;
instruction[cpu].data_access[index].op = BX_READ;
instruction[cpu].data_access[index].size = len;
instruction[cpu].num_data_accesses++;
}
void bx_instr_lin_write(unsigned cpu, bx_address lin, bx_address phy, unsigned len) // If linear translation doesn't exist, a paging exception will occur.
{ // Invalidate physical address data for now.
unsigned index; if (!page_valid)
if(!active)
{ {
return; phy = 0;
}
if (!instruction[cpu].valid)
{
return;
}
if (instruction[cpu].num_data_accesses >= MAX_DATA_ACCESSES)
{
return;
} }
index = instruction[cpu].num_data_accesses; index = instruction[cpu].num_data_accesses;
instruction[cpu].data_access[index].paddr = A20ADDR(phy);
instruction[cpu].data_access[index].laddr = lin; instruction[cpu].data_access[index].laddr = lin;
instruction[cpu].data_access[index].op = BX_WRITE; instruction[cpu].data_access[index].paddr = phy;
instruction[cpu].data_access[index].size = len; instruction[cpu].data_access[index].op = rw;
instruction[cpu].data_access[index].size = size;
instruction[cpu].num_data_accesses++; instruction[cpu].num_data_accesses++;
} }

15
bochs/instrument/example0/instrument.h
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: instrument.h,v 1.5 2002-09-28 17:09:04 sshwarts Exp $ // $Id: instrument.h,v 1.6 2002-09-29 16:05:13 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -49,6 +49,8 @@
#if BX_INSTRUMENTATION #if BX_INSTRUMENTATION
class bxInstruction_c;
// called from the CPU core // called from the CPU core
void bx_instr_reset(unsigned cpu); void bx_instr_reset(unsigned cpu);
@ -60,7 +62,7 @@ void bx_instr_ucnear_branch(unsigned cpu, unsigned what, bx_address new_eip);
void bx_instr_far_branch(unsigned cpu, unsigned what, Bit16u new_cs, bx_address new_eip); void bx_instr_far_branch(unsigned cpu, unsigned what, Bit16u new_cs, bx_address new_eip);
void bx_instr_opcode(unsigned cpu, Bit8u *opcode, unsigned len, Boolean is32); void bx_instr_opcode(unsigned cpu, Bit8u *opcode, unsigned len, Boolean is32);
void bx_instr_fetch_decode_completed(unsigned cpu, BxInstruction_t *i); void bx_instr_fetch_decode_completed(unsigned cpu, const bxInstruction_c *i);
void bx_instr_prefix_as(unsigned cpu); void bx_instr_prefix_as(unsigned cpu);
void bx_instr_prefix_os(unsigned cpu); void bx_instr_prefix_os(unsigned cpu);
@ -79,8 +81,7 @@ void bx_instr_interrupt(unsigned cpu, unsigned vector);
void bx_instr_exception(unsigned cpu, unsigned vector); void bx_instr_exception(unsigned cpu, unsigned vector);
void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip); void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip);
void bx_instr_lin_read(unsigned cpu, bx_address lin, bx_address phy, unsigned len); void bx_instr_mem_data(unsigned cpu, bx_address lin, unsigned size, unsigned rw);
void bx_instr_lin_write(unsigned cpu, bx_address lin, bx_address phy, unsigned len);
/* simulation init, shutdown, reset */ /* simulation init, shutdown, reset */
# define BX_INSTR_INIT(cpu_id) # define BX_INSTR_INIT(cpu_id)
@ -132,11 +133,11 @@ void bx_instr_lin_write(unsigned cpu, bx_address lin, bx_address phy, unsigned l
# define BX_INSTR_REPEAT_ITERATION(cpu_id) # define BX_INSTR_REPEAT_ITERATION(cpu_id)
/* memory access */ /* memory access */
# define BX_INSTR_LIN_READ(cpu_id, lin, phy, len) bx_instr_lin_read(cpu_id, lin, phy, len) # define BX_INSTR_LIN_READ(cpu_id, lin, phy, len)
# define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len) bx_instr_lin_write(cpu_id, lin, phy, len) # define BX_INSTR_LIN_WRITE(cpu_id, lin, phy, len)
# define BX_INSTR_MEM_CODE(cpu_id, linear, size) # define BX_INSTR_MEM_CODE(cpu_id, linear, size)
# define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw) # define BX_INSTR_MEM_DATA(cpu_id, linear, size, rw) bx_instr_mem_data(cpu_id, linear, size, rw)
/* called from memory object */ /* called from memory object */
# define BX_INSTR_PHY_WRITE(addr, len) # define BX_INSTR_PHY_WRITE(addr, len)