diff --git a/bochs/cpu/ctrl_xfer_pro.cc b/bochs/cpu/ctrl_xfer_pro.cc
index 19dbfe69d..ef38a14bc 100644
--- a/bochs/cpu/ctrl_xfer_pro.cc
+++ b/bochs/cpu/ctrl_xfer_pro.cc
@@ -1,5 +1,5 @@
 ////////////////////////////////////////////////////////////////////////
-// $Id: ctrl_xfer_pro.cc,v 1.74 2008-05-17 19:30:55 sshwarts Exp $
+// $Id: ctrl_xfer_pro.cc,v 1.75 2008-05-21 21:38:58 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -127,7 +127,7 @@ void BX_CPU_C::branch_far32(bx_selector_t *selector,
 {
   /* instruction pointer must be in code segment limit else #GP(0) */
   if (eip > descriptor->u.segment.limit_scaled) {
-    BX_ERROR(("branch_far: EIP > limit"));
+    BX_ERROR(("branch_far32: EIP > limit"));
     exception(BX_GP_EXCEPTION, 0, 0);
   }
 
@@ -145,7 +145,7 @@ void BX_CPU_C::branch_far64(bx_selector_t *selector,
 #if BX_SUPPORT_X86_64
   if (long_mode() && descriptor->u.segment.l) {
     if (! IsCanonical(rip)) {
-      BX_ERROR(("branch_far: canonical RIP violation"));
+      BX_ERROR(("branch_far64: canonical RIP violation"));
       exception(BX_GP_EXCEPTION, 0, 0);
     }
   }
@@ -154,7 +154,7 @@ void BX_CPU_C::branch_far64(bx_selector_t *selector,
   {
     /* instruction pointer must be in code segment limit else #GP(0) */
     if (rip > descriptor->u.segment.limit_scaled) {
-      BX_ERROR(("branch_far: RIP > limit"));
+      BX_ERROR(("branch_far64: RIP > limit"));
       exception(BX_GP_EXCEPTION, 0, 0);
     }
   }
diff --git a/bochs/cpu/exception.cc b/bochs/cpu/exception.cc
index 2e25251f9..42293ea4f 100644
--- a/bochs/cpu/exception.cc
+++ b/bochs/cpu/exception.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: exception.cc,v 1.116 2008-05-15 20:10:00 sshwarts Exp $
+// $Id: exception.cc,v 1.117 2008-05-21 21:38:59 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -240,7 +240,7 @@ void BX_CPU_C::long_mode_int(Bit8u vector, bx_bool is_INT, bx_bool is_error_code
 
     // check selector and descriptor for new stack in current TSS
     if (ist > 0) {
-      BX_DEBUG(("interrupt(long mode): trap to IST, vector = %d\n",ist));
+      BX_DEBUG(("interrupt(long mode): trap to IST, vector = %d", ist));
       get_RSP_from_TSS(ist+3, &RSP);
     }
 
diff --git a/bochs/cpu/paging.cc b/bochs/cpu/paging.cc
index 2000124b6..409d406cd 100644
--- a/bochs/cpu/paging.cc
+++ b/bochs/cpu/paging.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: paging.cc,v 1.133 2008-05-19 20:05:03 sshwarts Exp $
+// $Id: paging.cc,v 1.134 2008-05-21 21:38:59 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -552,6 +552,8 @@ void BX_CPU_C::TLB_flush(bx_bool invalidateGlobal)
 
 void BX_CPU_C::TLB_invlpg(bx_address laddr)
 {
+  BX_DEBUG(("TLB_invlpg(0x"FMT_ADDRX"): invalidate TLB entry", laddr));
+
   unsigned TLB_index = BX_TLB_INDEX_OF(laddr, 0);
   bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
   if (tlbEntry->lpf == LPFOf(laddr)) {