From 4a8d69caf639f29cee687b1b8661443ced8d8fda Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Tue, 23 Nov 2010 15:42:26 +0000 Subject: [PATCH] bugfix for x86-64 mode --- bochs/cpu/i387.h | 4 ++-- bochs/disasm/dis_groups.cc | 22 +++++++++++----------- bochs/fpu/fpu.cc | 8 +------- 3 files changed, 14 insertions(+), 20 deletions(-) diff --git a/bochs/cpu/i387.h b/bochs/cpu/i387.h index 3cbc848d9..1c3393804 100644 --- a/bochs/cpu/i387.h +++ b/bochs/cpu/i387.h @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: i387.h,v 1.41 2010-09-26 20:35:24 sshwarts Exp $ +// $Id: i387.h,v 1.42 2010-11-23 15:42:26 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2004-2009 Stanislav Shwartsman @@ -29,7 +29,7 @@ #include "fpu/softfloat.h" #define BX_FPU_REG(index) \ - (BX_CPU_THIS_PTR the_i387.st_space[index]) + (BX_CPU_THIS_PTR the_i387.st_space[index & 0x7]) #if defined(NEED_CPU_REG_SHORTCUTS) #define FPU_PARTIAL_STATUS (BX_CPU_THIS_PTR the_i387.swd) diff --git a/bochs/disasm/dis_groups.cc b/bochs/disasm/dis_groups.cc index 56f50c6a5..631208fa3 100644 --- a/bochs/disasm/dis_groups.cc +++ b/bochs/disasm/dis_groups.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: dis_groups.cc,v 1.54 2010-11-23 14:59:36 sshwarts Exp $ +// $Id: dis_groups.cc,v 1.55 2010-11-23 15:42:26 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2005-2009 Stanislav Shwartsman @@ -330,9 +330,9 @@ void disassembler::ST0(const x86_insn *insn) void disassembler::STi(const x86_insn *insn) { if (intel_mode) - dis_sprintf ("st(%d)", insn->rm); + dis_sprintf ("st(%d)", insn->rm & 7); else - dis_sprintf("%%st(%d)", insn->rm); + dis_sprintf("%%st(%d)", insn->rm & 7); } // 16-bit general purpose register @@ -363,17 +363,17 @@ void disassembler::Ry(const x86_insn *insn) void disassembler::Pq(const x86_insn *insn) { if (intel_mode) - dis_sprintf ("mm%d", insn->nnn); + dis_sprintf ("mm%d", insn->nnn & 0x7); else - dis_sprintf("%%mm%d", insn->nnn); + dis_sprintf("%%mm%d", insn->nnn & 0x7); } void disassembler::Nq(const x86_insn *insn) { if (intel_mode) - dis_sprintf ("mm%d", insn->rm); + dis_sprintf ("mm%d", insn->rm & 0x7); else - dis_sprintf("%%mm%d", insn->rm); + dis_sprintf("%%mm%d", insn->rm & 0x7); } void disassembler::Qd(const x86_insn *insn) @@ -381,9 +381,9 @@ void disassembler::Qd(const x86_insn *insn) if (insn->mod == 3) { if (intel_mode) - dis_sprintf ("mm%d", insn->rm); + dis_sprintf ("mm%d", insn->rm & 0x7); else - dis_sprintf("%%mm%d", insn->rm); + dis_sprintf("%%mm%d", insn->rm & 0x7); } else (this->*resolve_modrm)(insn, D_SIZE); @@ -394,9 +394,9 @@ void disassembler::Qq(const x86_insn *insn) if (insn->mod == 3) { if (intel_mode) - dis_sprintf ("mm%d", insn->rm); + dis_sprintf ("mm%d", insn->rm & 0x7); else - dis_sprintf("%%mm%d", insn->rm); + dis_sprintf("%%mm%d", insn->rm & 0x7); } else (this->*resolve_modrm)(insn, Q_SIZE); diff --git a/bochs/fpu/fpu.cc b/bochs/fpu/fpu.cc index 1e39caf07..c4662cc81 100644 --- a/bochs/fpu/fpu.cc +++ b/bochs/fpu/fpu.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: fpu.cc,v 1.65 2010-11-11 15:48:56 sshwarts Exp $ +// $Id: fpu.cc,v 1.66 2010-11-23 15:42:26 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2003-2009 Stanislav Shwartsman @@ -51,12 +51,6 @@ void BX_CPU_C::FPU_update_last_instruction(bxInstruction_c *i) BX_CPU_THIS_PTR the_i387.fds = BX_CPU_THIS_PTR sregs[i->seg()].selector.value; BX_CPU_THIS_PTR the_i387.fdp = RMAddr(i); } -#if BX_SUPPORT_X86_64 - else { - // it is possible that rm() register was extended by REX prefix - i->setRm(i->rm() & 7); - } -#endif } void BX_CPU_C::FPU_check_pending_exceptions(void)