According to AMD docs INVLD/WBINVLD instructions not required to flush TLBs
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: proc_ctrl.cc,v 1.186 2007-12-13 21:41:32 sshwarts Exp $
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// $Id: proc_ctrl.cc,v 1.187 2007-12-14 10:15:12 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -143,9 +143,7 @@ void BX_CPU_C::INVD(bxInstruction_c *i)
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exception(BX_GP_EXCEPTION, 0, 0);
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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BX_DEBUG(("INVD: Flush caches and TLB !"));
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BX_DEBUG(("INVD: Flush internal caches !"));
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BX_INSTR_CACHE_CNTRL(BX_CPU_ID, BX_INSTR_INVD);
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TLB_flush(1); // 1 = Flush Global entries too
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#if BX_SUPPORT_ICACHE
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#if BX_SUPPORT_ICACHE
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flushICaches();
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flushICaches();
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#endif
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#endif
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@ -166,9 +164,7 @@ void BX_CPU_C::WBINVD(bxInstruction_c *i)
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exception(BX_GP_EXCEPTION, 0, 0);
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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BX_DEBUG(("WBINVD: Flush caches and TLB !"));
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BX_DEBUG(("WBINVD: Flush internal caches !"));
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BX_INSTR_CACHE_CNTRL(BX_CPU_ID, BX_INSTR_WBINVD);
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TLB_flush(1); // 1 = Flush Global entries too
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#if BX_SUPPORT_ICACHE
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#if BX_SUPPORT_ICACHE
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flushICaches();
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flushICaches();
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#endif
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#endif
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