PUSH segment register fix to be like real CPU

This commit is contained in:
Stanislav Shwartsman 2010-04-30 09:12:52 +00:00
parent 1f0d4f9663
commit 48a461116f
2 changed files with 70 additions and 12 deletions

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: stack32.cc,v 1.64 2009-12-04 16:53:12 sshwarts Exp $
// $Id: stack32.cc,v 1.65 2010-04-30 09:12:52 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001-2009 The Bochs Project
@ -57,32 +57,92 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::POP_ERX(bxInstruction_c *i)
void BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH32_CS(bxInstruction_c *i)
{
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
Bit16u val_16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
write_virtual_word_32(BX_SEG_REG_SS, (Bit32u) (ESP-4), val_16);
ESP -= 4;
}
else
{
write_virtual_word_32(BX_SEG_REG_SS, (Bit16u) (SP-4), val_16);
SP -= 4;
}
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH32_DS(bxInstruction_c *i)
{
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
Bit16u val_16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
write_virtual_word_32(BX_SEG_REG_SS, (Bit32u) (ESP-4), val_16);
ESP -= 4;
}
else
{
write_virtual_word_32(BX_SEG_REG_SS, (Bit16u) (SP-4), val_16);
SP -= 4;
}
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH32_ES(bxInstruction_c *i)
{
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
Bit16u val_16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
write_virtual_word_32(BX_SEG_REG_SS, (Bit32u) (ESP-4), val_16);
ESP -= 4;
}
else
{
write_virtual_word_32(BX_SEG_REG_SS, (Bit16u) (SP-4), val_16);
SP -= 4;
}
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH32_FS(bxInstruction_c *i)
{
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
Bit16u val_16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
write_virtual_word_32(BX_SEG_REG_SS, (Bit32u) (ESP-4), val_16);
ESP -= 4;
}
else
{
write_virtual_word_32(BX_SEG_REG_SS, (Bit16u) (SP-4), val_16);
SP -= 4;
}
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH32_GS(bxInstruction_c *i)
{
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
Bit16u val_16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
write_virtual_word_32(BX_SEG_REG_SS, (Bit32u) (ESP-4), val_16);
ESP -= 4;
}
else
{
write_virtual_word_32(BX_SEG_REG_SS, (Bit16u) (SP-4), val_16);
SP -= 4;
}
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH32_SS(bxInstruction_c *i)
{
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value);
Bit16u val_16 = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) {
write_virtual_word_32(BX_SEG_REG_SS, (Bit32u) (ESP-4), val_16);
ESP -= 4;
}
else
{
write_virtual_word_32(BX_SEG_REG_SS, (Bit16u) (SP-4), val_16);
SP -= 4;
}
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::POP32_DS(bxInstruction_c *i)

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: stack64.cc,v 1.46 2010-03-12 20:59:05 sshwarts Exp $
// $Id: stack64.cc,v 1.47 2010-04-30 09:12:52 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001-2009 The Bochs Project
@ -64,16 +64,14 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH64_GS(bxInstruction_c *i)
void BX_CPP_AttrRegparmN(1) BX_CPU_C::POP64_FS(bxInstruction_c *i)
{
// this way is faster and RSP safe
Bit64u fs = read_virtual_qword_64(BX_SEG_REG_SS, RSP);
Bit64u fs = read_virtual_word_64(BX_SEG_REG_SS, RSP);
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], (Bit16u) fs);
RSP += 8;
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::POP64_GS(bxInstruction_c *i)
{
// this way is faster and RSP safe
Bit64u gs = read_virtual_qword_64(BX_SEG_REG_SS, RSP);
Bit64u gs = read_virtual_word_64(BX_SEG_REG_SS, RSP);
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], (Bit16u) gs);
RSP += 8;
}