Two changes from Debian patches for 2.6.10.

- pcidev: added support for recent Linux kernels
- fixed bochsrc manual page table
This commit is contained in:
Volker Ruppert 2020-01-01 19:02:50 +00:00
parent 546b4a78e5
commit 4031aea715
2 changed files with 16 additions and 12 deletions

View File

@ -1483,17 +1483,17 @@ AC_ARG_ENABLE(pcidev,
AC_MSG_NOTICE([Linux detected as host for PCI host device mapping])
linux_version=`uname -r`
case "$linux_version" in
2.2*)
AC_MSG_ERROR([Linux kernel 2.4, 2.6 or 3.x is required for PCI host device mapping])
;;
2.4*)
PCIDEV_MODULE_MAKE_ALL="all-kernel24"
KERNEL_MODULE_SUFFIX="o"
;;
2.6*|3.*)
*)
PCIDEV_MODULE_MAKE_ALL="all-kernel26"
KERNEL_MODULE_SUFFIX="ko"
;;
*)
AC_MSG_ERROR([Linux kernel 2.4, 2.6 or 3.x is required for PCI host device mapping])
;;
esac
KERNELDIR="/lib/modules/$linux_version/build"
LSMOD="lsmod"

View File

@ -1,5 +1,5 @@
.\"Document Author: Timothy R. Butler - tbutler@uninetsolutions.com"
.TH bochsrc 5 "06 May 2018" "bochsrc" "The Bochs Project"
.TH bochsrc 5 "01 Jan 2020" "bochsrc" "The Bochs Project"
.\"SKIP_SECTION"
.SH NAME
bochsrc \- Configuration file for Bochs.
@ -192,13 +192,17 @@ starts to autorepeat, and the measurement of
BogoMips and other benchmarks.
Example Specifications[1]
Bochs Machine/Compiler Mips
--------------------------------------------------------------------
2.4.6 3.4Ghz Intel Core i7 2600 with Win7x64/g++ 4.5.2 85 to 95 Mips
2.3.7 3.2Ghz Intel Core 2 Q9770 with WinXP/g++ 3.4 50 to 55 Mips
2.3.7 2.6Ghz Intel Core 2 Duo with WinXP/g++ 3.4 38 to 43 Mips
2.2.6 2.6Ghz Intel Core 2 Duo with WinXP/g++ 3.4 21 to 25 Mips
2.2.6 2.1Ghz Athlon XP with Linux 2.6/g++ 3.4 12 to 15 Mips
.TS
tab(@);
l l l.
Bochs@Machine/Compiler@Mips
_
2.4.6@3.4Ghz Core i7 2600 w/ Win7x64/g++ 4.5.2@85-95 Mips
2.3.7@3.2Ghz Core 2 Q9770 w/ WinXP/g++ 3.4@50-55 Mips
2.3.7@2.6Ghz Core 2 Duo w/ WinXP/g++ 3.4@38-43 Mips
2.2.6@2.6Ghz Core 2 Duo w/ WinXP/g++ 3.4@21-25 Mips
2.2.6@2.1Ghz Athlon XP w/ Linux 2.6/g++ 3.4@12-15 Mips
.TE
[1] IPS measurements depend on OS and compiler
configuration in addition to processor clock