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fixed crash in single cpu mode due to early construction of APIC

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This commit is contained in:
Stanislav Shwartsman 2010-04-03 10:14:42 +00:00
parent 330cdf1f0d
commit 3f4cf46c2d
2 changed files with 14 additions and 12 deletions
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9
bochs/cpu/apic.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: apic.cc,v 1.139 2010-04-03 05:59:07 sshwarts Exp $
// $Id: apic.cc,v 1.140 2010-04-03 10:14:42 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2002-2009 Zwane Mwaikambo, Stanislav Shwartsman
@ -28,6 +28,7 @@
#if BX_SUPPORT_APIC
extern Bit32u apic_id_mask;
extern bx_bool simulate_xapic;
#define LOG_THIS this->
@ -187,11 +188,7 @@ bx_local_apic_c::bx_local_apic_c(BX_CPU_C *mycpu, unsigned id)
BX_CPU(0)->lapic.periodic_smf, 0, 0, 0, "lapic");
timer_active = 0;
#if BX_CPU_LEVEL >= 6
xapic = SIM->get_param_bool(BXPN_CPUID_XAPIC)->get();
#else
xapic = 0;
#endif
xapic = simulate_xapic; // xAPIC or legacy APIC
reset(BX_RESET_HARDWARE);
}

17
bochs/main.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: main.cc,v 1.417 2010-03-05 20:42:10 sshwarts Exp $
// $Id: main.cc,v 1.418 2010-04-03 10:14:42 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001-2009 The Bochs Project
@ -80,6 +80,7 @@ bx_startup_flags_t bx_startup_flags;
bx_bool bx_user_quit;
Bit8u bx_cpu_count;
Bit32u apic_id_mask; // determinted by XAPIC option
bx_bool simulate_xapic;
/* typedefs */
@ -866,20 +867,20 @@ int bx_begin_simulation (int argc, char *argv[])
SIM->get_param_num(BXPN_CPU_NTHREADS)->get();
#if BX_CPU_LEVEL >= 6
bx_bool xapic = SIM->get_param_bool(BXPN_CPUID_XAPIC)->get();
simulate_xapic = SIM->get_param_bool(BXPN_CPUID_XAPIC)->get();
#else
bx_bool xapic = 0;
simulate_xapic = 0;
#endif
// For P6 and Pentium family processors the local APIC ID feild is 4 bits
// APIC_MAX_ID indicate broadcast so it can't be used as valid APIC ID
apic_id_mask = xapic ? 0xFF : 0xF;
apic_id_mask = simulate_xapic ? 0xFF : 0xF;
// leave one APIC ID to I/O APIC
unsigned max_smp_threads = apic_id_mask - 1;
if (bx_cpu_count > max_smp_threads) {
BX_PANIC(("cpu: too many SMP threads defined, only %u threads supported by %sAPIC",
max_smp_threads, xapic ? "x" : "legacy "));
max_smp_threads, simulate_xapic ? "x" : "legacy "));
}
BX_ASSERT(bx_cpu_count > 0);
@ -1043,7 +1044,11 @@ void bx_init_hardware()
#endif
BX_INFO((" x86-64 support: %s",BX_SUPPORT_X86_64?"yes":"no"));
BX_INFO((" MWAIT support: %s",BX_SUPPORT_MONITOR_MWAIT?"yes":"no"));
BX_INFO((" VMX support: %s",BX_SUPPORT_VMX?"yes":"no"));
#if BX_SUPPORT_VMX
BX_INFO((" VMX support: %d",BX_SUPPORT_VMX));
#else
BX_INFO((" VMX support: no",));
#endif
#endif
BX_INFO(("Optimization configuration"));
BX_INFO((" RepeatSpeedups support: %s",BX_SupportRepeatSpeedups?"yes":"no"));