Fixed some warnings
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4bc681d0cc
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35789633e8
@ -5,7 +5,7 @@
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// Copyright (c) 2004 Makoto Suzuki (suzu)
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// Volker Ruppert (vruppert)
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// Robin Kay (komadori)
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// Copyright (C) 2004-2013 The Bochs Project
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// Copyright (C) 2004-2014 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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@ -2382,12 +2382,10 @@ void bx_svga_cirrus_c::svga_init_pcihandlers(void)
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PCI_CLASS_HEADERTYPE_00h);
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BX_CIRRUS_THIS pci_conf[0x04] = (PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS);
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WriteHostDWordToLittleEndian(
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&BX_CIRRUS_THIS pci_conf[0x10],
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(PCI_MAP_MEM | PCI_MAP_MEMFLAGS_32BIT | PCI_MAP_MEMFLAGS_CACHEABLE));
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WriteHostDWordToLittleEndian(
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&BX_CIRRUS_THIS pci_conf[0x14],
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(PCI_MAP_MEM | PCI_MAP_MEMFLAGS_32BIT));
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BX_CIRRUS_THIS pci_conf[0x10] =
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(PCI_MAP_MEM | PCI_MAP_MEMFLAGS_32BIT | PCI_MAP_MEMFLAGS_CACHEABLE);
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BX_CIRRUS_THIS pci_conf[0x14] =
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(PCI_MAP_MEM | PCI_MAP_MEMFLAGS_32BIT);
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BX_CIRRUS_THIS pci_base_address[0] = 0;
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BX_CIRRUS_THIS pci_base_address[1] = 0;
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@ -2530,18 +2528,19 @@ void bx_svga_cirrus_c::svga_bitblt()
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Bit32u dstaddr;
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Bit32u srcaddr;
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Bit32u offset;
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Bit8u *cregs = BX_CIRRUS_THIS control.reg;
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ReadHostWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x20],tmp16);
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BX_CIRRUS_THIS bitblt.bltwidth = ((int)tmp16 & (int)0x1fff) + 1;
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ReadHostWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x22],tmp16);
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BX_CIRRUS_THIS bitblt.bltheight = ((int)tmp16 & (int)0x07ff) + 1;
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ReadHostWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x24],tmp16);
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BX_CIRRUS_THIS bitblt.dstpitch = (int)tmp16 & (int)0x1fff;
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ReadHostWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x26],tmp16);
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BX_CIRRUS_THIS bitblt.srcpitch = (int)tmp16 & (int)0x1fff;
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ReadHostDWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x28],tmp32);
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ReadHostWordFromLittleEndian(&cregs[0x20], tmp16);
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BX_CIRRUS_THIS bitblt.bltwidth = ((int)(tmp16 & 0x1fff)) + 1;
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ReadHostWordFromLittleEndian(&cregs[0x22], tmp16);
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BX_CIRRUS_THIS bitblt.bltheight = ((int)(tmp16 & 0x07ff)) + 1;
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ReadHostWordFromLittleEndian(&cregs[0x24], tmp16);
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BX_CIRRUS_THIS bitblt.dstpitch = (int)(tmp16 & 0x1fff);
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ReadHostWordFromLittleEndian(&cregs[0x26], tmp16);
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BX_CIRRUS_THIS bitblt.srcpitch = (int)(tmp16 & 0x1fff);
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ReadHostDWordFromLittleEndian(&cregs[0x28], tmp32);
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dstaddr = tmp32 & BX_CIRRUS_THIS memsize_mask;
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ReadHostDWordFromLittleEndian(&BX_CIRRUS_THIS control.reg[0x2c],tmp32);
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ReadHostDWordFromLittleEndian(&cregs[0x2c], tmp32);
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srcaddr = tmp32 & BX_CIRRUS_THIS memsize_mask;
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BX_CIRRUS_THIS bitblt.srcaddr = srcaddr;
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BX_CIRRUS_THIS bitblt.bltmode = BX_CIRRUS_THIS control.reg[0x30];
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