diff --git a/bochs/cpu/crregs.cc b/bochs/cpu/crregs.cc index 5b56cbcf1..40b189191 100755 --- a/bochs/cpu/crregs.cc +++ b/bochs/cpu/crregs.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: crregs.cc,v 1.12 2010-04-09 11:31:55 sshwarts Exp $ +// $Id: crregs.cc,v 1.13 2010-04-22 17:51:37 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2010 Stanislav Shwartsman @@ -870,7 +870,7 @@ bx_bool BX_CPP_AttrRegparmN(1) BX_CPU_C::SetCR0(bx_address val) BX_CPU_THIS_PTR cr0.set32(val_32); #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); + handleAlignmentCheck(/* CR0.AC reloaded */); #endif handleCpuModeChange(); diff --git a/bochs/cpu/ctrl_xfer_pro.cc b/bochs/cpu/ctrl_xfer_pro.cc index 358065504..f646520e2 100644 --- a/bochs/cpu/ctrl_xfer_pro.cc +++ b/bochs/cpu/ctrl_xfer_pro.cc @@ -1,5 +1,5 @@ //////////////////////////////////////////////////////////////////////// -// $Id: ctrl_xfer_pro.cc,v 1.85 2010-04-02 21:22:17 sshwarts Exp $ +// $Id: ctrl_xfer_pro.cc,v 1.86 2010-04-22 17:51:37 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001-2009 The Bochs Project @@ -107,10 +107,10 @@ BX_CPU_C::load_cs(bx_selector_t *selector, bx_descriptor_t *descriptor, Bit8u cp } #endif - updateFetchModeMask(); + updateFetchModeMask(/* CS reloaded */); #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); // CPL was modified + handleAlignmentCheck(/* CPL change */); #endif // Loading CS will invalidate the EIP fetch window. diff --git a/bochs/cpu/debugstuff.cc b/bochs/cpu/debugstuff.cc index 25d02972a..f697c7fa7 100644 --- a/bochs/cpu/debugstuff.cc +++ b/bochs/cpu/debugstuff.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: debugstuff.cc,v 1.111 2009-12-28 10:56:23 sshwarts Exp $ +// $Id: debugstuff.cc,v 1.112 2010-04-22 17:51:37 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001-2009 The Bochs Project @@ -340,7 +340,7 @@ bx_bool BX_CPU_C::dbg_set_sreg(unsigned sreg_no, bx_segment_reg_t *sreg) if (sreg_no == BX_SEG_REG_CS) { handleCpuModeChange(); #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); // CPL was modified + handleAlignmentCheck(/* CPL change */); #endif invalidate_prefetch_q(); return 1; diff --git a/bochs/cpu/flag_ctrl_pro.cc b/bochs/cpu/flag_ctrl_pro.cc index 492869051..172ac5291 100644 --- a/bochs/cpu/flag_ctrl_pro.cc +++ b/bochs/cpu/flag_ctrl_pro.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: flag_ctrl_pro.cc,v 1.39 2009-12-04 16:53:12 sshwarts Exp $ +// $Id: flag_ctrl_pro.cc,v 1.40 2010-04-22 17:51:37 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001-2009 The Bochs Project @@ -48,7 +48,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::setEFlags(Bit32u val) BX_CPU_THIS_PTR lf_flags_status = 0; // OSZAPC flags are known. #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); + handleAlignmentCheck(/* EFLAGS.AC reloaded */); #endif handleCpuModeChange(); // VM flag might be changed diff --git a/bochs/cpu/proc_ctrl.cc b/bochs/cpu/proc_ctrl.cc index 3c70b6b24..b90cd7818 100644 --- a/bochs/cpu/proc_ctrl.cc +++ b/bochs/cpu/proc_ctrl.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: proc_ctrl.cc,v 1.332 2010-04-08 16:38:41 sshwarts Exp $ +// $Id: proc_ctrl.cc,v 1.333 2010-04-22 17:51:37 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001-2010 The Bochs Project @@ -533,14 +533,12 @@ void BX_CPU_C::handleAlignmentCheck(void) if (BX_CPU_THIS_PTR alignment_check_mask == 0) { BX_CPU_THIS_PTR alignment_check_mask = 0xF; BX_INFO(("Enable alignment check (#AC exception)")); -// BX_CPU_THIS_PTR iCache.flushICacheEntries(); } } else { if (BX_CPU_THIS_PTR alignment_check_mask != 0) { BX_CPU_THIS_PTR alignment_check_mask = 0; BX_INFO(("Disable alignment check (#AC exception)")); -// BX_CPU_THIS_PTR iCache.flushICacheEntries(); } } } @@ -868,7 +866,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SYSENTER(bxInstruction_c *i) #if BX_SUPPORT_X86_64 handleCpuModeChange(); // mode change could happen only when in long_mode() #else - updateFetchModeMask(); + updateFetchModeMask(/* CS reloaded */); #endif #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK @@ -979,11 +977,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SYSEXIT(bxInstruction_c *i) #if BX_SUPPORT_X86_64 handleCpuModeChange(); // mode change could happen only when in long_mode() #else - updateFetchModeMask(); + updateFetchModeMask(/* CS reloaded */); #endif -#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); // CPL was modified +#if BX_SUPPORT_ALIGNMENT_CHECK + handleAlignmentCheck(/* CPL change */); #endif parse_selector(((BX_CPU_THIS_PTR msr.sysenter_cs_msr + (i->os64L() ? 40:24)) & BX_SELECTOR_RPL_MASK) | 3, @@ -1097,7 +1095,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SYSCALL(bxInstruction_c *i) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.l = 0; /* 32-bit code */ BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0; /* available for use by system */ - updateFetchModeMask(); + updateFetchModeMask(/* CS reloaded */); #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK BX_CPU_THIS_PTR alignment_check_mask = 0; // CPL=0 @@ -1194,8 +1192,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SYSRET(bxInstruction_c *i) handleCpuModeChange(); // mode change could only happen when in long64 mode -#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); // CPL was modified +#if BX_SUPPORT_ALIGNMENT_CHECK + handleAlignmentCheck(/* CPL change */); #endif // SS base, limit, attributes unchanged @@ -1227,10 +1225,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SYSRET(bxInstruction_c *i) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.l = 0; /* 32-bit code */ BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.avl = 0; /* available for use by system */ - updateFetchModeMask(); + updateFetchModeMask(/* CS reloaded */); -#if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); // CPL was modified +#if BX_SUPPORT_ALIGNMENT_CHECK + handleAlignmentCheck(/* CPL change */); #endif // SS base, limit, attributes unchanged diff --git a/bochs/cpu/segment_ctrl_pro.cc b/bochs/cpu/segment_ctrl_pro.cc index 6f1a8558e..feda80099 100644 --- a/bochs/cpu/segment_ctrl_pro.cc +++ b/bochs/cpu/segment_ctrl_pro.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: segment_ctrl_pro.cc,v 1.128 2010-03-14 15:51:26 sshwarts Exp $ +// $Id: segment_ctrl_pro.cc,v 1.129 2010-04-22 17:51:37 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001-2009 The Bochs Project @@ -200,9 +200,9 @@ BX_CPU_C::load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value) if (seg == &BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS]) { invalidate_prefetch_q(); - updateFetchModeMask(); + updateFetchModeMask(/* CS reloaded */); #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); // CPL was modified + handleAlignmentCheck(/* CPL change */); #endif } } diff --git a/bochs/cpu/tasking.cc b/bochs/cpu/tasking.cc index 2d921227b..16a2c1dfc 100644 --- a/bochs/cpu/tasking.cc +++ b/bochs/cpu/tasking.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: tasking.cc,v 1.92 2010-04-14 17:33:19 sshwarts Exp $ +// $Id: tasking.cc,v 1.93 2010-04-22 17:51:37 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001-2010 The Bochs Project @@ -668,7 +668,7 @@ void BX_CPU_C::task_switch(bxInstruction_c *i, bx_selector_t *tss_selector, exception(BX_TS_EXCEPTION, raw_cs_selector & 0xfffc); } - updateFetchModeMask(); + updateFetchModeMask(/* CS reloaded */); #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK handleAlignmentCheck(); // task switch, CPL was modified diff --git a/bochs/cpu/vm8086.cc b/bochs/cpu/vm8086.cc index bbc82ec5a..d1942adac 100644 --- a/bochs/cpu/vm8086.cc +++ b/bochs/cpu/vm8086.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: vm8086.cc,v 1.60 2010-03-15 13:22:14 sshwarts Exp $ +// $Id: vm8086.cc,v 1.61 2010-04-22 17:51:37 sshwarts Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001-2009 The Bochs Project @@ -256,7 +256,7 @@ void BX_CPU_C::init_v8086_mode(void) handleCpuModeChange(); #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK - handleAlignmentCheck(); // CPL was modified + handleAlignmentCheck(/* CPL change */); #endif }