Fixed interrupt function for
286 int/trap gate, in vm8086 mode
This commit is contained in:
Stanislav Shwartsman
parent
dafc5fd193
commit
23e2895f8e
@ -88,7 +88,7 @@ typedef struct
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#define BX_386_INTERRUPT_GATE (0xe)
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#define BX_386_TRAP_GATE (0xf)
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union {
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union {
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struct {
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bx_bool executable; /* 1=code, 0=data or stack segment */
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bx_bool c_ed; /* for code: 1=conforming,
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@ -143,8 +143,8 @@ typedef struct
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struct {
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bx_address base; /* 286=24 386+ =32/64 bit LDT base */
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Bit16u limit; /* 286+ =16 bit LDT limit */
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} ldt;
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} u;
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} ldt;
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} u;
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} bx_descriptor_t;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: exception.cc,v 1.47 2005-02-27 17:41:27 sshwarts Exp $
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// $Id: exception.cc,v 1.48 2005-03-01 20:55:25 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -387,7 +387,7 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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(unsigned) gate_descriptor.type));
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exception(BX_GP_EXCEPTION, vector*8 + 2, 0);
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return;
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}
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}
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// if software interrupt, then gate descripor DPL must be >= CPL,
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// else #GP(vector * 8 + 2 + EXT)
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@ -459,7 +459,7 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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// instruction pointer must be in CS limit, else #GP(0)
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if (EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
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BX_ERROR(("exception(): eIP > CS.limit"));
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BX_ERROR(("exception(): EIP > CS.limit"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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@ -519,8 +519,15 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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bx_selector_t ss_selector;
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int bytes;
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int is_v8086_mode = v8086_mode();
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BX_DEBUG(("interrupt(): INTERRUPT TO INNER PRIVILEGE"));
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if (is_v8086_mode && cs_descriptor.dpl != 0) {
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// if code segment DPL != 0 then #GP(new code segment selector)
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exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc, 0);
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}
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// check selector and descriptor for new stack in current TSS
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get_SS_ESP_from_TSS(cs_descriptor.dpl,
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&SS_for_cpl_x, &ESP_for_cpl_x);
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@ -556,8 +563,8 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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// descriptor must indicate writable data segment,
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// else #TS(SS selector + EXT)
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if (ss_descriptor.valid==0 ||
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ss_descriptor.segment==0 ||
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ss_descriptor.u.segment.executable==1 ||
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ss_descriptor.segment==0 ||
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ss_descriptor.u.segment.executable==1 ||
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ss_descriptor.u.segment.r_w==0)
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{
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BX_PANIC(("interrupt(): SS not writable data segment"));
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@ -577,7 +584,7 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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bytes = 24;
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else
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bytes = 20;
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if (v8086_mode())
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if (is_v8086_mode)
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bytes += 16;
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}
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else {
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@ -586,25 +593,22 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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bytes = 12;
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else
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bytes = 10;
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if (v8086_mode()) {
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if (is_v8086_mode) {
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bytes += 8;
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BX_PANIC(("interrupt: int/trap gate VM"));
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}
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}
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// 486,Pentium books
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// new stack must have room for 10/12 bytes, else #SS(0) 486 book
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// PPro+
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// new stack must have room for 10/12 bytes, else #SS(seg selector)
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// new stack must have enough room, else #SS(seg selector)
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if ( !can_push(&ss_descriptor, ESP_for_cpl_x, bytes) )
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{
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BX_PANIC(("interrupt(): new stack doesn't have room for %u bytes", (unsigned) bytes));
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BX_DEBUG(("interrupt(): new stack doesn't have room for %u bytes", (unsigned) bytes));
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exception(BX_SS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
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}
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// IP must be within CS segment boundaries, else #GP(0)
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if (gate_dest_offset > cs_descriptor.u.segment.limit_scaled) {
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BX_PANIC(("interrupt(): gate eIP > CS.limit"));
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BX_DEBUG(("interrupt(): gate EIP > CS.limit"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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@ -628,8 +632,6 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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EIP = gate_dest_offset;
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Bit32u eflags = read_eflags();
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Bit16u flags = read_flags();
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int is_v8086_mode = v8086_mode();
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// if INTERRUPT GATE set IF to 0
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if ( !(gate_descriptor.type & 1) ) // even is int-gate
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@ -639,22 +641,32 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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BX_CPU_THIS_PTR clear_RF ();
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BX_CPU_THIS_PTR clear_NT ();
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if (gate_descriptor.type>=14) { // 386 int/trap gate
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if (is_v8086_mode) {
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if (is_v8086_mode)
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{
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if (gate_descriptor.type>=14) { // 386 int/trap gate
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value = 0;
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}
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else {
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
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}
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value = 0;
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}
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if (gate_descriptor.type>=14) { // 386 int/trap gate
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// push long pointer to old stack onto new stack
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push_32(old_SS);
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push_32(old_ESP);
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@ -669,16 +681,13 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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if ( is_error_code )
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push_32(error_code);
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}
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else { // 286 int/trap gate
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if (is_v8086_mode) {
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BX_PANIC(("286 int/trap gate, VM"));
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}
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else { // 286 int/trap gate
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// push long pointer to old stack onto new stack
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push_16(old_SS);
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push_16(old_ESP); // ignores upper 16bits
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// push FLAGS
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push_16(flags);
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push_16(eflags); // ignores upper 16bits
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// push return address onto new stack
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push_16(old_CS);
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@ -692,6 +701,7 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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}
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if (v8086_mode()) {
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// if code segment DPL != 0 then #GP(new code segment selector)
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exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc, 0);
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}
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@ -729,7 +739,7 @@ void BX_CPU_C::interrupt(Bit8u vector, bx_bool is_INT, bx_bool is_error_code, Bi
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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// eIP must be in CS limit else #GP(0)
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// EIP must be in CS limit else #GP(0)
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if (gate_dest_offset > cs_descriptor.u.segment.limit_scaled) {
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BX_ERROR(("interrupt(): IP > cs descriptor limit"));
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exception(BX_GP_EXCEPTION, 0, 0);
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