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Simplified code for the "optromimage" and "optramimage" options stuff (saving

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configuration, loading images). Cleaned up "romimage" option parsing and
prepared parameter "options" for the behaviour of the Bochs BIOS.
TODO: implement BIOS option "fastboot" to skip the boot menu prompt.
This commit is contained in:
Volker Ruppert 2017-02-14 20:11:58 +00:00
parent 756fde6267
commit 19b98b1145
5 changed files with 83 additions and 88 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

110
bochs/config.cc
View File

@ -2,7 +2,7 @@
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2002-2016 The Bochs Project
// Copyright (C) 2002-2017 The Bochs Project
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
@ -714,6 +714,11 @@ void bx_init_options()
romaddr->set_base(16);
romaddr->set_format("0x%08x");
romaddr->set_long_format("ROM BIOS address: 0x%08x");
new bx_param_string_c(rom,
"options",
"BIOS options",
"Options for the Bochs BIOS",
"", BX_PATHNAME_LEN);
rom->set_options(rom->SERIES_ASK);
path = new bx_param_filename_c(vgarom,
@ -726,15 +731,16 @@ void bx_init_options()
path->set_initial_val(name);
vgarom->set_options(vgarom->SERIES_ASK);
bx_list_c *optnum;
bx_param_num_c *optaddr;
for (i=0; i<BX_N_OPTROM_IMAGES; i++) {
sprintf(name, "%d", i+1);
sprintf(descr, "Pathname of optional ROM image #%d to load", i+1);
sprintf(label, "Optional ROM image #%d", i+1);
bx_list_c *optnum1 = new bx_list_c(optrom, name, label);
path = new bx_param_filename_c(optnum1,
"path",
optnum = new bx_list_c(optrom, name, label);
path = new bx_param_filename_c(optnum,
"file",
"Path",
descr,
"", BX_PATHNAME_LEN);
@ -742,8 +748,8 @@ void bx_init_options()
strcat(label, " : %s");
path->set_format(strdup(label));
sprintf(descr, "The address at which the optional ROM image #%d should be loaded", i+1);
optaddr = new bx_param_num_c(optnum1,
"addr",
optaddr = new bx_param_num_c(optnum,
"address",
"Address",
descr,
0, BX_MAX_BIT32U,
@ -753,7 +759,10 @@ void bx_init_options()
sprintf(label, "Optional ROM #%d address:", i+1);
strcat(label, " 0x%05x");
optaddr->set_long_format(strdup(label));
optnum1->set_options(optnum1->SERIES_ASK | optnum1->USE_BOX_TITLE);
deplist = new bx_list_c(NULL);
deplist->add(optaddr);
path->set_dependent_list(deplist);
optnum->set_options(optnum->SERIES_ASK | optnum->USE_BOX_TITLE);
}
optrom->set_options(optrom->SHOW_PARENT);
@ -761,9 +770,9 @@ void bx_init_options()
sprintf(name, "%d", i+1);
sprintf(descr, "Pathname of optional RAM image #%d to load", i+1);
sprintf(label, "Optional RAM image #%d", i+1);
bx_list_c *optnum2 = new bx_list_c(optram, name, label);
path = new bx_param_filename_c(optnum2,
"path",
optnum = new bx_list_c(optram, name, label);
path = new bx_param_filename_c(optnum,
"file",
"Path",
descr,
"", BX_PATHNAME_LEN);
@ -771,7 +780,7 @@ void bx_init_options()
strcat(label, " : %s");
path->set_format(strdup(label));
sprintf(descr, "The address at which the optional RAM image #%d should be loaded", i+1);
optaddr = new bx_param_num_c(optnum2,
optaddr = new bx_param_num_c(optnum,
"address",
"Address",
descr,
@ -782,7 +791,10 @@ void bx_init_options()
sprintf(label, "Optional RAM #%d address:", i+1);
strcat(label, " 0x%05x");
optaddr->set_long_format(strdup(label));
optnum2->set_options(optnum2->SERIES_ASK | optnum2->USE_BOX_TITLE);
deplist = new bx_list_c(NULL);
deplist->add(optaddr);
path->set_dependent_list(deplist);
optnum->set_options(optnum->SERIES_ASK | optnum->USE_BOX_TITLE);
}
optram->set_options(optram->SHOW_PARENT);
memory->set_options(memory->SHOW_PARENT | memory->USE_TAB_WINDOW);
@ -2632,25 +2644,25 @@ static int parse_line_formatted(const char *context, int num_params, char *param
}
}
} else if (!strcmp(params[0], "romimage")) {
if ((num_params < 2) || (num_params > 3)) {
if ((num_params < 2) || (num_params > 4)) {
PARSE_ERR(("%s: romimage directive: wrong # args.", context));
}
if (!strncmp(params[1], "file=", 5)) {
SIM->get_param_string(BXPN_ROM_PATH)->set(&params[1][5]);
} else {
PARSE_ERR(("%s: romimage directive malformed.", context));
}
if (num_params == 3) {
if (!strncmp(params[2], "address=", 8)) {
if ((params[2][8] == '0') && (params[2][9] == 'x'))
SIM->get_param_num(BXPN_ROM_ADDRESS)->set(strtoul(&params[2][8], NULL, 16));
// set to default value 0 (auto-detect if no specified)
SIM->get_param_num(BXPN_ROM_ADDRESS)->set(0);
for (i=1; i<num_params; i++) {
if (!strncmp(params[i], "file=", 5)) {
SIM->get_param_string(BXPN_ROM_PATH)->set(&params[i][5]);
} else if (!strncmp(params[i], "address=", 8)) {
if ((params[i][8] == '0') && (params[i][9] == 'x'))
SIM->get_param_num(BXPN_ROM_ADDRESS)->set(strtoul(&params[i][8], NULL, 16));
else
SIM->get_param_num(BXPN_ROM_ADDRESS)->set(strtoul(&params[2][8], NULL, 10));
SIM->get_param_num(BXPN_ROM_ADDRESS)->set(strtoul(&params[i][8], NULL, 10));
} else if (!strncmp(params[i], "options=", 8)) {
SIM->get_param_string(BXPN_ROM_OPTIONS)->set(&params[i][8]);
PARSE_WARN(("%s: romimage: BIOS options not handled yet.", context));
} else {
PARSE_ERR(("%s: romimage directive malformed.", context));
}
} else {
SIM->get_param_num(BXPN_ROM_ADDRESS)->set(0);
}
} else if (!strcmp(params[0], "vgaromimage")) {
if (num_params != 2) {
@ -2663,46 +2675,46 @@ static int parse_line_formatted(const char *context, int num_params, char *param
}
} else if (!strncmp(params[0], "optromimage", 11)) {
int num = atoi(&params[0][11]);
char tmppath[80], tmpaddr[80];
char pname[16];
if ((num < 1) || (num > BX_N_OPTROM_IMAGES)) {
PARSE_ERR(("%s: optromimage%d: not supported", context, num));
}
if (num_params != 3) {
if (num_params > 3) {
PARSE_ERR(("%s: optromimage%d directive: wrong # args.", context, num));
}
sprintf(tmppath, "memory.optrom.%d.path", num);
sprintf(tmpaddr, "memory.optrom.%d.addr", num);
sprintf(pname, "%s.%d", BXPN_OPTROM_BASE, num);
base = (bx_list_c*) SIM->get_param(pname);
for (i=1; i<num_params; i++) {
if (!strncmp(params[i], "file=", 5)) {
SIM->get_param_string(tmppath)->set(&params[i][5]);
SIM->get_param_string("file", base)->set(&params[i][5]);
} else if (!strncmp(params[i], "address=", 8)) {
if ((params[i][8] == '0') && (params[2][9] == 'x'))
SIM->get_param_num(tmpaddr)->set(strtoul(&params[i][8], NULL, 16));
SIM->get_param_num("address", base)->set(strtoul(&params[i][8], NULL, 16));
else
SIM->get_param_num(tmpaddr)->set(strtoul(&params[i][8], NULL, 10));
SIM->get_param_num("address", base)->set(strtoul(&params[i][8], NULL, 10));
} else {
PARSE_ERR(("%s: optromimage%d directive malformed.", context, num));
}
}
} else if (!strncmp(params[0], "optramimage", 11)) {
int num = atoi(&params[0][11]);
char tmppath[80], tmpaddr[80];
char pname[16];
if ((num < 1) || (num > BX_N_OPTRAM_IMAGES)) {
PARSE_ERR(("%s: optramimage%d: not supported", context, num));
}
if (num_params != 3) {
if (num_params > 3) {
PARSE_ERR(("%s: optramimage%d directive: wrong # args.", context, num));
}
sprintf(tmppath, "memory.optram.%d.path", num);
sprintf(tmpaddr, "memory.optram.%d.addr", num);
sprintf(pname, "%s.%d", BXPN_OPTRAM_BASE, num);
base = (bx_list_c*) SIM->get_param(pname);
for (i=1; i<num_params; i++) {
if (!strncmp(params[i], "file=", 5)) {
SIM->get_param_string(tmppath)->set(&params[i][5]);
SIM->get_param_string("file", base)->set(&params[i][5]);
} else if (!strncmp(params[i], "address=", 8)) {
if ((params[i][8] == '0') && (params[2][9] == 'x'))
SIM->get_param_num(tmpaddr)->set(strtoul(&params[i][8], NULL, 16));
SIM->get_param_num("address", base)->set(strtoul(&params[i][8], NULL, 16));
else
SIM->get_param_num(tmpaddr)->set(strtoul(&params[i][8], NULL, 10));
SIM->get_param_num("address", base)->set(strtoul(&params[i][8], NULL, 10));
} else {
PARSE_ERR(("%s: optramimage%d directive malformed.", context, num));
}
@ -3284,7 +3296,7 @@ int bx_write_debugger_options(FILE *fp)
int bx_write_configuration(const char *rc, int overwrite)
{
int i;
char tmppath[80], tmpaddr[80], tmpdev[80];
char pname[16], tmppath[80], tmpdev[80];
bx_param_string_c *sparam;
bx_list_c *base;
BX_INFO(("write current configuration to %s", rc));
@ -3345,20 +3357,14 @@ int bx_write_configuration(const char *rc, int overwrite)
bx_write_param_list(fp, (bx_list_c*) SIM->get_param("slave", base), tmppath, 0);
}
for (i=0; i<BX_N_OPTROM_IMAGES; i++) {
sprintf(tmppath, "memory.optrom.%d.path", i+1);
sprintf(tmpaddr, "memory.optrom.%d.addr", i+1);
sparam = SIM->get_param_string(tmppath);
if (!sparam->isempty())
fprintf(fp, "optromimage%d: file=\"%s\", address=0x%05x\n", i+1, sparam->getptr(),
(unsigned int)SIM->get_param_num(tmpaddr)->get());
sprintf(pname, "%s.%d", BXPN_OPTROM_BASE, i+1);
sprintf(tmppath, "optromimage%d", i+1);
bx_write_param_list(fp, (bx_list_c*) SIM->get_param(pname), tmppath, 0);
}
for (i=0; i<BX_N_OPTRAM_IMAGES; i++) {
sprintf(tmppath, "memory.optram.%d.path", i+1);
sprintf(tmpaddr, "memory.optram.%d.addr", i+1);
sparam = SIM->get_param_string(tmppath);
if (!sparam->isempty())
fprintf(fp, "optramimage%d: file=\"%s\", address=0x%05x\n", i+1, sparam->getptr(),
(unsigned int)SIM->get_param_num(tmpaddr)->get());
sprintf(pname, "%s.%d", BXPN_OPTRAM_BASE, i+1);
sprintf(tmppath, "optramimage%d", i+1);
bx_write_param_list(fp, (bx_list_c*) SIM->get_param(pname), tmppath, 0);
}
// pci
fprintf(fp, "pci: enabled=%d",

34
bochs/main.cc
View File

@ -1153,6 +1153,10 @@ void bx_set_log_actions_by_device(bx_bool panic_flag)
void bx_init_hardware()
{
int i;
char pname[16];
bx_list_c *base;
// all configuration has been read, now initialize everything.
bx_pc_system.initialize(SIM->get_param_num(BXPN_IPS)->get());
@ -1326,24 +1330,22 @@ void bx_init_hardware()
SIM->get_param_num(BXPN_ROM_ADDRESS)->get(), 0);
// Then load the optional ROM images
if (!SIM->get_param_string(BXPN_OPTROM1_PATH)->isempty())
BX_MEM(0)->load_ROM(SIM->get_param_string(BXPN_OPTROM1_PATH)->getptr(), SIM->get_param_num(BXPN_OPTROM1_ADDRESS)->get(), 2);
if (!SIM->get_param_string(BXPN_OPTROM2_PATH)->isempty())
BX_MEM(0)->load_ROM(SIM->get_param_string(BXPN_OPTROM2_PATH)->getptr(), SIM->get_param_num(BXPN_OPTROM2_ADDRESS)->get(), 2);
if (!SIM->get_param_string(BXPN_OPTROM3_PATH)->isempty())
BX_MEM(0)->load_ROM(SIM->get_param_string(BXPN_OPTROM3_PATH)->getptr(), SIM->get_param_num(BXPN_OPTROM3_ADDRESS)->get(), 2);
if (!SIM->get_param_string(BXPN_OPTROM4_PATH)->isempty())
BX_MEM(0)->load_ROM(SIM->get_param_string(BXPN_OPTROM4_PATH)->getptr(), SIM->get_param_num(BXPN_OPTROM4_ADDRESS)->get(), 2);
for (i=0; i<BX_N_OPTROM_IMAGES; i++) {
sprintf(pname, "%s.%d", BXPN_OPTROM_BASE, i+1);
base = (bx_list_c*) SIM->get_param(pname);
if (!SIM->get_param_string("file", base)->isempty())
BX_MEM(0)->load_ROM(SIM->get_param_string("file", base)->getptr(),
SIM->get_param_num("address", base)->get(), 2);
}
// Then load the optional RAM images
if (!SIM->get_param_string(BXPN_OPTRAM1_PATH)->isempty())
BX_MEM(0)->load_RAM(SIM->get_param_string(BXPN_OPTRAM1_PATH)->getptr(), SIM->get_param_num(BXPN_OPTRAM1_ADDRESS)->get(), 2);
if (!SIM->get_param_string(BXPN_OPTRAM2_PATH)->isempty())
BX_MEM(0)->load_RAM(SIM->get_param_string(BXPN_OPTRAM2_PATH)->getptr(), SIM->get_param_num(BXPN_OPTRAM2_ADDRESS)->get(), 2);
if (!SIM->get_param_string(BXPN_OPTRAM3_PATH)->isempty())
BX_MEM(0)->load_RAM(SIM->get_param_string(BXPN_OPTRAM3_PATH)->getptr(), SIM->get_param_num(BXPN_OPTRAM3_ADDRESS)->get(), 2);
if (!SIM->get_param_string(BXPN_OPTRAM4_PATH)->isempty())
BX_MEM(0)->load_RAM(SIM->get_param_string(BXPN_OPTRAM4_PATH)->getptr(), SIM->get_param_num(BXPN_OPTRAM4_ADDRESS)->get(), 2);
for (i=0; i<BX_N_OPTRAM_IMAGES; i++) {
sprintf(pname, "%s.%d", BXPN_OPTRAM_BASE, i+1);
base = (bx_list_c*) SIM->get_param(pname);
if (!SIM->get_param_string("file", base)->isempty())
BX_MEM(0)->load_RAM(SIM->get_param_string("file", base)->getptr(),
SIM->get_param_num("address", base)->get());
}
#if BX_SUPPORT_SMP == 0
BX_CPU(0)->initialize();

4
bochs/memory/memory-bochs.h
View File

@ -2,7 +2,7 @@
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001-2009 The Bochs Project
// Copyright (C) 2001-2017 The Bochs Project
//
// I/O memory handlers API Copyright (C) 2003 by Frank Cornelis
//
@ -133,7 +133,7 @@ public:
BX_MEM_SMF void dmaWritePhysicalPage(bx_phy_address addr, unsigned len, Bit8u *data);
BX_MEM_SMF void load_ROM(const char *path, bx_phy_address romaddress, Bit8u type);
BX_MEM_SMF void load_RAM(const char *path, bx_phy_address romaddress, Bit8u type);
BX_MEM_SMF void load_RAM(const char *path, bx_phy_address romaddress);
#if (BX_DEBUGGER || BX_DISASM || BX_GDBSTUB)
BX_MEM_SMF bx_bool dbg_fetch_mem(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, Bit8u *buf);

4
bochs/memory/misc_mem.cc
View File

@ -2,7 +2,7 @@
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001-2014 The Bochs Project
// Copyright (C) 2001-2017 The Bochs Project
//
// I/O memory handlers API Copyright (C) 2003 by Frank Cornelis
//
@ -502,7 +502,7 @@ void BX_MEM_C::load_ROM(const char *path, bx_phy_address romaddress, Bit8u type)
path));
}
void BX_MEM_C::load_RAM(const char *path, bx_phy_address ramaddress, Bit8u type)
void BX_MEM_C::load_RAM(const char *path, bx_phy_address ramaddress)
{
struct stat stat_buf;
int fd, ret;

19
bochs/param_names.h
View File

@ -83,24 +83,11 @@
#define BXPN_ROMIMAGE "memory.standard.rom"
#define BXPN_ROM_PATH "memory.standard.rom.file"
#define BXPN_ROM_ADDRESS "memory.standard.rom.address"
#define BXPN_ROM_OPTIONS "memory.standard.rom.options"
#define BXPN_VGA_ROMIMAGE "memory.standard.vgarom"
#define BXPN_VGA_ROM_PATH "memory.standard.vgarom.file"
#define BXPN_OPTROM1_PATH "memory.optrom.1.path"
#define BXPN_OPTROM1_ADDRESS "memory.optrom.1.addr"
#define BXPN_OPTROM2_PATH "memory.optrom.2.path"
#define BXPN_OPTROM2_ADDRESS "memory.optrom.2.addr"
#define BXPN_OPTROM3_PATH "memory.optrom.3.path"
#define BXPN_OPTROM3_ADDRESS "memory.optrom.3.addr"
#define BXPN_OPTROM4_PATH "memory.optrom.4.path"
#define BXPN_OPTROM4_ADDRESS "memory.optrom.4.addr"
#define BXPN_OPTRAM1_PATH "memory.optram.1.path"
#define BXPN_OPTRAM1_ADDRESS "memory.optram.1.addr"
#define BXPN_OPTRAM2_PATH "memory.optram.2.path"
#define BXPN_OPTRAM2_ADDRESS "memory.optram.2.addr"
#define BXPN_OPTRAM3_PATH "memory.optram.3.path"
#define BXPN_OPTRAM3_ADDRESS "memory.optram.3.addr"
#define BXPN_OPTRAM4_PATH "memory.optram.4.path"
#define BXPN_OPTRAM4_ADDRESS "memory.optram.4.addr"
#define BXPN_OPTROM_BASE "memory.optrom"
#define BXPN_OPTRAM_BASE "memory.optram"
#define BXPN_CLOCK_SYNC "clock_cmos.clock_sync"
#define BXPN_CLOCK_TIME0 "clock_cmos.time0"
#define BXPN_CLOCK_RTC_SYNC "clock_cmos.rtc_sync"