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XADD and ADD instructions have same flags modification rules - remove redundant switch case

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This commit is contained in:
Stanislav Shwartsman 2004-08-14 20:44:48 +00:00
parent 88a19a8594
commit 12b68ede54
8 changed files with 57 additions and 160 deletions
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4
bochs/bx_debug/dbg_main.cc
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@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: dbg_main.cc,v 1.6 2004-08-06 15:49:53 vruppert Exp $ // $Id: dbg_main.cc,v 1.7 2004-08-14 20:44:48 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -5875,7 +5875,7 @@ bx_dbg_info_flags(void)
if(BX_CPU(dbg_cpu)->getB_NT()) if(BX_CPU(dbg_cpu)->getB_NT())
dbg_printf ("NT "); dbg_printf ("NT ");
dbg_printf ("IOPL=%d ", BX_CPU(dbg_cpu)->get_IOPL()); dbg_printf ("IOPL=%d ", BX_CPU(dbg_cpu)->get_IOPL());
if(BX_CPU(dbg_cpu)->eflags.val32 & EFlagsOFMask) if(BX_CPU(dbg_cpu)->getB_OF())
dbg_printf ("OF "); dbg_printf ("OF ");
if(BX_CPU(dbg_cpu)->getB_DF()) if(BX_CPU(dbg_cpu)->getB_DF())
dbg_printf ("DF "); dbg_printf ("DF ");

4
bochs/cpu/arith16.cc
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@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: arith16.cc,v 1.33 2004-08-14 20:09:22 sshwarts Exp $ // $Id: arith16.cc,v 1.34 2004-08-14 20:44:48 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -499,7 +499,7 @@ BX_CPU_C::XADD_EwGw(bxInstruction_c *i)
BX_WRITE_16BIT_REG(i->nnn(), op1_16); BX_WRITE_16BIT_REG(i->nnn(), op1_16);
} }
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_XADD16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD16);
#else #else
BX_PANIC(("XADD_EvGv: not supported on < 80486")); BX_PANIC(("XADD_EvGv: not supported on < 80486"));
#endif #endif

4
bochs/cpu/arith32.cc
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@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: arith32.cc,v 1.36 2004-08-14 20:09:22 sshwarts Exp $ // $Id: arith32.cc,v 1.37 2004-08-14 20:44:48 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -526,7 +526,7 @@ BX_CPU_C::XADD_EdGd(bxInstruction_c *i)
BX_WRITE_32BIT_REGZ(i->nnn(), op1_32); BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
} }
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_XADD32); SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD32);
#else #else
BX_INFO (("XADD_EdGd not supported for cpulevel <= 3")); BX_INFO (("XADD_EdGd not supported for cpulevel <= 3"));
UndefinedOpcode(i); UndefinedOpcode(i);

4
bochs/cpu/arith64.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: arith64.cc,v 1.19 2004-08-14 20:09:22 sshwarts Exp $ // $Id: arith64.cc,v 1.20 2004-08-14 20:44:48 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -489,7 +489,7 @@ BX_CPU_C::XADD_EqGq(bxInstruction_c *i)
BX_WRITE_64BIT_REG(i->nnn(), op1_64); BX_WRITE_64BIT_REG(i->nnn(), op1_64);
} }
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_XADD64); SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD64);
} }
void void

4
bochs/cpu/arith8.cc
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@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: arith8.cc,v 1.29 2004-08-14 20:09:22 sshwarts Exp $ // $Id: arith8.cc,v 1.30 2004-08-14 20:44:48 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -394,7 +394,7 @@ BX_CPU_C::XADD_EbGb(bxInstruction_c *i)
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1); BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
} }
SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_XADD8); SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_ADD8);
#else #else
BX_INFO(("XADD_EbGb: not supported on < 80486")); BX_INFO(("XADD_EbGb: not supported on < 80486"));
UndefinedOpcode(i); UndefinedOpcode(i);

42
bochs/cpu/lazy_flags.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: lazy_flags.cc,v 1.15 2004-08-14 20:00:24 sshwarts Exp $ // $Id: lazy_flags.cc,v 1.16 2004-08-14 20:44:48 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -40,23 +40,19 @@ bx_bool BX_CPU_C::get_CFLazy(void)
case BX_LF_INDEX_OSZAPC: case BX_LF_INDEX_OSZAPC:
switch (BX_CPU_THIS_PTR oszapc.instr) { switch (BX_CPU_THIS_PTR oszapc.instr) {
case BX_INSTR_ADD8: case BX_INSTR_ADD8:
case BX_INSTR_XADD8:
cf = (BX_CPU_THIS_PTR oszapc.result_8 < cf = (BX_CPU_THIS_PTR oszapc.result_8 <
BX_CPU_THIS_PTR oszapc.op1_8); BX_CPU_THIS_PTR oszapc.op1_8);
break; break;
case BX_INSTR_ADD16: case BX_INSTR_ADD16:
case BX_INSTR_XADD16:
cf = (BX_CPU_THIS_PTR oszapc.result_16 < cf = (BX_CPU_THIS_PTR oszapc.result_16 <
BX_CPU_THIS_PTR oszapc.op1_16); BX_CPU_THIS_PTR oszapc.op1_16);
break; break;
case BX_INSTR_ADD32: case BX_INSTR_ADD32:
case BX_INSTR_XADD32:
cf = (BX_CPU_THIS_PTR oszapc.result_32 < cf = (BX_CPU_THIS_PTR oszapc.result_32 <
BX_CPU_THIS_PTR oszapc.op1_32); BX_CPU_THIS_PTR oszapc.op1_32);
break; break;
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
case BX_INSTR_ADD64: case BX_INSTR_ADD64:
case BX_INSTR_XADD64:
cf = (BX_CPU_THIS_PTR oszapc.result_64 < cf = (BX_CPU_THIS_PTR oszapc.result_64 <
BX_CPU_THIS_PTR oszapc.op1_64); BX_CPU_THIS_PTR oszapc.op1_64);
break; break;
@ -262,7 +258,6 @@ bx_bool BX_CPU_C::get_AFLazy(void)
case BX_INSTR_SUB8: case BX_INSTR_SUB8:
case BX_INSTR_SBB8: case BX_INSTR_SBB8:
case BX_INSTR_CMP8: case BX_INSTR_CMP8:
case BX_INSTR_XADD8:
case BX_INSTR_CMPS8: case BX_INSTR_CMPS8:
case BX_INSTR_SCAS8: case BX_INSTR_SCAS8:
af = af =
@ -275,7 +270,6 @@ bx_bool BX_CPU_C::get_AFLazy(void)
case BX_INSTR_SUB16: case BX_INSTR_SUB16:
case BX_INSTR_SBB16: case BX_INSTR_SBB16:
case BX_INSTR_CMP16: case BX_INSTR_CMP16:
case BX_INSTR_XADD16:
case BX_INSTR_CMPS16: case BX_INSTR_CMPS16:
case BX_INSTR_SCAS16: case BX_INSTR_SCAS16:
af = af =
@ -288,7 +282,6 @@ bx_bool BX_CPU_C::get_AFLazy(void)
case BX_INSTR_SUB32: case BX_INSTR_SUB32:
case BX_INSTR_SBB32: case BX_INSTR_SBB32:
case BX_INSTR_CMP32: case BX_INSTR_CMP32:
case BX_INSTR_XADD32:
case BX_INSTR_CMPS32: case BX_INSTR_CMPS32:
case BX_INSTR_SCAS32: case BX_INSTR_SCAS32:
af = af =
@ -302,7 +295,6 @@ bx_bool BX_CPU_C::get_AFLazy(void)
case BX_INSTR_SUB64: case BX_INSTR_SUB64:
case BX_INSTR_SBB64: case BX_INSTR_SBB64:
case BX_INSTR_CMP64: case BX_INSTR_CMP64:
case BX_INSTR_XADD64:
case BX_INSTR_CMPS64: case BX_INSTR_CMPS64:
case BX_INSTR_SCAS64: case BX_INSTR_SCAS64:
af = af =
@ -414,7 +406,6 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_SBB8: case BX_INSTR_SBB8:
case BX_INSTR_CMP8: case BX_INSTR_CMP8:
case BX_INSTR_NEG8: case BX_INSTR_NEG8:
case BX_INSTR_XADD8:
case BX_INSTR_CMPS8: case BX_INSTR_CMPS8:
case BX_INSTR_SCAS8: case BX_INSTR_SCAS8:
case BX_INSTR_SHR8: case BX_INSTR_SHR8:
@ -428,7 +419,6 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_SBB16: case BX_INSTR_SBB16:
case BX_INSTR_CMP16: case BX_INSTR_CMP16:
case BX_INSTR_NEG16: case BX_INSTR_NEG16:
case BX_INSTR_XADD16:
case BX_INSTR_CMPS16: case BX_INSTR_CMPS16:
case BX_INSTR_SCAS16: case BX_INSTR_SCAS16:
case BX_INSTR_SHR16: case BX_INSTR_SHR16:
@ -442,7 +432,6 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_SBB32: case BX_INSTR_SBB32:
case BX_INSTR_CMP32: case BX_INSTR_CMP32:
case BX_INSTR_NEG32: case BX_INSTR_NEG32:
case BX_INSTR_XADD32:
case BX_INSTR_CMPS32: case BX_INSTR_CMPS32:
case BX_INSTR_SCAS32: case BX_INSTR_SCAS32:
case BX_INSTR_SHR32: case BX_INSTR_SHR32:
@ -457,7 +446,6 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_SBB64: case BX_INSTR_SBB64:
case BX_INSTR_CMP64: case BX_INSTR_CMP64:
case BX_INSTR_NEG64: case BX_INSTR_NEG64:
case BX_INSTR_XADD64:
case BX_INSTR_CMPS64: case BX_INSTR_CMPS64:
case BX_INSTR_SCAS64: case BX_INSTR_SCAS64:
case BX_INSTR_SHR64: case BX_INSTR_SHR64:
@ -530,7 +518,6 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_SBB8: case BX_INSTR_SBB8:
case BX_INSTR_CMP8: case BX_INSTR_CMP8:
case BX_INSTR_NEG8: case BX_INSTR_NEG8:
case BX_INSTR_XADD8:
case BX_INSTR_CMPS8: case BX_INSTR_CMPS8:
case BX_INSTR_SCAS8: case BX_INSTR_SCAS8:
case BX_INSTR_SHR8: case BX_INSTR_SHR8:
@ -544,7 +531,6 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_SBB16: case BX_INSTR_SBB16:
case BX_INSTR_CMP16: case BX_INSTR_CMP16:
case BX_INSTR_NEG16: case BX_INSTR_NEG16:
case BX_INSTR_XADD16:
case BX_INSTR_CMPS16: case BX_INSTR_CMPS16:
case BX_INSTR_SCAS16: case BX_INSTR_SCAS16:
case BX_INSTR_SHR16: case BX_INSTR_SHR16:
@ -559,7 +545,6 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_SBB32: case BX_INSTR_SBB32:
case BX_INSTR_CMP32: case BX_INSTR_CMP32:
case BX_INSTR_NEG32: case BX_INSTR_NEG32:
case BX_INSTR_XADD32:
case BX_INSTR_CMPS32: case BX_INSTR_CMPS32:
case BX_INSTR_SCAS32: case BX_INSTR_SCAS32:
case BX_INSTR_SHR32: case BX_INSTR_SHR32:
@ -575,7 +560,6 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_SBB64: case BX_INSTR_SBB64:
case BX_INSTR_CMP64: case BX_INSTR_CMP64:
case BX_INSTR_NEG64: case BX_INSTR_NEG64:
case BX_INSTR_XADD64:
case BX_INSTR_CMPS64: case BX_INSTR_CMPS64:
case BX_INSTR_SCAS64: case BX_INSTR_SCAS64:
case BX_INSTR_SHR64: case BX_INSTR_SHR64:
@ -643,36 +627,32 @@ bx_bool BX_CPU_C::get_OFLazy(void)
switch (BX_CPU_THIS_PTR oszapc.instr) { switch (BX_CPU_THIS_PTR oszapc.instr) {
case BX_INSTR_ADD8: case BX_INSTR_ADD8:
case BX_INSTR_ADC8: case BX_INSTR_ADC8:
case BX_INSTR_XADD8:
op1_b7 = BX_CPU_THIS_PTR oszapc.op1_8 & 0x80; op1_b7 = BX_CPU_THIS_PTR oszapc.op1_8 & 0x80;
op2_b7 = BX_CPU_THIS_PTR oszapc.op2_8 & 0x80; op2_b7 = BX_CPU_THIS_PTR oszapc.op2_8 & 0x80;
result_b7 = BX_CPU_THIS_PTR oszapc.result_8 & 0x80; result_b7 = BX_CPU_THIS_PTR oszapc.result_8 & 0x80;
of = (op1_b7 == op2_b7) && (result_b7 ^ op2_b7); of = (op1_b7 == op2_b7) && (result_b7 ^ op2_b7);
break; break;
case BX_INSTR_ADD16: case BX_INSTR_ADD16:
case BX_INSTR_ADC16: case BX_INSTR_ADC16:
case BX_INSTR_XADD16:
op1_b15 = BX_CPU_THIS_PTR oszapc.op1_16 & 0x8000; op1_b15 = BX_CPU_THIS_PTR oszapc.op1_16 & 0x8000;
op2_b15 = BX_CPU_THIS_PTR oszapc.op2_16 & 0x8000; op2_b15 = BX_CPU_THIS_PTR oszapc.op2_16 & 0x8000;
result_b15 = BX_CPU_THIS_PTR oszapc.result_16 & 0x8000; result_b15 = BX_CPU_THIS_PTR oszapc.result_16 & 0x8000;
of = (op1_b15 == op2_b15) && (result_b15 ^ op2_b15); of = (op1_b15 == op2_b15) && (result_b15 ^ op2_b15);
break; break;
case BX_INSTR_ADD32: case BX_INSTR_ADD32:
case BX_INSTR_ADC32: case BX_INSTR_ADC32:
case BX_INSTR_XADD32:
op1_b31 = BX_CPU_THIS_PTR oszapc.op1_32 & 0x80000000; op1_b31 = BX_CPU_THIS_PTR oszapc.op1_32 & 0x80000000;
op2_b31 = BX_CPU_THIS_PTR oszapc.op2_32 & 0x80000000; op2_b31 = BX_CPU_THIS_PTR oszapc.op2_32 & 0x80000000;
result_b31 = BX_CPU_THIS_PTR oszapc.result_32 & 0x80000000; result_b31 = BX_CPU_THIS_PTR oszapc.result_32 & 0x80000000;
of = (op1_b31 == op2_b31) && (result_b31 ^ op2_b31); of = (op1_b31 == op2_b31) && (result_b31 ^ op2_b31);
break; break;
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
case BX_INSTR_ADD64: case BX_INSTR_ADD64:
case BX_INSTR_ADC64: case BX_INSTR_ADC64:
case BX_INSTR_XADD64:
op1_b63 = BX_CPU_THIS_PTR oszapc.op1_64 & BX_CONST64(0x8000000000000000); op1_b63 = BX_CPU_THIS_PTR oszapc.op1_64 & BX_CONST64(0x8000000000000000);
op2_b63 = BX_CPU_THIS_PTR oszapc.op2_64 & BX_CONST64(0x8000000000000000); op2_b63 = BX_CPU_THIS_PTR oszapc.op2_64 & BX_CONST64(0x8000000000000000);
result_b63 = BX_CPU_THIS_PTR oszapc.result_64 & BX_CONST64(0x8000000000000000); result_b63 = BX_CPU_THIS_PTR oszapc.result_64 & BX_CONST64(0x8000000000000000);
of = (op1_b63 == op2_b63) && (result_b63 ^ op2_b63); of = (op1_b63 == op2_b63) && (result_b63 ^ op2_b63);
break; break;
#endif #endif
case BX_INSTR_SUB8: case BX_INSTR_SUB8:
@ -683,7 +663,7 @@ bx_bool BX_CPU_C::get_OFLazy(void)
op1_b7 = BX_CPU_THIS_PTR oszapc.op1_8 & 0x80; op1_b7 = BX_CPU_THIS_PTR oszapc.op1_8 & 0x80;
op2_b7 = BX_CPU_THIS_PTR oszapc.op2_8 & 0x80; op2_b7 = BX_CPU_THIS_PTR oszapc.op2_8 & 0x80;
result_b7 = BX_CPU_THIS_PTR oszapc.result_8 & 0x80; result_b7 = BX_CPU_THIS_PTR oszapc.result_8 & 0x80;
of = (op1_b7 ^ op2_b7) && (op1_b7 ^ result_b7); of = (op1_b7 ^ op2_b7) && (op1_b7 ^ result_b7);
break; break;
case BX_INSTR_SUB16: case BX_INSTR_SUB16:
case BX_INSTR_SBB16: case BX_INSTR_SBB16:
@ -693,7 +673,7 @@ bx_bool BX_CPU_C::get_OFLazy(void)
op1_b15 = BX_CPU_THIS_PTR oszapc.op1_16 & 0x8000; op1_b15 = BX_CPU_THIS_PTR oszapc.op1_16 & 0x8000;
op2_b15 = BX_CPU_THIS_PTR oszapc.op2_16 & 0x8000; op2_b15 = BX_CPU_THIS_PTR oszapc.op2_16 & 0x8000;
result_b15 = BX_CPU_THIS_PTR oszapc.result_16 & 0x8000; result_b15 = BX_CPU_THIS_PTR oszapc.result_16 & 0x8000;
of = (op1_b15 ^ op2_b15) && (op1_b15 ^ result_b15); of = (op1_b15 ^ op2_b15) && (op1_b15 ^ result_b15);
break; break;
case BX_INSTR_SUB32: case BX_INSTR_SUB32:
case BX_INSTR_SBB32: case BX_INSTR_SBB32:
@ -703,7 +683,7 @@ bx_bool BX_CPU_C::get_OFLazy(void)
op1_b31 = BX_CPU_THIS_PTR oszapc.op1_32 & 0x80000000; op1_b31 = BX_CPU_THIS_PTR oszapc.op1_32 & 0x80000000;
op2_b31 = BX_CPU_THIS_PTR oszapc.op2_32 & 0x80000000; op2_b31 = BX_CPU_THIS_PTR oszapc.op2_32 & 0x80000000;
result_b31 = BX_CPU_THIS_PTR oszapc.result_32 & 0x80000000; result_b31 = BX_CPU_THIS_PTR oszapc.result_32 & 0x80000000;
of = (op1_b31 ^ op2_b31) && (op1_b31 ^ result_b31); of = (op1_b31 ^ op2_b31) && (op1_b31 ^ result_b31);
break; break;
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
case BX_INSTR_SUB64: case BX_INSTR_SUB64:
@ -714,7 +694,7 @@ bx_bool BX_CPU_C::get_OFLazy(void)
op1_b63 = BX_CPU_THIS_PTR oszapc.op1_64 & BX_CONST64(0x8000000000000000); op1_b63 = BX_CPU_THIS_PTR oszapc.op1_64 & BX_CONST64(0x8000000000000000);
op2_b63 = BX_CPU_THIS_PTR oszapc.op2_64 & BX_CONST64(0x8000000000000000); op2_b63 = BX_CPU_THIS_PTR oszapc.op2_64 & BX_CONST64(0x8000000000000000);
result_b63 = BX_CPU_THIS_PTR oszapc.result_64 & BX_CONST64(0x8000000000000000); result_b63 = BX_CPU_THIS_PTR oszapc.result_64 & BX_CONST64(0x8000000000000000);
of = (op1_b63 ^ op2_b63) && (op1_b63 ^ result_b63); of = (op1_b63 ^ op2_b63) && (op1_b63 ^ result_b63);
break; break;
#endif #endif
case BX_INSTR_NEG8: case BX_INSTR_NEG8:
@ -866,7 +846,6 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_SBB8: case BX_INSTR_SBB8:
case BX_INSTR_CMP8: case BX_INSTR_CMP8:
case BX_INSTR_NEG8: case BX_INSTR_NEG8:
case BX_INSTR_XADD8:
case BX_INSTR_CMPS8: case BX_INSTR_CMPS8:
case BX_INSTR_SCAS8: case BX_INSTR_SCAS8:
case BX_INSTR_SHR8: case BX_INSTR_SHR8:
@ -880,7 +859,6 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_SBB16: case BX_INSTR_SBB16:
case BX_INSTR_CMP16: case BX_INSTR_CMP16:
case BX_INSTR_NEG16: case BX_INSTR_NEG16:
case BX_INSTR_XADD16:
case BX_INSTR_CMPS16: case BX_INSTR_CMPS16:
case BX_INSTR_SCAS16: case BX_INSTR_SCAS16:
case BX_INSTR_SHR16: case BX_INSTR_SHR16:
@ -895,7 +873,6 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_SBB32: case BX_INSTR_SBB32:
case BX_INSTR_CMP32: case BX_INSTR_CMP32:
case BX_INSTR_NEG32: case BX_INSTR_NEG32:
case BX_INSTR_XADD32:
case BX_INSTR_CMPS32: case BX_INSTR_CMPS32:
case BX_INSTR_SCAS32: case BX_INSTR_SCAS32:
case BX_INSTR_SHR32: case BX_INSTR_SHR32:
@ -911,7 +888,6 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_SBB64: case BX_INSTR_SBB64:
case BX_INSTR_CMP64: case BX_INSTR_CMP64:
case BX_INSTR_NEG64: case BX_INSTR_NEG64:
case BX_INSTR_XADD64:
case BX_INSTR_CMPS64: case BX_INSTR_CMPS64:
case BX_INSTR_SCAS64: case BX_INSTR_SCAS64:
case BX_INSTR_SHR64: case BX_INSTR_SHR64:

21
bochs/cpu/lazy_flags.h
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: lazy_flags.h,v 1.10 2004-08-14 19:34:02 sshwarts Exp $ // $Id: lazy_flags.h,v 1.11 2004-08-14 20:44:48 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -67,10 +67,10 @@
#define BX_INSTR_NEG32 31 #define BX_INSTR_NEG32 31
#define BX_INSTR_NEG64 32 #define BX_INSTR_NEG64 32
#define BX_INSTR_XADD8 33 #define BX_INSTR_LOGIC8 33
#define BX_INSTR_XADD16 34 #define BX_INSTR_LOGIC16 34
#define BX_INSTR_XADD32 35 #define BX_INSTR_LOGIC32 35
#define BX_INSTR_XADD64 36 #define BX_INSTR_LOGIC64 36
#define BX_INSTR_CMPS8 37 #define BX_INSTR_CMPS8 37
#define BX_INSTR_CMPS16 38 #define BX_INSTR_CMPS16 38
@ -92,15 +92,10 @@
#define BX_INSTR_SHL32 51 #define BX_INSTR_SHL32 51
#define BX_INSTR_SHL64 52 #define BX_INSTR_SHL64 52
#define BX_INSTR_LOGIC8 53
#define BX_INSTR_LOGIC16 54
#define BX_INSTR_LOGIC32 55
#define BX_INSTR_LOGIC64 56
// BX_INSTR_BITSCAN8 not exists, leave number for alignment // BX_INSTR_BITSCAN8 not exists, leave number for alignment
#define BX_INSTR_BITSCAN16 58 #define BX_INSTR_BITSCAN16 54
#define BX_INSTR_BITSCAN32 59 #define BX_INSTR_BITSCAN32 55
#define BX_INSTR_BITSCAN64 60 #define BX_INSTR_BITSCAN64 56
#define BX_LF_INDEX_OSZAPC 1 #define BX_LF_INDEX_OSZAPC 1
#define BX_LF_INDEX_OSZAP 2 #define BX_LF_INDEX_OSZAP 2

134
bochs/cpu/string.cc
View File

@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// $Id: string.cc,v 1.22 2004-04-28 19:57:37 cbothamy Exp $ // $Id: string.cc,v 1.23 2004-08-14 20:44:48 sshwarts Exp $
///////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////
// //
// Copyright (C) 2001 MandrakeSoft S.A. // Copyright (C) 2001 MandrakeSoft S.A.
@ -26,9 +26,6 @@
#define NEED_CPU_REG_SHORTCUTS 1 #define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h" #include "bochs.h"
#define LOG_THIS BX_CPU_THIS_PTR #define LOG_THIS BX_CPU_THIS_PTR
@ -911,7 +908,6 @@ BX_CPU_C::CMPSB_XbYb(bxInstruction_c *i)
unsigned seg; unsigned seg;
Bit8u op1_8, op2_8, diff_8; Bit8u op1_8, op2_8, diff_8;
if (!BX_NULL_SEG_REG(i->seg())) { if (!BX_NULL_SEG_REG(i->seg())) {
seg = i->seg(); seg = i->seg();
} }
@ -1149,8 +1145,8 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
#endif // #if BX_SUPPORT_X86_64 #endif // #if BX_SUPPORT_X86_64
if (i->os32L()) { if (i->os32L()) {
Bit32u op1_32, op2_32, diff_32; Bit32u op1_32, op2_32, diff_32;
read_virtual_dword(seg, esi, &op1_32);
read_virtual_dword(seg, esi, &op1_32);
read_virtual_dword(BX_SEG_REG_ES, edi, &op2_32); read_virtual_dword(BX_SEG_REG_ES, edi, &op2_32);
diff_32 = op1_32 - op2_32; diff_32 = op1_32 - op2_32;
@ -1172,18 +1168,15 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
Bit16u op1_16, op2_16; Bit16u op1_16, op2_16;
read_virtual_word(seg, esi, &op1_16); read_virtual_word(seg, esi, &op1_16);
read_virtual_word(BX_SEG_REG_ES, edi, &op2_16); read_virtual_word(BX_SEG_REG_ES, edi, &op2_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asmCmp16(op1_16, op2_16, flags32); asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32); setEFlagsOSZAPC(flags32);
#else #else
Bit16u diff_16; Bit16u diff_16;
diff_16 = op1_16 - op2_16; diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_CMPS16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_CMPS16);
#endif #endif
@ -1199,7 +1192,6 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
} }
} }
// zero extension of RSI/RDI // zero extension of RSI/RDI
RDI = edi; RDI = edi;
@ -1218,7 +1210,6 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
Bit32u op1_32, op2_32, diff_32; Bit32u op1_32, op2_32, diff_32;
read_virtual_dword(seg, si, &op1_32); read_virtual_dword(seg, si, &op1_32);
read_virtual_dword(BX_SEG_REG_ES, di, &op2_32); read_virtual_dword(BX_SEG_REG_ES, di, &op2_32);
diff_32 = op1_32 - op2_32; diff_32 = op1_32 - op2_32;
@ -1242,7 +1233,6 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
Bit16u op1_16, op2_16; Bit16u op1_16, op2_16;
read_virtual_word(seg, si, &op1_16); read_virtual_word(seg, si, &op1_16);
read_virtual_word(BX_SEG_REG_ES, di, &op2_16); read_virtual_word(BX_SEG_REG_ES, di, &op2_16);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
@ -1269,7 +1259,6 @@ BX_CPU_C::CMPSW_XvYv(bxInstruction_c *i)
} }
} }
DI = di; DI = di;
SI = si; SI = si;
} }
@ -1280,14 +1269,12 @@ BX_CPU_C::SCASB_ALXb(bxInstruction_c *i)
{ {
Bit8u op1_8, op2_8; Bit8u op1_8, op2_8;
#if BX_CPU_LEVEL >= 3 #if BX_CPU_LEVEL >= 3
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->as64L()) { if (i->as64L()) {
Bit64u rdi;
Bit8u diff_8; Bit8u diff_8;
rdi = RDI; Bit64u rdi = RDI;
op1_8 = AL; op1_8 = AL;
@ -1312,9 +1299,7 @@ BX_CPU_C::SCASB_ALXb(bxInstruction_c *i)
else else
#endif // #if BX_SUPPORT_X86_64 #endif // #if BX_SUPPORT_X86_64
if (i->as32L()) { if (i->as32L()) {
Bit32u edi; Bit32u edi = EDI;
edi = EDI;
op1_8 = AL; op1_8 = AL;
@ -1322,13 +1307,10 @@ BX_CPU_C::SCASB_ALXb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asmCmp8(op1_8, op2_8, flags32); asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32); setEFlagsOSZAPC(flags32);
#else #else
Bit8u diff_8; Bit8u diff_8 = op1_8 - op2_8;
diff_8 = op1_8 - op2_8;
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SCAS8); SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SCAS8);
#endif #endif
@ -1342,16 +1324,13 @@ BX_CPU_C::SCASB_ALXb(bxInstruction_c *i)
} }
// zero extension of RDI // zero extension of RDI
RDI = edi; RDI = edi;
} }
else else
#endif /* BX_CPU_LEVEL >= 3 */ #endif /* BX_CPU_LEVEL >= 3 */
{ /* 16bit address mode */ { /* 16bit address mode */
Bit16u di; Bit16u di = DI;
di = DI;
op1_8 = AL; op1_8 = AL;
@ -1359,13 +1338,10 @@ BX_CPU_C::SCASB_ALXb(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asmCmp8(op1_8, op2_8, flags32); asmCmp8(op1_8, op2_8, flags32);
setEFlagsOSZAPC(flags32); setEFlagsOSZAPC(flags32);
#else #else
Bit8u diff_8; Bit8u diff_8 = op1_8 - op2_8;
diff_8 = op1_8 - op2_8;
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SCAS8); SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SCAS8);
#endif #endif
@ -1388,9 +1364,7 @@ BX_CPU_C::SCASW_eAXXv(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 3 #if BX_CPU_LEVEL >= 3
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->as64L()) { if (i->as64L()) {
Bit64u rdi; Bit64u rdi = RDI;
rdi = RDI;
if (i->os64L()) { if (i->os64L()) {
Bit64u op1_64, op2_64, diff_64; Bit64u op1_64, op2_64, diff_64;
@ -1456,9 +1430,7 @@ BX_CPU_C::SCASW_eAXXv(bxInstruction_c *i)
else else
#endif // #if BX_SUPPORT_X86_64 #endif // #if BX_SUPPORT_X86_64
if (i->as32L()) { if (i->as32L()) {
Bit32u edi; Bit32u edi = EDI;
edi = EDI;
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->os64L()) { if (i->os64L()) {
@ -1509,13 +1481,10 @@ BX_CPU_C::SCASW_eAXXv(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asmCmp16(op1_16, op2_16, flags32); asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32); setEFlagsOSZAPC(flags32);
#else #else
Bit16u diff_16; Bit16u diff_16 = op1_16 - op2_16;
diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SCAS16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SCAS16);
#endif #endif
@ -1536,9 +1505,7 @@ BX_CPU_C::SCASW_eAXXv(bxInstruction_c *i)
else else
#endif /* BX_CPU_LEVEL >= 3 */ #endif /* BX_CPU_LEVEL >= 3 */
{ /* 16bit address mode */ { /* 16bit address mode */
Bit16u di; Bit16u di = DI;
di = DI;
#if BX_CPU_LEVEL >= 3 #if BX_CPU_LEVEL >= 3
if (i->os32L()) { if (i->os32L()) {
@ -1570,13 +1537,10 @@ BX_CPU_C::SCASW_eAXXv(bxInstruction_c *i)
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms) #if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32; Bit32u flags32;
asmCmp16(op1_16, op2_16, flags32); asmCmp16(op1_16, op2_16, flags32);
setEFlagsOSZAPC(flags32); setEFlagsOSZAPC(flags32);
#else #else
Bit16u diff_16; Bit16u diff_16 = op1_16 - op2_16;
diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SCAS16); SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SCAS16);
#endif #endif
@ -1601,9 +1565,7 @@ BX_CPU_C::STOSB_YbAL(bxInstruction_c *i)
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->as64L()) { if (i->as64L()) {
Bit64u rdi; Bit64u rdi = RDI;
rdi = RDI;
al = AL; al = AL;
write_virtual_byte(BX_SEG_REG_ES, rdi, &al); write_virtual_byte(BX_SEG_REG_ES, rdi, &al);
@ -1637,7 +1599,6 @@ BX_CPU_C::STOSB_YbAL(bxInstruction_c *i)
al = AL; al = AL;
#if BX_SupportRepeatSpeedups #if BX_SupportRepeatSpeedups
#if (BX_DEBUGGER == 0) #if (BX_DEBUGGER == 0)
/* If conditions are right, we can transfer IO to physical memory /* If conditions are right, we can transfer IO to physical memory
@ -1815,14 +1776,10 @@ BX_CPU_C::STOSW_YveAX(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 3 #if BX_CPU_LEVEL >= 3
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->as64L()) { if (i->as64L()) {
Bit64u rdi; Bit64u rdi = RDI;
rdi = RDI;
if (i->os64L()) { if (i->os64L()) {
Bit64u rax; Bit64u rax = RAX;
rax = RAX;
write_virtual_qword(BX_SEG_REG_ES, rdi, &rax); write_virtual_qword(BX_SEG_REG_ES, rdi, &rax);
if (BX_CPU_THIS_PTR get_DF ()) { if (BX_CPU_THIS_PTR get_DF ()) {
@ -1836,9 +1793,7 @@ BX_CPU_C::STOSW_YveAX(bxInstruction_c *i)
} /* if (i->os64L()) ... */ } /* if (i->os64L()) ... */
else else
if (i->os32L()) { if (i->os32L()) {
Bit32u eax; Bit32u eax = EAX;
eax = EAX;
write_virtual_dword(BX_SEG_REG_ES, rdi, &eax); write_virtual_dword(BX_SEG_REG_ES, rdi, &eax);
if (BX_CPU_THIS_PTR get_DF ()) { if (BX_CPU_THIS_PTR get_DF ()) {
@ -1851,9 +1806,7 @@ BX_CPU_C::STOSW_YveAX(bxInstruction_c *i)
} }
} /* if (i->os32L()) ... */ } /* if (i->os32L()) ... */
else { /* 16 bit opsize mode */ else { /* 16 bit opsize mode */
Bit16u ax; Bit16u ax = AX;
ax = AX;
write_virtual_word(BX_SEG_REG_ES, rdi, &ax); write_virtual_word(BX_SEG_REG_ES, rdi, &ax);
if (BX_CPU_THIS_PTR get_DF ()) { if (BX_CPU_THIS_PTR get_DF ()) {
@ -1872,15 +1825,11 @@ BX_CPU_C::STOSW_YveAX(bxInstruction_c *i)
else else
#endif // #if BX_SUPPORT_X86_64 #endif // #if BX_SUPPORT_X86_64
if (i->as32L()) { if (i->as32L()) {
Bit32u edi; Bit32u edi = EDI;
edi = EDI;
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->os64L()) { if (i->os64L()) {
Bit64u rax; Bit64u rax = RAX;
rax = RAX;
write_virtual_qword(BX_SEG_REG_ES, edi, &rax); write_virtual_qword(BX_SEG_REG_ES, edi, &rax);
if (BX_CPU_THIS_PTR get_DF ()) { if (BX_CPU_THIS_PTR get_DF ()) {
@ -1895,9 +1844,7 @@ BX_CPU_C::STOSW_YveAX(bxInstruction_c *i)
else else
#endif // #if BX_SUPPORT_X86_64 #endif // #if BX_SUPPORT_X86_64
if (i->os32L()) { if (i->os32L()) {
Bit32u eax; Bit32u eax = EAX;
eax = EAX;
write_virtual_dword(BX_SEG_REG_ES, edi, &eax); write_virtual_dword(BX_SEG_REG_ES, edi, &eax);
if (BX_CPU_THIS_PTR get_DF ()) { if (BX_CPU_THIS_PTR get_DF ()) {
@ -1926,22 +1873,16 @@ BX_CPU_C::STOSW_YveAX(bxInstruction_c *i)
} }
// zero extension of RDI // zero extension of RDI
RDI = edi; RDI = edi;
} }
else else
#endif /* BX_CPU_LEVEL >= 3 */ #endif /* BX_CPU_LEVEL >= 3 */
{ /* 16bit address size */ { /* 16bit address size */
Bit16u di; Bit16u di = DI;
di = DI;
#if BX_CPU_LEVEL >= 3 #if BX_CPU_LEVEL >= 3
if (i->os32L()) { if (i->os32L()) {
Bit32u eax; Bit32u eax = EAX;
eax = EAX;
write_virtual_dword(BX_SEG_REG_ES, di, &eax); write_virtual_dword(BX_SEG_REG_ES, di, &eax);
if (BX_CPU_THIS_PTR get_DF ()) { if (BX_CPU_THIS_PTR get_DF ()) {
@ -1956,9 +1897,7 @@ BX_CPU_C::STOSW_YveAX(bxInstruction_c *i)
else else
#endif /* BX_CPU_LEVEL >= 3 */ #endif /* BX_CPU_LEVEL >= 3 */
{ /* 16 bit opsize mode */ { /* 16 bit opsize mode */
Bit16u ax; Bit16u ax = AX;
ax = AX;
write_virtual_word(BX_SEG_REG_ES, di, &ax); write_virtual_word(BX_SEG_REG_ES, di, &ax);
if (BX_CPU_THIS_PTR get_DF ()) { if (BX_CPU_THIS_PTR get_DF ()) {
@ -1975,7 +1914,6 @@ BX_CPU_C::STOSW_YveAX(bxInstruction_c *i)
} }
} }
void void
BX_CPU_C::LODSB_ALXb(bxInstruction_c *i) BX_CPU_C::LODSB_ALXb(bxInstruction_c *i)
{ {
@ -1992,9 +1930,7 @@ BX_CPU_C::LODSB_ALXb(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 3 #if BX_CPU_LEVEL >= 3
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->as64L()) { if (i->as64L()) {
Bit64u rsi; Bit64u rsi = RSI;
rsi = RSI;
read_virtual_byte(seg, rsi, &al); read_virtual_byte(seg, rsi, &al);
@ -2013,9 +1949,7 @@ BX_CPU_C::LODSB_ALXb(bxInstruction_c *i)
else else
#endif // #if BX_SUPPORT_X86_64 #endif // #if BX_SUPPORT_X86_64
if (i->as32L()) { if (i->as32L()) {
Bit32u esi; Bit32u esi = ESI;
esi = ESI;
read_virtual_byte(seg, esi, &al); read_virtual_byte(seg, esi, &al);
@ -2036,9 +1970,7 @@ BX_CPU_C::LODSB_ALXb(bxInstruction_c *i)
else else
#endif /* BX_CPU_LEVEL >= 3 */ #endif /* BX_CPU_LEVEL >= 3 */
{ /* 16bit address mode */ { /* 16bit address mode */
Bit16u si; Bit16u si = SI;
si = SI;
read_virtual_byte(seg, si, &al); read_virtual_byte(seg, si, &al);
@ -2071,9 +2003,7 @@ BX_CPU_C::LODSW_eAXXv(bxInstruction_c *i)
#if BX_CPU_LEVEL >= 3 #if BX_CPU_LEVEL >= 3
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->as64L()) { if (i->as64L()) {
Bit64u rsi; Bit64u rsi = RSI;
rsi = RSI;
if (i->os64L()) { if (i->os64L()) {
Bit64u rax; Bit64u rax;
@ -2126,9 +2056,7 @@ BX_CPU_C::LODSW_eAXXv(bxInstruction_c *i)
else else
#endif // #if BX_SUPPORT_X86_64 #endif // #if BX_SUPPORT_X86_64
if (i->as32L()) { if (i->as32L()) {
Bit32u esi; Bit32u esi = ESI;
esi = ESI;
#if BX_SUPPORT_X86_64 #if BX_SUPPORT_X86_64
if (i->os64L()) { if (i->os64L()) {
@ -2185,9 +2113,7 @@ BX_CPU_C::LODSW_eAXXv(bxInstruction_c *i)
else else
#endif /* BX_CPU_LEVEL >= 3 */ #endif /* BX_CPU_LEVEL >= 3 */
{ /* 16bit address mode */ { /* 16bit address mode */
Bit16u si; Bit16u si = SI;
si = SI;
#if BX_CPU_LEVEL >= 3 #if BX_CPU_LEVEL >= 3
if (i->os32L()) { if (i->os32L()) {