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@ -582,10 +582,10 @@ void sapphire_rapids_t::get_std_cpuid_leaf_7(Bit32u subfunction, cpuid_function_
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// ! [19:19] Architectural LBRs support
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// * [20:20] CET IBT: Support CET indirect branch tracking
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// [21:21] reserved
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// ! [22:22] AMX BF16 support
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// * [22:22] AMX BF16 support
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// * [23:23] AVX512_FP16 instructions support
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// ! [24:24] AMX TILE architecture support
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// ! [25:25] AMX INT8 support
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// * [24:24] AMX TILE architecture support
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// * [25:25] AMX INT8 support
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// * [26:26] IBRS: indirect branch restricted speculation
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// * [27:27] STIBP: single thread indirect branch predictors
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// * [28:28] L1D_FLUSH support
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@ -621,7 +621,7 @@ void sapphire_rapids_t::get_std_cpuid_leaf_7(Bit32u subfunction, cpuid_function_
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// [18:13] Reserved
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// [19:19] WRMSRNS instruction
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// [20:20] Reserved
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// [21:21] AMX-FB16 support
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// [21:21] AMX-FP16 support
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// [22:22] HRESET and CPUID leaf 0x20 support
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// [23:23] AVX IFMA support
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// [25:24] Reserved
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