diff --git a/bochs/bx_debug/dbg_main.cc b/bochs/bx_debug/dbg_main.cc index 42adcf70c..4ff1bc39f 100644 --- a/bochs/bx_debug/dbg_main.cc +++ b/bochs/bx_debug/dbg_main.cc @@ -911,7 +911,7 @@ void bx_dbg_info_control_regs_command(void) dbg_printf("CR3=0x" FMT_PHY_ADDRX "\n", cr3); dbg_printf(" PCD=page-level cache disable=%d\n", (cr3>>4) & 1); dbg_printf(" PWT=page-level write-through=%d\n", (cr3>>3) & 1); -#if BX_CPU_LEVEL >= 4 +#if BX_CPU_LEVEL >= 5 Bit32u cr4 = SIM->get_param_num("CR4", dbg_cpu_list)->get(); dbg_printf("CR4=0x%08x: %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s\n", cr4, (cr4 & (1<<20)) ? "SMEP" : "smep", diff --git a/bochs/cpu/Makefile.in b/bochs/cpu/Makefile.in index 1d958aeb8..13ec0bd48 100644 --- a/bochs/cpu/Makefile.in +++ b/bochs/cpu/Makefile.in @@ -131,8 +131,9 @@ CPUDB_OBJS = cpudb/corei7_sandy_bridge_2600K.o \ cpudb/core2_extreme_x9770.o \ cpudb/p4_prescott_celeron_336.o \ cpudb/athlon64_clawhammer.o \ - cpudb/p3_katmai.o \ + cpudb/pentium_mmx.o \ cpudb/p2_klamath.o \ + cpudb/p3_katmai.o \ cpudb/p4_willamette.o \ cpudb/atom_n270.o @@ -836,13 +837,13 @@ cpudb/athlon64_clawhammer.o: cpudb/athlon64_clawhammer.@CPP_SUFFIX@ ../bochs.h . cpuid.h crregs.h descriptor.h instr.h ia_opcodes.h lazy_flags.h icache.h \ apic.h ../cpu/i387.h ../fpu/softfloat.h ../fpu/tag_w.h ../fpu/status_w.h \ ../fpu/control_w.h ../cpu/xmm.h vmx.h stack.h cpudb/athlon64_clawhammer.h -cpudb/p3_katmai.o: cpudb/p3_katmai.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \ +cpudb/pentium_mmx.o: cpudb/pentium_mmx.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \ ../bx_debug/debug.h ../bxversion.h ../gui/siminterface.h \ ../gui/paramtree.h ../memory/memory.h ../pc_system.h ../plugin.h \ ../extplugin.h ../gui/gui.h ../instrument/stubs/instrument.h cpu.h \ cpuid.h crregs.h descriptor.h instr.h ia_opcodes.h lazy_flags.h icache.h \ apic.h ../cpu/i387.h ../fpu/softfloat.h ../fpu/tag_w.h ../fpu/status_w.h \ - ../fpu/control_w.h ../cpu/xmm.h vmx.h stack.h cpudb/p3_katmai.h + ../fpu/control_w.h ../cpu/xmm.h vmx.h stack.h cpudb/pentium_mmx.h cpudb/p2_klamath.o: cpudb/p2_klamath.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \ ../bx_debug/debug.h ../bxversion.h ../gui/siminterface.h \ ../gui/paramtree.h ../memory/memory.h ../pc_system.h ../plugin.h \ @@ -850,6 +851,13 @@ cpudb/p2_klamath.o: cpudb/p2_klamath.@CPP_SUFFIX@ ../bochs.h ../config.h ../osde cpuid.h crregs.h descriptor.h instr.h ia_opcodes.h lazy_flags.h icache.h \ apic.h ../cpu/i387.h ../fpu/softfloat.h ../fpu/tag_w.h ../fpu/status_w.h \ ../fpu/control_w.h ../cpu/xmm.h vmx.h stack.h cpudb/p2_klamath.h +cpudb/p3_katmai.o: cpudb/p3_katmai.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \ + ../bx_debug/debug.h ../bxversion.h ../gui/siminterface.h \ + ../gui/paramtree.h ../memory/memory.h ../pc_system.h ../plugin.h \ + ../extplugin.h ../gui/gui.h ../instrument/stubs/instrument.h cpu.h \ + cpuid.h crregs.h descriptor.h instr.h ia_opcodes.h lazy_flags.h icache.h \ + apic.h ../cpu/i387.h ../fpu/softfloat.h ../fpu/tag_w.h ../fpu/status_w.h \ + ../fpu/control_w.h ../cpu/xmm.h vmx.h stack.h cpudb/p3_katmai.h cpudb/p4_willamette.o: cpudb/p4_willamette.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \ ../bx_debug/debug.h ../bxversion.h ../gui/siminterface.h \ ../gui/paramtree.h ../memory/memory.h ../pc_system.h ../plugin.h \ diff --git a/bochs/cpu/cpudb/p2_klamath.h b/bochs/cpu/cpudb/p2_klamath.h index ea4cbf111..9765eb719 100755 --- a/bochs/cpu/cpudb/p2_klamath.h +++ b/bochs/cpu/cpudb/p2_klamath.h @@ -21,8 +21,8 @@ // ///////////////////////////////////////////////////////////////////////// -#ifndef BX_p2_klamath_CPUID_DEFINITIONS_H -#define BX_p2_klamath_CPUID_DEFINITIONS_H +#ifndef BX_P2_KLAMATH_CPUID_DEFINITIONS_H +#define BX_P2_KLAMATH_CPUID_DEFINITIONS_H #if BX_CPU_LEVEL >= 6 && BX_SUPPORT_X86_64 == 0 diff --git a/bochs/cpu/cpudb/pentium_mmx.cc b/bochs/cpu/cpudb/pentium_mmx.cc new file mode 100755 index 000000000..d5556cb9b --- /dev/null +++ b/bochs/cpu/cpudb/pentium_mmx.cc @@ -0,0 +1,176 @@ +///////////////////////////////////////////////////////////////////////// +// $Id$ +///////////////////////////////////////////////////////////////////////// +// +// Copyright (c) 2011 Stanislav Shwartsman +// Written by Stanislav Shwartsman [sshwarts at sourceforge net] +// +// This library is free software; you can redistribute it and/or +// modify it under the terms of the GNU Lesser General Public +// License as published by the Free Software Foundation; either +// version 2 of the License, or (at your option) any later version. +// +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +// Lesser General Public License for more details. +// +// You should have received a copy of the GNU Lesser General Public +// License along with this library; if not, write to the Free Software +// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA +// +///////////////////////////////////////////////////////////////////////// + +#include "bochs.h" +#include "cpu/cpu.h" +#include "param_names.h" +#include "pentium_mmx.h" + +#define LOG_THIS cpu-> + +#if BX_CPU_LEVEL == 5 + +pentium_mmx_t::pentium_mmx_t(BX_CPU_C *cpu): bx_cpuid_t(cpu) +{ + if (BX_SUPPORT_X86_64) + BX_PANIC(("x86-64 should be disabled for Pentium MMX configuration")); + + if (BX_CPU_LEVEL != 5) + BX_PANIC(("Pentium MMX should be compiled with BX_CPU_LEVEL=5")); +} + +void pentium_mmx_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const +{ + switch(function) { + case 0x00000000: + get_std_cpuid_leaf_0(leaf); + return; + case 0x00000001: + default: + get_std_cpuid_leaf_1(leaf); + return; + } +} + +Bit32u pentium_mmx_t::get_isa_extensions_bitmask(void) const +{ + return BX_CPU_X87 | + BX_CPU_486 | + BX_CPU_PENTIUM | + BX_CPU_MMX; +} + +Bit32u pentium_mmx_t::get_cpu_extensions_bitmask(void) const +{ + return BX_CPU_DEBUG_EXTENSIONS | + BX_CPU_VME | +#if BX_PHY_ADDRESS_LONG + BX_CPU_PSE36 | +#endif + BX_CPU_PSE; +} + +// leaf 0x00000000 // +void pentium_mmx_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf) const +{ + static const char* vendor_string = "GenuineIntel"; + + // EAX: highest std function understood by CPUID + // EBX: vendor ID string + // EDX: vendor ID string + // ECX: vendor ID string + leaf->eax = 0x1; + + // CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...) + memcpy(&(leaf->ebx), vendor_string, 4); + memcpy(&(leaf->edx), vendor_string + 4, 4); + memcpy(&(leaf->ecx), vendor_string + 8, 4); +#ifdef BX_BIG_ENDIAN + leaf->ebx = bx_bswap32(leaf->ebx); + leaf->ecx = bx_bswap32(leaf->ecx); + leaf->edx = bx_bswap32(leaf->edx); +#endif +} + +// leaf 0x00000001 // +void pentium_mmx_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const +{ + // EAX: CPU Version Information + // [3:0] Stepping ID + // [7:4] Model: starts at 1 + // [11:8] Family: 4=486, 5=Pentium, 6=PPro, ... + // [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved + // [19:16] Extended Model + // [27:20] Extended Family + leaf->eax = 0x00000543; + + leaf->ebx = 0; + leaf->ecx = 0; + + // EDX: Standard Feature Flags + // * [0:0] FPU on chip + // * [1:1] VME: Virtual-8086 Mode enhancements + // * [2:2] DE: Debug Extensions (I/O breakpoints) + // * [3:3] PSE: Page Size Extensions + // * [4:4] TSC: Time Stamp Counter + // * [5:5] MSR: RDMSR and WRMSR support + // [6:6] PAE: Physical Address Extensions + // * [7:7] MCE: Machine Check Exception + // * [8:8] CXS: CMPXCHG8B instruction + // [9:9] APIC: APIC on Chip + // [10:10] Reserved + // [11:11] SYSENTER/SYSEXIT support + // [12:12] MTRR: Memory Type Range Reg + // [13:13] PGE/PTE Global Bit + // [14:14] MCA: Machine Check Architecture + // [15:15] CMOV: Cond Mov/Cmp Instructions + // [16:16] PAT: Page Attribute Table + // [17:17] PSE-36: Physical Address Extensions + // [18:18] PSN: Processor Serial Number + // [19:19] CLFLUSH: CLFLUSH Instruction support + // [20:20] Reserved + // [21:21] DS: Debug Store + // [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities + // * [23:23] MMX Technology + // [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available) + // [25:25] SSE: SSE Extensions + // [26:26] SSE2: SSE2 Extensions + // [27:27] Self Snoop + // [28:28] Hyper Threading Technology + // [29:29] TM: Thermal Monitor + // [30:30] Reserved + // [31:31] PBE: Pending Break Enable + + leaf->edx = BX_CPUID_STD_X87 | + BX_CPUID_STD_VME | + BX_CPUID_STD_DEBUG_EXTENSIONS | + BX_CPUID_STD_PSE | + BX_CPUID_STD_TSC | + BX_CPUID_STD_MSR | + BX_CPUID_STD_MCE | + BX_CPUID_STD_CMPXCHG8B | +#if BX_PHY_ADDRESS_LONG + BX_CPUID_STD_PSE36 | +#endif + BX_CPUID_STD_MMX; +#if BX_SUPPORT_APIC + // if MSR_APICBASE APIC Global Enable bit has been cleared, + // the CPUID feature flag for the APIC is set to 0. + if (cpu->msr.apicbase & 0x800) + leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip +#endif +} + +void pentium_mmx_t::dump_cpuid(void) const +{ + struct cpuid_function_t leaf; + + for (unsigned n=0; n<=0x1; n++) { + get_cpuid_leaf(n, 0x00000000, &leaf); + BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, leaf.edx)); + } +} + +bx_cpuid_t *create_pentium_mmx_cpuid(BX_CPU_C *cpu) { return new pentium_mmx_t(cpu); } + +#endif diff --git a/bochs/cpu/cpudb/pentium_mmx.h b/bochs/cpu/cpudb/pentium_mmx.h new file mode 100755 index 000000000..2e26382e8 --- /dev/null +++ b/bochs/cpu/cpudb/pentium_mmx.h @@ -0,0 +1,55 @@ +///////////////////////////////////////////////////////////////////////// +// $Id$ +///////////////////////////////////////////////////////////////////////// +// +// Copyright (c) 2011 Stanislav Shwartsman +// Written by Stanislav Shwartsman [sshwarts at sourceforge net] +// +// This library is free software; you can redistribute it and/or +// modify it under the terms of the GNU Lesser General Public +// License as published by the Free Software Foundation; either +// version 2 of the License, or (at your option) any later version. +// +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +// Lesser General Public License for more details. +// +// You should have received a copy of the GNU Lesser General Public +// License along with this library; if not, write to the Free Software +// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA +// +///////////////////////////////////////////////////////////////////////// + +#ifndef BX_PENTIUM_MMX_CPUID_DEFINITIONS_H +#define BX_PENTIUM_MMX_CPUID_DEFINITIONS_H + +#if BX_CPU_LEVEL >= 5 && BX_SUPPORT_X86_64 == 0 + +#include "cpu/cpuid.h" + +class pentium_mmx_t : public bx_cpuid_t { +public: + pentium_mmx_t(BX_CPU_C *cpu); + virtual ~pentium_mmx_t() {} + + // return CPU name + virtual const char *get_name(void) const { return "pentium_mmx"; } + + virtual Bit32u get_isa_extensions_bitmask(void) const; + virtual Bit32u get_cpu_extensions_bitmask(void) const; + + virtual void get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const; + + virtual void dump_cpuid(void) const; + +private: + void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const; + void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const; +}; + +extern bx_cpuid_t *create_pentium_mmx_cpuid(BX_CPU_C *cpu); + +#endif // BX_CPU_LEVEL >= 5 && BX_SUPPORT_X86_64 == 0 + +#endif diff --git a/bochs/cpu/cpudb/pentium_mmx.txt b/bochs/cpu/cpudb/pentium_mmx.txt new file mode 100755 index 000000000..091a716f2 --- /dev/null +++ b/bochs/cpu/cpudb/pentium_mmx.txt @@ -0,0 +1,57 @@ +CPU-Z TXT Report +------------------------------------------------------------------------- + +Binaries +------------------------------------------------------------------------- + +CPU-Z version 1.53.1 + +Processors +------------------------------------------------------------------------- + +Number of processors 1 +Number of threads 1 + +APICs +------------------------------------------------------------------------- + +Processor 0 + -- Core 0 + -- Thread 0 0 + +Processors Information +------------------------------------------------------------------------- + +Processor 1 ID = 0 + Number of cores 1 (max 1) + Number of threads 1 (max 1) + Name Intel Pentium MMX + Codename P55 + Specification + Package Socket 7 (321) + CPUID 5.4.3 + Extended CPUID 5.4 + Core Stepping MXB1 + Technology 0.35 um + Core Speed 167.1 MHz + Instructions sets MMX + L1 Data cache 16 KBytes, 4-way set associative, 32-byte line size + L1 Instruction cache 16 KBytes, 4-way set associative, 32-byte line size + FID/VID Control no + + + +Thread dumps +------------------------------------------------------------------------- + +CPU Thread 0 + APIC ID 0 + Topology Processor ID 0, Core ID 0, Thread ID 0 + Type 01000402h + Max CPUID level 00000001h + Cache descriptor Level 1, I, 16 KB, 1 thread(s) + Cache descriptor Level 1, D, 16 KB, 1 thread(s) + + CPUID + 0x00000000 0x00000001 0x756E6547 0x6C65746E 0x49656E69 + 0x00000001 0x00000543 0x00000000 0x00000000 0x008001BF diff --git a/bochs/cpu/ia_opcodes.h b/bochs/cpu/ia_opcodes.h index 0a0452e0e..2e646a6a0 100644 --- a/bochs/cpu/ia_opcodes.h +++ b/bochs/cpu/ia_opcodes.h @@ -255,11 +255,11 @@ bx_define_opcode(BX_IA_MOV_AXOd, NULL, &BX_CPU_C::MOV_AXOd, 0, 0) bx_define_opcode(BX_IA_MOV_CR0Rd, NULL, &BX_CPU_C::MOV_CR0Rd, 0, 0) bx_define_opcode(BX_IA_MOV_CR2Rd, NULL, &BX_CPU_C::MOV_CR2Rd, 0, 0) bx_define_opcode(BX_IA_MOV_CR3Rd, NULL, &BX_CPU_C::MOV_CR3Rd, 0, 0) -bx_define_opcode(BX_IA_MOV_CR4Rd, NULL, &BX_CPU_C::MOV_CR4Rd, BX_CPU_486, 0) +bx_define_opcode(BX_IA_MOV_CR4Rd, NULL, &BX_CPU_C::MOV_CR4Rd, BX_CPU_PENTIUM, 0) bx_define_opcode(BX_IA_MOV_RdCR0, NULL, &BX_CPU_C::MOV_RdCR0, 0, 0) bx_define_opcode(BX_IA_MOV_RdCR2, NULL, &BX_CPU_C::MOV_RdCR2, 0, 0) bx_define_opcode(BX_IA_MOV_RdCR3, NULL, &BX_CPU_C::MOV_RdCR3, 0, 0) -bx_define_opcode(BX_IA_MOV_RdCR4, NULL, &BX_CPU_C::MOV_RdCR4, BX_CPU_486, 0) +bx_define_opcode(BX_IA_MOV_RdCR4, NULL, &BX_CPU_C::MOV_RdCR4, BX_CPU_PENTIUM, 0) bx_define_opcode(BX_IA_MOV_RdDd, NULL, &BX_CPU_C::MOV_RdDd, 0, 0) bx_define_opcode(BX_IA_MOV_DdRd, NULL, &BX_CPU_C::MOV_DdRd, 0, 0) bx_define_opcode(BX_IA_MOV_EAXOd, NULL, &BX_CPU_C::MOV_EAXOd, 0, 0) diff --git a/bochs/cpudb.h b/bochs/cpudb.h index f3f914d85..81493975f 100644 --- a/bochs/cpudb.h +++ b/bochs/cpudb.h @@ -22,7 +22,9 @@ ///////////////////////////////////////////////////////////////////////// bx_define_cpudb(bx_generic) -#if BX_CPU_LEVEL >= 6 +#if BX_CPU_LEVEL == 5 +bx_define_cpudb(pentium_mmx) +#elif BX_CPU_LEVEL >= 6 #if BX_SUPPORT_X86_64 == 0 bx_define_cpudb(p2_klamath) bx_define_cpudb(p3_katmai) diff --git a/bochs/gui/enh_dbg.cc b/bochs/gui/enh_dbg.cc index 1acf65261..51fb47ac7 100644 --- a/bochs/gui/enh_dbg.cc +++ b/bochs/gui/enh_dbg.cc @@ -1251,7 +1251,7 @@ void InitRegObjects() RegObject[cpu][CR0_Rnum] = SIM->get_param_num("CR0", cpu_list); RegObject[cpu][CR2_Rnum] = SIM->get_param_num("CR2", cpu_list); RegObject[cpu][CR3_Rnum] = SIM->get_param_num("CR3", cpu_list); -#if BX_CPU_LEVEL >= 4 +#if BX_CPU_LEVEL >= 5 RegObject[cpu][CR4_Rnum] = SIM->get_param_num("CR4", cpu_list); #endif #if BX_CPU_LEVEL >= 6