code cleanup for future optimization
This commit is contained in:
parent
07f811013c
commit
08de514d9c
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: sse.cc,v 1.64 2009-01-16 18:18:58 sshwarts Exp $
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// $Id: sse.cc,v 1.65 2009-03-10 21:43:11 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (c) 2003 Stanislav Shwartsman
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// Copyright (c) 2003 Stanislav Shwartsman
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@ -652,7 +652,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::PTEST_VdqWdq(bxInstruction_c *i)
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(op2.xmm64u(1) & ~op1.xmm64u(1)) == 0) result |= EFlagsCFMask;
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(op2.xmm64u(1) & ~op1.xmm64u(1)) == 0) result |= EFlagsCFMask;
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setEFlagsOSZAPC(result);
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setEFlagsOSZAPC(result);
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#else
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#else
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BX_INFO(("PTEST_VdqWdq: required SSE4, use --enable-sse option"));
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BX_INFO(("PTEST_VdqWdq: required SSE4, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: sse_move.cc,v 1.97 2009-01-16 18:18:58 sshwarts Exp $
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// $Id: sse_move.cc,v 1.98 2009-03-10 21:43:11 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (c) 2003 Stanislav Shwartsman
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// Copyright (c) 2003 Stanislav Shwartsman
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@ -835,7 +835,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MASKMOVDQU_VdqUdq(bxInstruction_c *i)
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/* and write result back to the memory */
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/* and write result back to the memory */
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write_virtual_dqword(i->seg(), rdi, (Bit8u *) &temp);
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write_virtual_dqword(i->seg(), rdi, (Bit8u *) &temp);
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#else
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#else
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BX_INFO(("MASKMOVDQU_VdqUdq: required SSE2, use --enable-sse option"));
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BX_INFO(("MASKMOVDQU_VdqUdq: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1115,7 +1114,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::PMOVMSKB_GdUdq(bxInstruction_c *i)
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/* now write result back to destination */
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/* now write result back to destination */
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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#else
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#else
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BX_INFO(("PMOVMSKB_GdUdq: required SSE2, use --enable-sse option"));
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BX_INFO(("PMOVMSKB_GdUdq: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1379,7 +1377,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVNTDQA_VdqMdq(bxInstruction_c *i)
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/* now write result back to destination */
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/* now write result back to destination */
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BX_WRITE_XMM_REG(i->nnn(), op);
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BX_WRITE_XMM_REG(i->nnn(), op);
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#else
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#else
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BX_INFO(("MOVNTDQA_VdqMdq: required SSE4, use --enable-sse option"));
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BX_INFO(("MOVNTDQA_VdqMdq: required SSE4, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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// $Id: sse_pfp.cc,v 1.52 2009-01-16 18:18:58 sshwarts Exp $
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// $Id: sse_pfp.cc,v 1.53 2009-03-10 21:43:11 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (c) 2003 Stanislav Shwartsman
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// Copyright (c) 2003 Stanislav Shwartsman
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@ -415,7 +415,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTTSD2SI_GdWsd(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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}
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}
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#else
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#else
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BX_INFO(("CVTTSD2SI_GdWsd: required SSE2, use --enable-sse option"));
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BX_INFO(("CVTTSD2SI_GdWsd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -464,7 +463,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTTSS2SI_GdWss(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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}
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}
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#else
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#else
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BX_INFO(("CVTTSS2SI_GdWss: required SSE, use --enable-sse option"));
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BX_INFO(("CVTTSS2SI_GdWss: required SSE, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -614,7 +612,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTSD2SI_GdWsd(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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}
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}
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#else
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#else
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BX_INFO(("CVTSD2SI_GdWsd: required SSE2, use --enable-sse option"));
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BX_INFO(("CVTSD2SI_GdWsd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -663,7 +660,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTSS2SI_GdWss(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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BX_WRITE_32BIT_REGZ(i->nnn(), result);
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}
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}
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#else
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#else
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BX_INFO(("CVTSS2SI_GdWss: required SSE, use --enable-sse option"));
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BX_INFO(("CVTSS2SI_GdWss: required SSE, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -709,7 +705,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTPS2PD_VpsWps(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), result);
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BX_WRITE_XMM_REG(i->nnn(), result);
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#else
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#else
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BX_INFO(("CVTPS2PD_VpsWps: required SSE2, use --enable-sse option"));
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BX_INFO(("CVTPS2PD_VpsWps: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -755,7 +750,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTPD2PS_VpdWpd(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), result);
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BX_WRITE_XMM_REG(i->nnn(), result);
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#else
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#else
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BX_INFO(("CVTPD2PS_VpdWpd: required SSE2, use --enable-sse option"));
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BX_INFO(("CVTPD2PS_VpdWpd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -793,7 +787,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTSD2SS_VsdWsd(bxInstruction_c *i)
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result = float64_to_float32(op, status_word);
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result = float64_to_float32(op, status_word);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), result);
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BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), result);
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#else
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#else
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BX_INFO(("CVTSD2SS_VsdWsd: required SSE2, use --enable-sse option"));
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BX_INFO(("CVTSD2SS_VsdWsd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -829,7 +822,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CVTSS2SD_VssWss(bxInstruction_c *i)
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result = float32_to_float64(op, status_word);
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result = float32_to_float64(op, status_word);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), result);
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BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), result);
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#else
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#else
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BX_INFO(("CVTSS2SD_VssWss: required SSE2, use --enable-sse option"));
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BX_INFO(("CVTSS2SD_VssWss: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1294,7 +1286,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SQRTPS_VpsWps(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), op);
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BX_WRITE_XMM_REG(i->nnn(), op);
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#else
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#else
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BX_INFO(("SQRTPS_VpsWps: required SSE, use --enable-sse option"));
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BX_INFO(("SQRTPS_VpsWps: required SSE, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1337,7 +1328,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SQRTPD_VpdWpd(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), op);
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BX_WRITE_XMM_REG(i->nnn(), op);
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#else
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#else
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BX_INFO(("SQRTPD_VpdWpd: required SSE2, use --enable-sse option"));
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BX_INFO(("SQRTPD_VpdWpd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1372,7 +1362,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SQRTSD_VsdWsd(bxInstruction_c *i)
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op = float64_sqrt(op, status_word);
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op = float64_sqrt(op, status_word);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op);
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BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op);
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#else
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#else
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BX_INFO(("SQRTSD_VsdWsd: required SSE2, use --enable-sse option"));
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BX_INFO(("SQRTSD_VsdWsd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1407,7 +1396,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SQRTSS_VssWss(bxInstruction_c *i)
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op = float32_sqrt(op, status_word);
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op = float32_sqrt(op, status_word);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op);
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BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op);
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#else
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#else
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BX_INFO(("SQRTSS_VssWss: required SSE, use --enable-sse option"));
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BX_INFO(("SQRTSS_VssWss: required SSE, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1458,7 +1446,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADDPS_VpsWps(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), op1);
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BX_WRITE_XMM_REG(i->nnn(), op1);
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#else
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#else
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BX_INFO(("ADDPS_VpsWps: required SSE, use --enable-sse option"));
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BX_INFO(("ADDPS_VpsWps: required SSE, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1503,7 +1490,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADDPD_VpdWpd(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), op1);
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BX_WRITE_XMM_REG(i->nnn(), op1);
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#else
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#else
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BX_INFO(("ADDPD_VpdWpd: required SSE2, use --enable-sse option"));
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BX_INFO(("ADDPD_VpdWpd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1544,7 +1530,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADDSD_VsdWsd(bxInstruction_c *i)
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op1 = float64_add(op1, op2, status_word);
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op1 = float64_add(op1, op2, status_word);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
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BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
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#else
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#else
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BX_INFO(("ADDSD_VsdWsd: required SSE2, use --enable-sse option"));
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BX_INFO(("ADDSD_VsdWsd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1585,7 +1570,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADDSS_VssWss(bxInstruction_c *i)
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op1 = float32_add(op1, op2, status_word);
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op1 = float32_add(op1, op2, status_word);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
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BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
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#else
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#else
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BX_INFO(("ADDSS_VssWss: required SSE, use --enable-sse option"));
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BX_INFO(("ADDSS_VssWss: required SSE, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1636,7 +1620,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MULPS_VpsWps(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), op1);
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BX_WRITE_XMM_REG(i->nnn(), op1);
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#else
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#else
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BX_INFO(("MULPS_VpsWps: required SSE, use --enable-sse option"));
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BX_INFO(("MULPS_VpsWps: required SSE, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1681,7 +1664,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MULPD_VpdWpd(bxInstruction_c *i)
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
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BX_WRITE_XMM_REG(i->nnn(), op1);
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BX_WRITE_XMM_REG(i->nnn(), op1);
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#else
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#else
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BX_INFO(("MULPD_VpdWpd: required SSE2, use --enable-sse option"));
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BX_INFO(("MULPD_VpdWpd: required SSE2, use --enable-sse option"));
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exception(BX_UD_EXCEPTION, 0, 0);
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exception(BX_UD_EXCEPTION, 0, 0);
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@ -1722,7 +1704,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MULSD_VsdWsd(bxInstruction_c *i)
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op1 = float64_mul(op1, op2, status_word);
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op1 = float64_mul(op1, op2, status_word);
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
|
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MULSD_VsdWsd: required SSE2, use --enable-sse option"));
|
BX_INFO(("MULSD_VsdWsd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -1763,7 +1744,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MULSS_VssWss(bxInstruction_c *i)
|
|||||||
op1 = float32_mul(op1, op2, status_word);
|
op1 = float32_mul(op1, op2, status_word);
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
|
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MULSS_VssWss: required SSE, use --enable-sse option"));
|
BX_INFO(("MULSS_VssWss: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -1814,7 +1794,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SUBPS_VpsWps(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("SUBPS_VpsWps: required SSE, use --enable-sse option"));
|
BX_INFO(("SUBPS_VpsWps: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -1859,7 +1838,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SUBPD_VpdWpd(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("SUBPD_VpdWpd: required SSE2, use --enable-sse option"));
|
BX_INFO(("SUBPD_VpdWpd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -1900,7 +1878,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SUBSD_VsdWsd(bxInstruction_c *i)
|
|||||||
op1 = float64_sub(op1, op2, status_word);
|
op1 = float64_sub(op1, op2, status_word);
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
|
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("SUBSD_VsdWsd: required SSE2, use --enable-sse option"));
|
BX_INFO(("SUBSD_VsdWsd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -1941,7 +1918,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SUBSS_VssWss(bxInstruction_c *i)
|
|||||||
op1 = float32_sub(op1, op2, status_word);
|
op1 = float32_sub(op1, op2, status_word);
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
|
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("SUBSS_VssWss: required SSE, use --enable-sse option"));
|
BX_INFO(("SUBSS_VssWss: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -1997,7 +1973,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MINPS_VpsWps(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MINPS_VpsWps: required SSE, use --enable-sse option"));
|
BX_INFO(("MINPS_VpsWps: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2045,7 +2020,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MINPD_VpdWpd(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MINPD_VpdWpd: required SSE2, use --enable-sse option"));
|
BX_INFO(("MINPD_VpdWpd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2087,7 +2061,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MINSD_VsdWsd(bxInstruction_c *i)
|
|||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(),
|
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(),
|
||||||
(rc == float_relation_less) ? op1 : op2);
|
(rc == float_relation_less) ? op1 : op2);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MINSD_VsdWsd: required SSE2, use --enable-sse option"));
|
BX_INFO(("MINSD_VsdWsd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2129,7 +2102,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MINSS_VssWss(bxInstruction_c *i)
|
|||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(),
|
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(),
|
||||||
(rc == float_relation_less) ? op1 : op2);
|
(rc == float_relation_less) ? op1 : op2);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MINSS_VssWss: required SSE, use --enable-sse option"));
|
BX_INFO(("MINSS_VssWss: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2180,7 +2152,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::DIVPS_VpsWps(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("DIVPS_VpsWps: required SSE, use --enable-sse option"));
|
BX_INFO(("DIVPS_VpsWps: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2225,7 +2196,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::DIVPD_VpdWpd(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("DIVPD_VpdWpd: required SSE2, use --enable-sse option"));
|
BX_INFO(("DIVPD_VpdWpd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2266,7 +2236,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::DIVSD_VsdWsd(bxInstruction_c *i)
|
|||||||
op1 = float64_div(op1, op2, status_word);
|
op1 = float64_div(op1, op2, status_word);
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
|
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("DIVSD_VsdWsd: required SSE2, use --enable-sse option"));
|
BX_INFO(("DIVSD_VsdWsd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2307,7 +2276,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::DIVSS_VssWss(bxInstruction_c *i)
|
|||||||
op1 = float32_div(op1, op2, status_word);
|
op1 = float32_div(op1, op2, status_word);
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
|
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("DIVSS_VssWss: required SSE, use --enable-sse option"));
|
BX_INFO(("DIVSS_VssWss: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2363,7 +2331,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MAXPS_VpsWps(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MAXPS_VpsWps: required SSE, use --enable-sse option"));
|
BX_INFO(("MAXPS_VpsWps: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2411,7 +2378,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MAXPD_VpdWpd(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MAXPD_VpdWpd: required SSE2, use --enable-sse option"));
|
BX_INFO(("MAXPD_VpdWpd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2453,7 +2419,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MAXSD_VsdWsd(bxInstruction_c *i)
|
|||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(),
|
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(),
|
||||||
(rc == float_relation_greater) ? op1 : op2);
|
(rc == float_relation_greater) ? op1 : op2);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MAXSD_VsdWsd: required SSE2, use --enable-sse option"));
|
BX_INFO(("MAXSD_VsdWsd: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2495,7 +2460,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MAXSS_VssWss(bxInstruction_c *i)
|
|||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(),
|
BX_WRITE_XMM_REG_LO_DWORD(i->nnn(),
|
||||||
(rc == float_relation_greater) ? op1 : op2);
|
(rc == float_relation_greater) ? op1 : op2);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("MAXSS_VssWss: required SSE, use --enable-sse option"));
|
BX_INFO(("MAXSS_VssWss: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2540,7 +2504,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::HADDPD_VpdWpd(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("HADDPD_VpdWpd: required SSE3, use --enable-sse option"));
|
BX_INFO(("HADDPD_VpdWpd: required SSE3, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2591,7 +2554,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::HADDPS_VpsWps(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("HADDPS_VpsWps: required SSE3, use --enable-sse option"));
|
BX_INFO(("HADDPS_VpsWps: required SSE3, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2636,7 +2598,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::HSUBPD_VpdWpd(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("HSUBPD_VpdWpd: required SSE3, use --enable-sse option"));
|
BX_INFO(("HSUBPD_VpdWpd: required SSE3, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2687,7 +2648,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::HSUBPS_VpsWps(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("HSUBPS_VpsWps: required SSE3, use --enable-sse option"));
|
BX_INFO(("HSUBPS_VpsWps: required SSE3, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2765,7 +2725,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPPS_VpsWpsIb(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("CMPPS_VpsWpsIb: required SSE, use --enable-sse option"));
|
BX_INFO(("CMPPS_VpsWpsIb: required SSE, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2831,7 +2790,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPPD_VpdWpdIb(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("CMPPD_VpdWpdIb: required SSE2, use --enable-sse option"));
|
BX_INFO(("CMPPD_VpdWpdIb: required SSE2, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -2996,7 +2954,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADDSUBPD_VpdWpd(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("ADDSUBPD_VpdWpd: required SSE3, use --enable-sse option"));
|
BX_INFO(("ADDSUBPD_VpdWpd: required SSE3, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -3047,7 +3004,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADDSUBPS_VpsWps(bxInstruction_c *i)
|
|||||||
|
|
||||||
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
BX_CPU_THIS_PTR check_exceptionsSSE(status_word.float_exception_flags);
|
||||||
BX_WRITE_XMM_REG(i->nnn(), op1);
|
BX_WRITE_XMM_REG(i->nnn(), op1);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("ADDSUBPS_VpsWps: required SSE3, use --enable-sse option"));
|
BX_INFO(("ADDSUBPS_VpsWps: required SSE3, use --enable-sse option"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
|
@ -32,18 +32,18 @@ these four paragraphs for those parts of this code that are retained.
|
|||||||
#define FPATAN_ARR_SIZE 11
|
#define FPATAN_ARR_SIZE 11
|
||||||
|
|
||||||
static const float128 float128_one =
|
static const float128 float128_one =
|
||||||
packFloat128(BX_CONST64(0x3fff000000000000), BX_CONST64(0x0000000000000000));
|
packFloat128(BX_CONST64(0x3fff000000000000), BX_CONST64(0x0000000000000000));
|
||||||
static const float128 float128_sqrt3 =
|
static const float128 float128_sqrt3 =
|
||||||
packFloat128(BX_CONST64(0x3fffbb67ae8584ca), BX_CONST64(0xa73b25742d7078b8));
|
packFloat128(BX_CONST64(0x3fffbb67ae8584ca), BX_CONST64(0xa73b25742d7078b8));
|
||||||
static const floatx80 floatx80_pi =
|
static const floatx80 floatx80_pi =
|
||||||
packFloatx80(0, 0x4000, BX_CONST64(0xc90fdaa22168c235));
|
packFloatx80(0, 0x4000, BX_CONST64(0xc90fdaa22168c235));
|
||||||
|
|
||||||
static const float128 float128_pi2 =
|
static const float128 float128_pi2 =
|
||||||
packFloat128(BX_CONST64(0x3fff921fb54442d1), BX_CONST64(0x8469898CC5170416));
|
packFloat128(BX_CONST64(0x3fff921fb54442d1), BX_CONST64(0x8469898CC5170416));
|
||||||
static const float128 float128_pi4 =
|
static const float128 float128_pi4 =
|
||||||
packFloat128(BX_CONST64(0x3ffe921fb54442d1), BX_CONST64(0x8469898CC5170416));
|
packFloat128(BX_CONST64(0x3ffe921fb54442d1), BX_CONST64(0x8469898CC5170416));
|
||||||
static const float128 float128_pi6 =
|
static const float128 float128_pi6 =
|
||||||
packFloat128(BX_CONST64(0x3ffe0c152382d736), BX_CONST64(0x58465BB32E0F580F));
|
packFloat128(BX_CONST64(0x3ffe0c152382d736), BX_CONST64(0x58465BB32E0F580F));
|
||||||
|
|
||||||
static float128 atan_arr[FPATAN_ARR_SIZE] =
|
static float128 atan_arr[FPATAN_ARR_SIZE] =
|
||||||
{
|
{
|
||||||
@ -231,8 +231,8 @@ return_PI_or_ZERO:
|
|||||||
x = float128_div(b128, a128, status);
|
x = float128_div(b128, a128, status);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
x = float128_div(a128, b128, status);
|
x = float128_div(a128, b128, status);
|
||||||
swap = 1;
|
swap = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
Bit32s xExp = extractFloat128Exp(x);
|
Bit32s xExp = extractFloat128Exp(x);
|
||||||
@ -240,7 +240,7 @@ return_PI_or_ZERO:
|
|||||||
if (xExp <= EXP_BIAS-40)
|
if (xExp <= EXP_BIAS-40)
|
||||||
goto approximation_completed;
|
goto approximation_completed;
|
||||||
|
|
||||||
if (x.hi >= BX_CONST64(0x3ffe800000000000)) // 3/4 < x < 1
|
if (x.hi >= BX_CONST64(0x3ffe800000000000)) // 3/4 < x < 1
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
arctan(x) = arctan((x-1)/(x+1)) + pi/4
|
arctan(x) = arctan((x-1)/(x+1)) + pi/4
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
// $Id: fpu.cc,v 1.51 2009-02-08 17:29:34 sshwarts Exp $
|
// $Id: fpu.cc,v 1.52 2009-03-10 21:43:11 sshwarts Exp $
|
||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
// Copyright (c) 2003 Stanislav Shwartsman
|
// Copyright (c) 2003 Stanislav Shwartsman
|
||||||
@ -34,7 +34,7 @@
|
|||||||
|
|
||||||
#if BX_SUPPORT_FPU
|
#if BX_SUPPORT_FPU
|
||||||
void BX_CPU_C::prepareFPU(bxInstruction_c *i,
|
void BX_CPU_C::prepareFPU(bxInstruction_c *i,
|
||||||
bx_bool check_pending_exceptions, bx_bool update_last_instruction)
|
bx_bool check_pending_exceptions, bx_bool update_last_instruction)
|
||||||
{
|
{
|
||||||
if (BX_CPU_THIS_PTR cr0.get_EM() || BX_CPU_THIS_PTR cr0.get_TS())
|
if (BX_CPU_THIS_PTR cr0.get_EM() || BX_CPU_THIS_PTR cr0.get_TS())
|
||||||
exception(BX_NM_EXCEPTION, 0, 0);
|
exception(BX_NM_EXCEPTION, 0, 0);
|
||||||
@ -448,8 +448,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FNCLEX(bxInstruction_c *i)
|
|||||||
BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
|
BX_CPU_THIS_PTR prepareFPU(i, !CHECK_PENDING_EXCEPTIONS, !UPDATE_LAST_OPCODE);
|
||||||
|
|
||||||
FPU_PARTIAL_STATUS &= ~(FPU_SW_Backward|FPU_SW_Summary|FPU_SW_Stack_Fault|FPU_SW_Precision|
|
FPU_PARTIAL_STATUS &= ~(FPU_SW_Backward|FPU_SW_Summary|FPU_SW_Stack_Fault|FPU_SW_Precision|
|
||||||
FPU_SW_Underflow|FPU_SW_Overflow|FPU_SW_Zero_Div|FPU_SW_Denormal_Op|
|
FPU_SW_Underflow|FPU_SW_Overflow|FPU_SW_Zero_Div|FPU_SW_Denormal_Op|
|
||||||
FPU_SW_Invalid);
|
FPU_SW_Invalid);
|
||||||
|
|
||||||
// do not update last fpu instruction pointer
|
// do not update last fpu instruction pointer
|
||||||
#else
|
#else
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
// $Id: fpu_arith.cc,v 1.16 2009-02-08 17:29:34 sshwarts Exp $
|
// $Id: fpu_arith.cc,v 1.17 2009-03-10 21:43:11 sshwarts Exp $
|
||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
// Copyright (c) 2003 Stanislav Shwartsman
|
// Copyright (c) 2003 Stanislav Shwartsman
|
||||||
@ -77,14 +77,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_ST0_STj(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(i->rm());
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_add(a, b, status);
|
floatx80 result = floatx80_add(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FADD_ST0_STj: required FPU, configure --enable-fpu"));
|
BX_INFO(("FADD_ST0_STj: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -109,16 +107,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_STi_ST0(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_add(a, b, status);
|
floatx80 result = floatx80_add(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(result, i->rm());
|
||||||
|
if (pop_stack)
|
||||||
BX_WRITE_FPU_REG(result, i->rm());
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
if (pop_stack)
|
}
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FADD(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
BX_INFO(("FADD(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -139,15 +136,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_SINGLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_add(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_add(BX_READ_FPU_REG(0),
|
||||||
float32_to_floatx80(load_reg, status), status);
|
float32_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FADD_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FADD_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -168,15 +163,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_DOUBLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_add(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_add(BX_READ_FPU_REG(0),
|
||||||
float64_to_floatx80(load_reg, status), status);
|
float64_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FADD_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FADD_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -200,14 +193,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIADD_WORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_add(a, b, status);
|
floatx80 result = floatx80_add(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FIADD_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FIADD_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -231,14 +222,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIADD_DWORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = int32_to_floatx80(load_reg);
|
floatx80 b = int32_to_floatx80(load_reg);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_add(a, b, status);
|
floatx80 result = floatx80_add(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FIADD_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FIADD_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -261,14 +250,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_ST0_STj(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(i->rm());
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_mul(a, b, status);
|
floatx80 result = floatx80_mul(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FMUL_ST0_STj: required FPU, configure --enable-fpu"));
|
BX_INFO(("FMUL_ST0_STj: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -293,16 +280,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_STi_ST0(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_mul(a, b, status);
|
floatx80 result = floatx80_mul(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(result, i->rm());
|
||||||
|
if (pop_stack)
|
||||||
BX_WRITE_FPU_REG(result, i->rm());
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
if (pop_stack)
|
}
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FMUL(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
BX_INFO(("FMUL(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -323,15 +309,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_SINGLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_mul(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_mul(BX_READ_FPU_REG(0),
|
||||||
float32_to_floatx80(load_reg, status), status);
|
float32_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FMUL_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FMUL_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -352,15 +336,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_DOUBLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_mul(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_mul(BX_READ_FPU_REG(0),
|
||||||
float64_to_floatx80(load_reg, status), status);
|
float64_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FMUL_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FMUL_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -384,14 +366,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIMUL_WORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_mul(a, b, status);
|
floatx80 result = floatx80_mul(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FIMUL_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FIMUL_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -415,14 +395,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIMUL_DWORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = int32_to_floatx80(load_reg);
|
floatx80 b = int32_to_floatx80(load_reg);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_mul(a, b, status);
|
floatx80 result = floatx80_mul(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FIMUL_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FIMUL_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -445,14 +423,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_ST0_STj(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(i->rm());
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(a, b, status);
|
floatx80 result = floatx80_sub(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSUB_ST0_STj: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSUB_ST0_STj: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -475,14 +451,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_ST0_STj(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(a, b, status);
|
floatx80 result = floatx80_sub(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSUBR_ST0_STj: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSUBR_ST0_STj: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -507,17 +481,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_STi_ST0(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(a, b, status);
|
floatx80 result = floatx80_sub(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(result, i->rm());
|
||||||
|
if (pop_stack)
|
||||||
BX_WRITE_FPU_REG(result, i->rm());
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSUB(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSUB(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -542,17 +514,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_STi_ST0(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(i->rm());
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(a, b, status);
|
floatx80 result = floatx80_sub(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(result, i->rm());
|
||||||
|
if (pop_stack)
|
||||||
BX_WRITE_FPU_REG(result, i->rm());
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSUBR(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSUBR(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -573,15 +543,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_SINGLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
||||||
float32_to_floatx80(load_reg, status), status);
|
float32_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSUB_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSUB_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -602,15 +570,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_SINGLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(float32_to_floatx80(load_reg, status),
|
floatx80 result = floatx80_sub(float32_to_floatx80(load_reg, status),
|
||||||
BX_READ_FPU_REG(0), status);
|
BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSUBR_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSUBR_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -631,15 +597,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_DOUBLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
||||||
float64_to_floatx80(load_reg, status), status);
|
float64_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSUB_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSUB_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -660,15 +624,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_DOUBLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(float64_to_floatx80(load_reg, status),
|
floatx80 result = floatx80_sub(float64_to_floatx80(load_reg, status),
|
||||||
BX_READ_FPU_REG(0), status);
|
BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSUBR_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSUBR_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -692,14 +654,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUB_WORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(a, b, status);
|
floatx80 result = floatx80_sub(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FISUB_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FISUB_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -723,14 +683,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUBR_WORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(a, b, status);
|
floatx80 result = floatx80_sub(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FISUBR_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FISUBR_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -754,15 +712,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUB_DWORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = int32_to_floatx80(load_reg);
|
floatx80 b = int32_to_floatx80(load_reg);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
||||||
int32_to_floatx80(load_reg), status);
|
int32_to_floatx80(load_reg), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FISUB_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FISUB_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -786,14 +742,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUBR_DWORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sub(a, b, status);
|
floatx80 result = floatx80_sub(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FISUBR_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FISUBR_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -816,14 +770,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_ST0_STj(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(i->rm());
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(a, b, status);
|
floatx80 result = floatx80_div(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FDIV_ST0_STj: required FPU, configure --enable-fpu"));
|
BX_INFO(("FDIV_ST0_STj: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -846,14 +798,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_ST0_STj(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(a, b, status);
|
floatx80 result = floatx80_div(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FDIVR_ST0_STj: required FPU, configure --enable-fpu"));
|
BX_INFO(("FDIVR_ST0_STj: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -878,16 +828,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_STi_ST0(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(a, b, status);
|
floatx80 result = floatx80_div(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(result, i->rm());
|
||||||
|
if (pop_stack)
|
||||||
BX_WRITE_FPU_REG(result, i->rm());
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
if (pop_stack)
|
}
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FDIV(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
BX_INFO(("FDIV(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -912,16 +861,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_STi_ST0(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(i->rm());
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(a, b, status);
|
floatx80 result = floatx80_div(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(result, i->rm());
|
||||||
|
if (pop_stack)
|
||||||
BX_WRITE_FPU_REG(result, i->rm());
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
if (pop_stack)
|
}
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FDIVR(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
BX_INFO(("FDIVR(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -942,15 +890,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_SINGLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_div(BX_READ_FPU_REG(0),
|
||||||
float32_to_floatx80(load_reg, status), status);
|
float32_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FDIV_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FDIV_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -971,15 +917,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_SINGLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(float32_to_floatx80(load_reg, status),
|
floatx80 result = floatx80_div(float32_to_floatx80(load_reg, status),
|
||||||
BX_READ_FPU_REG(0), status);
|
BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FDIVR_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FDIVR_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -1000,15 +944,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_DOUBLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(BX_READ_FPU_REG(0),
|
floatx80 result = floatx80_div(BX_READ_FPU_REG(0),
|
||||||
float64_to_floatx80(load_reg, status), status);
|
float64_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FDIV_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FDIV_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -1029,15 +971,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_DOUBLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(float64_to_floatx80(load_reg, status),
|
floatx80 result = floatx80_div(float64_to_floatx80(load_reg, status),
|
||||||
BX_READ_FPU_REG(0), status);
|
BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FDIVR_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FDIVR_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -1061,14 +1001,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIV_WORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(a, b, status);
|
floatx80 result = floatx80_div(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FIDIV_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FIDIV_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -1092,14 +1030,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIVR_WORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(a, b, status);
|
floatx80 result = floatx80_div(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FIDIVR_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FIDIVR_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -1123,14 +1059,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIV_DWORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = int32_to_floatx80(load_reg);
|
floatx80 b = int32_to_floatx80(load_reg);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(a, b, status);
|
floatx80 result = floatx80_div(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FIDIV_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FIDIV_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -1154,14 +1088,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIVR_DWORD_INTEGER(bxInstruction_c *i)
|
|||||||
floatx80 b = BX_READ_FPU_REG(0);
|
floatx80 b = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_div(a, b, status);
|
floatx80 result = floatx80_div(a, b, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FIDIVR_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FIDIVR_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -1180,14 +1112,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSQRT(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_sqrt(BX_READ_FPU_REG(0), status);
|
floatx80 result = floatx80_sqrt(BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSQRT: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSQRT: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -1207,14 +1137,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FRNDINT(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
floatx80 result = floatx80_round_to_int(BX_READ_FPU_REG(0), status);
|
floatx80 result = floatx80_round_to_int(BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FRNDINT: required FPU, configure --enable-fpu"));
|
BX_INFO(("FRNDINT: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
// $Id: fpu_compare.cc,v 1.20 2009-02-08 17:29:34 sshwarts Exp $
|
// $Id: fpu_compare.cc,v 1.21 2009-03-10 21:43:11 sshwarts Exp $
|
||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
// Copyright (c) 2003 Stanislav Shwartsman
|
// Copyright (c) 2003 Stanislav Shwartsman
|
||||||
@ -48,7 +48,7 @@ static int status_word_flags_fpu_compare(int float_relation)
|
|||||||
return (FPU_SW_C3);
|
return (FPU_SW_C3);
|
||||||
}
|
}
|
||||||
|
|
||||||
return (-1); // should never get here
|
return (-1); // should never get here
|
||||||
}
|
}
|
||||||
|
|
||||||
#if BX_SUPPORT_FPU || BX_SUPPORT_SSE >= 1
|
#if BX_SUPPORT_FPU || BX_SUPPORT_SSE >= 1
|
||||||
@ -104,17 +104,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_STi(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
|
int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
if (pop_stack)
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FCOM(P)_STi: required FPU, configure --enable-fpu"));
|
BX_INFO(("FCOM(P)_STi: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -148,13 +146,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOMI_ST0_STj(bxInstruction_c *i)
|
|||||||
|
|
||||||
int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
|
int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
|
||||||
|
if (pop_stack)
|
||||||
BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FCOMI(P)_ST0_STj: required P6 FPU, configure --enable-fpu, cpu-level=6"));
|
BX_INFO(("FCOMI(P)_ST0_STj: required P6 FPU, configure --enable-fpu, cpu-level=6"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -189,13 +185,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOMI_ST0_STj(bxInstruction_c *i)
|
|||||||
|
|
||||||
int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
|
int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
|
||||||
|
if (pop_stack)
|
||||||
BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FUCOMI(P)_ST0_STj: required P6 FPU, configure --enable-fpu, cpu-level=6"));
|
BX_INFO(("FUCOMI(P)_ST0_STj: required P6 FPU, configure --enable-fpu, cpu-level=6"));
|
||||||
exception(BX_UD_EXCEPTION, 0, 0);
|
exception(BX_UD_EXCEPTION, 0, 0);
|
||||||
@ -228,13 +222,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOM_STi(bxInstruction_c *i)
|
|||||||
|
|
||||||
int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
|
int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(i->rm()), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
if (pop_stack)
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FUCOM(P)_STi: required FPU, configure --enable-fpu"));
|
BX_INFO(("FUCOM(P)_STi: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -269,15 +261,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_SINGLE_REAL(bxInstruction_c *i)
|
|||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
int rc = floatx80_compare(BX_READ_FPU_REG(0),
|
int rc = floatx80_compare(BX_READ_FPU_REG(0),
|
||||||
float32_to_floatx80(load_reg, status), status);
|
float32_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
if (pop_stack)
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FCOM(P)_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FCOM(P)_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -312,15 +302,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOM_DOUBLE_REAL(bxInstruction_c *i)
|
|||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
int rc = floatx80_compare(BX_READ_FPU_REG(0),
|
int rc = floatx80_compare(BX_READ_FPU_REG(0),
|
||||||
float64_to_floatx80(load_reg, status), status);
|
float64_to_floatx80(load_reg, status), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
if (pop_stack)
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FCOM(P)_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FCOM(P)_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -355,15 +343,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_WORD_INTEGER(bxInstruction_c *i)
|
|||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
int rc = floatx80_compare(BX_READ_FPU_REG(0),
|
int rc = floatx80_compare(BX_READ_FPU_REG(0),
|
||||||
int32_to_floatx80((Bit32s)(load_reg)), status);
|
int32_to_floatx80((Bit32s)(load_reg)), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
if (pop_stack)
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FICOM(P)_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FICOM(P)_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -397,16 +383,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FICOM_DWORD_INTEGER(bxInstruction_c *i)
|
|||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
int rc = floatx80_compare(BX_READ_FPU_REG(0),
|
int rc = floatx80_compare(BX_READ_FPU_REG(0), int32_to_floatx80(load_reg), status);
|
||||||
int32_to_floatx80(load_reg), status);
|
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
if (pop_stack)
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
if (pop_stack)
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FICOM(P)_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FICOM(P)_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -440,13 +423,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOMPP(bxInstruction_c *i)
|
|||||||
|
|
||||||
int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
int rc = floatx80_compare(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FCOMPP: required FPU, configure --enable-fpu"));
|
BX_INFO(("FCOMPP: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -478,13 +459,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FUCOMPP(bxInstruction_c *i)
|
|||||||
|
|
||||||
int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
int rc = floatx80_compare_quiet(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
}
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FUCOMPP: required FPU, configure --enable-fpu"));
|
BX_INFO(("FUCOMPP: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -552,10 +531,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FTST(bxInstruction_c *i)
|
|||||||
|
|
||||||
int rc = floatx80_compare(BX_READ_FPU_REG(0), Const_Z, status);
|
int rc = floatx80_compare(BX_READ_FPU_REG(0), Const_Z, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
setcc(status_word_flags_fpu_compare(rc));
|
||||||
|
|
||||||
setcc(status_word_flags_fpu_compare(rc));
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FTST: required FPU, configure --enable-fpu"));
|
BX_INFO(("FTST: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
// $Id: fpu_const.cc,v 1.14 2009-02-08 17:29:34 sshwarts Exp $
|
// $Id: fpu_const.cc,v 1.15 2009-03-10 21:43:11 sshwarts Exp $
|
||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
// Copyright (c) 2003 Stanislav Shwartsman
|
// Copyright (c) 2003 Stanislav Shwartsman
|
||||||
@ -61,12 +61,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLDL2T(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1))
|
if (! IS_TAG_EMPTY(-1))
|
||||||
{
|
{
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(FPU_round_const(Const_L2T, (FPU_CONTROL_WORD == FPU_RC_UP) ? 1 : 0), 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
||||||
BX_WRITE_FPU_REG(FPU_round_const(Const_L2T, (FPU_CONTROL_WORD == FPU_RC_UP) ? 1 : 0), 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLDL2T: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLDL2T: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -81,12 +81,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLDL2E(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1))
|
if (! IS_TAG_EMPTY(-1))
|
||||||
{
|
{
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(FPU_round_const(Const_L2E, DOWN_OR_CHOP() ? -1 : 0), 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
||||||
BX_WRITE_FPU_REG(FPU_round_const(Const_L2E, DOWN_OR_CHOP() ? -1 : 0), 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLDL2E: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLDL2E: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -101,12 +101,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLDPI(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1))
|
if (! IS_TAG_EMPTY(-1))
|
||||||
{
|
{
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(FPU_round_const(Const_PI, DOWN_OR_CHOP() ? -1 : 0), 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
||||||
BX_WRITE_FPU_REG(FPU_round_const(Const_PI, DOWN_OR_CHOP() ? -1 : 0), 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLDPI: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLDPI: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -121,12 +121,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLDLG2(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1))
|
if (! IS_TAG_EMPTY(-1))
|
||||||
{
|
{
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(FPU_round_const(Const_LG2, DOWN_OR_CHOP() ? -1 : 0), 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
||||||
BX_WRITE_FPU_REG(FPU_round_const(Const_LG2, DOWN_OR_CHOP() ? -1 : 0), 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLDLG2: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLDLG2: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -141,12 +141,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLDLN2(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1))
|
if (! IS_TAG_EMPTY(-1))
|
||||||
{
|
{
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(FPU_round_const(Const_LN2, DOWN_OR_CHOP() ? -1 : 0), 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
||||||
BX_WRITE_FPU_REG(FPU_round_const(Const_LN2, DOWN_OR_CHOP() ? -1 : 0), 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLDLN2: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLDLN2: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -161,12 +161,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD1(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1))
|
if (! IS_TAG_EMPTY(-1))
|
||||||
{
|
{
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(Const_1, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
||||||
BX_WRITE_FPU_REG(Const_1, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLD1: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLD1: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -181,12 +181,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLDZ(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1))
|
if (! IS_TAG_EMPTY(-1))
|
||||||
{
|
{
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(Const_Z, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
||||||
BX_WRITE_FPU_REG(Const_Z, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLDZ: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLDZ: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
// $Id: fpu_load_store.cc,v 1.31 2009-02-08 17:29:34 sshwarts Exp $
|
// $Id: fpu_load_store.cc,v 1.32 2009-03-10 21:43:11 sshwarts Exp $
|
||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
// Copyright (c) 2003 Stanislav Shwartsman
|
// Copyright (c) 2003 Stanislav Shwartsman
|
||||||
@ -80,16 +80,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_SINGLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
// convert to floatx80 format
|
// convert to floatx80 format
|
||||||
floatx80 result = float32_to_floatx80(load_reg, status);
|
floatx80 result = float32_to_floatx80(load_reg, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
}
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLD_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLD_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -110,16 +109,15 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_DOUBLE_REAL(bxInstruction_c *i)
|
|||||||
}
|
}
|
||||||
|
|
||||||
float_status_t status =
|
float_status_t status =
|
||||||
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
||||||
|
|
||||||
// convert to floatx80 format
|
// convert to floatx80 format
|
||||||
floatx80 result = float64_to_floatx80(load_reg, status);
|
floatx80 result = float64_to_floatx80(load_reg, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
}
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLD_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLD_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -138,12 +136,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_EXTENDED_REAL(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1)) {
|
if (! IS_TAG_EMPTY(-1)) {
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
else {
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
}
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FLD_EXTENDED_REAL: required FPU, configure --enable-fpu"));
|
BX_INFO(("FLD_EXTENDED_REAL: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -161,12 +158,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_WORD_INTEGER(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1)) {
|
if (! IS_TAG_EMPTY(-1)) {
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
else {
|
||||||
floatx80 result = int32_to_floatx80((Bit32s) load_reg);
|
floatx80 result = int32_to_floatx80((Bit32s) load_reg);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
}
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FILD_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FILD_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -184,12 +181,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_DWORD_INTEGER(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1)) {
|
if (! IS_TAG_EMPTY(-1)) {
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
else {
|
||||||
floatx80 result = int32_to_floatx80(load_reg);
|
floatx80 result = int32_to_floatx80(load_reg);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
}
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FILD_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FILD_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -207,12 +204,12 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_QWORD_INTEGER(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (! IS_TAG_EMPTY(-1)) {
|
if (! IS_TAG_EMPTY(-1)) {
|
||||||
BX_CPU_THIS_PTR FPU_stack_overflow();
|
BX_CPU_THIS_PTR FPU_stack_overflow();
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
else {
|
||||||
floatx80 result = int64_to_floatx80(load_reg);
|
floatx80 result = int64_to_floatx80(load_reg);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
}
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FILD_QWORD_INTEGER: required FPU, configure --enable-fpu"));
|
BX_INFO(("FILD_QWORD_INTEGER: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -251,7 +248,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBLD_PACKED_BCD(bxInstruction_c *i)
|
|||||||
val64 += ((hi2>>4) & 0x0f) * scale * 10;
|
val64 += ((hi2>>4) & 0x0f) * scale * 10;
|
||||||
|
|
||||||
floatx80 result = int64_to_floatx80(val64);
|
floatx80 result = int64_to_floatx80(val64);
|
||||||
if (hi2 & 0x8000) // set negative
|
if (hi2 & 0x8000) // set negative
|
||||||
floatx80_chs(result);
|
floatx80_chs(result);
|
||||||
|
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
@ -275,14 +272,14 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_STi(bxInstruction_c *i)
|
|||||||
|
|
||||||
if (IS_TAG_EMPTY(0)) {
|
if (IS_TAG_EMPTY(0)) {
|
||||||
BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
|
BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
else {
|
||||||
|
floatx80 st0_reg = BX_READ_FPU_REG(0);
|
||||||
|
|
||||||
floatx80 st0_reg = BX_READ_FPU_REG(0);
|
BX_WRITE_FPU_REG(st0_reg, i->rm());
|
||||||
|
if (pop_stack)
|
||||||
BX_WRITE_FPU_REG(st0_reg, i->rm());
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
if (pop_stack)
|
}
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FST(P)_STi: required FPU, configure --enable-fpu"));
|
BX_INFO(("FST(P)_STi: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -637,7 +634,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP32(bxInstruction_c *i)
|
|||||||
save_reg = floatx80_to_int32_round_to_zero(BX_READ_FPU_REG(0), status);
|
save_reg = floatx80_to_int32_round_to_zero(BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
|
write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
|
||||||
@ -673,7 +670,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP64(bxInstruction_c *i)
|
|||||||
save_reg = floatx80_to_int64_round_to_zero(BX_READ_FPU_REG(0), status);
|
save_reg = floatx80_to_int64_round_to_zero(BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags, 1))
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
|
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
// $Id: fpu_misc.cc,v 1.16 2009-02-08 17:29:34 sshwarts Exp $
|
// $Id: fpu_misc.cc,v 1.17 2009-03-10 21:43:11 sshwarts Exp $
|
||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
// Copyright (c) 2003 Stanislav Shwartsman
|
// Copyright (c) 2003 Stanislav Shwartsman
|
||||||
@ -50,7 +50,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FXCH_STi(bxInstruction_c *i)
|
|||||||
|
|
||||||
if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
if(BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
||||||
{
|
{
|
||||||
/* Masked response */
|
/* Masked response */
|
||||||
if (st0_tag == FPU_Tag_Empty)
|
if (st0_tag == FPU_Tag_Empty)
|
||||||
st0_reg = floatx80_default_nan;
|
st0_reg = floatx80_default_nan;
|
||||||
|
|
||||||
@ -74,14 +74,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCHS(bxInstruction_c *i)
|
|||||||
BX_CPU_THIS_PTR prepareFPU(i);
|
BX_CPU_THIS_PTR prepareFPU(i);
|
||||||
|
|
||||||
if (IS_TAG_EMPTY(0)) {
|
if (IS_TAG_EMPTY(0)) {
|
||||||
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
clear_C1();
|
||||||
|
floatx80 st0_reg = BX_READ_FPU_REG(0);
|
||||||
|
BX_WRITE_FPU_REG(floatx80_chs(st0_reg), 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
clear_C1();
|
|
||||||
|
|
||||||
floatx80 st0_reg = BX_READ_FPU_REG(0);
|
|
||||||
BX_WRITE_FPU_REG(floatx80_chs(st0_reg), 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FCHS: required FPU, configure --enable-fpu"));
|
BX_INFO(("FCHS: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -94,14 +93,13 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FABS(bxInstruction_c *i)
|
|||||||
BX_CPU_THIS_PTR prepareFPU(i);
|
BX_CPU_THIS_PTR prepareFPU(i);
|
||||||
|
|
||||||
if (IS_TAG_EMPTY(0)) {
|
if (IS_TAG_EMPTY(0)) {
|
||||||
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
||||||
return;
|
}
|
||||||
|
else {
|
||||||
|
clear_C1();
|
||||||
|
floatx80 st0_reg = BX_READ_FPU_REG(0);
|
||||||
|
BX_WRITE_FPU_REG(floatx80_abs(st0_reg), 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
clear_C1();
|
|
||||||
|
|
||||||
floatx80 st0_reg = BX_READ_FPU_REG(0);
|
|
||||||
BX_WRITE_FPU_REG(floatx80_abs(st0_reg), 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FABS: required FPU, configure --enable-fpu"));
|
BX_INFO(("FABS: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
// $Id: fpu_tags.cc,v 1.9 2009-02-08 17:29:34 sshwarts Exp $
|
// $Id: fpu_tags.cc,v 1.10 2009-03-10 21:43:11 sshwarts Exp $
|
||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
// Copyright (c) 2003 Stanislav Shwartsman
|
// Copyright (c) 2003 Stanislav Shwartsman
|
||||||
@ -41,7 +41,7 @@ int FPU_tagof(const floatx80 ®)
|
|||||||
if (exp == 0)
|
if (exp == 0)
|
||||||
{
|
{
|
||||||
if (! floatx80_fraction(reg))
|
if (! floatx80_fraction(reg))
|
||||||
return FPU_Tag_Zero;
|
return FPU_Tag_Zero;
|
||||||
|
|
||||||
/* The number is a de-normal or pseudodenormal. */
|
/* The number is a de-normal or pseudodenormal. */
|
||||||
return FPU_Tag_Special;
|
return FPU_Tag_Special;
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
// $Id: fpu_trans.cc,v 1.20 2009-02-08 17:29:34 sshwarts Exp $
|
// $Id: fpu_trans.cc,v 1.21 2009-03-10 21:43:11 sshwarts Exp $
|
||||||
/////////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////////
|
||||||
//
|
//
|
||||||
// Copyright (c) 2003 Stanislav Shwartsman
|
// Copyright (c) 2003 Stanislav Shwartsman
|
||||||
@ -51,10 +51,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::F2XM1(bxInstruction_c *i)
|
|||||||
|
|
||||||
floatx80 result = f2xm1(BX_READ_FPU_REG(0), status);
|
floatx80 result = f2xm1(BX_READ_FPU_REG(0), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("F2XM1: required FPU, configure --enable-fpu"));
|
BX_INFO(("F2XM1: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -79,11 +77,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FYL2X(bxInstruction_c *i)
|
|||||||
|
|
||||||
floatx80 result = fyl2x(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
floatx80 result = fyl2x(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
}
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FYL2X: required FPU, configure --enable-fpu"));
|
BX_INFO(("FYL2X: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -140,12 +137,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPTAN(bxInstruction_c *i)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(y, 0);
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
BX_WRITE_FPU_REG(y, 0);
|
BX_WRITE_FPU_REG(Const_1, 0);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
}
|
||||||
BX_WRITE_FPU_REG(Const_1, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FPTAN: required FPU, configure --enable-fpu"));
|
BX_INFO(("FPTAN: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -170,11 +166,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPATAN(bxInstruction_c *i)
|
|||||||
|
|
||||||
floatx80 result = fpatan(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
floatx80 result = fpatan(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
}
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FPATAN: required FPU, configure --enable-fpu"));
|
BX_INFO(("FPATAN: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -212,12 +207,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FXTRACT(bxInstruction_c *i)
|
|||||||
floatx80 a = BX_READ_FPU_REG(0);
|
floatx80 a = BX_READ_FPU_REG(0);
|
||||||
floatx80 b = floatx80_extract(a, status);
|
floatx80 b = floatx80_extract(a, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(b, 0); // exponent
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
BX_WRITE_FPU_REG(b, 0); // exponent
|
BX_WRITE_FPU_REG(a, 0); // fraction
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
}
|
||||||
BX_WRITE_FPU_REG(a, 0); // fraction
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FXTRACT: required FPU, configure --enable-fpu"));
|
BX_INFO(("FXTRACT: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -247,20 +241,17 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPREM1(bxInstruction_c *i)
|
|||||||
|
|
||||||
floatx80 result = floatx80_ieee754_remainder(a, b, quotient, status);
|
floatx80 result = floatx80_ieee754_remainder(a, b, quotient, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
int cc = 0;
|
||||||
|
if (quotient == (Bit64u) -1) cc = FPU_SW_C2;
|
||||||
int cc = 0;
|
else {
|
||||||
if (quotient == (Bit64u) -1) cc = FPU_SW_C2;
|
if (quotient & 1) cc |= FPU_SW_C1;
|
||||||
else
|
if (quotient & 2) cc |= FPU_SW_C3;
|
||||||
{
|
if (quotient & 4) cc |= FPU_SW_C0;
|
||||||
if (quotient & 1) cc |= FPU_SW_C1;
|
}
|
||||||
if (quotient & 2) cc |= FPU_SW_C3;
|
setcc(cc);
|
||||||
if (quotient & 4) cc |= FPU_SW_C0;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
}
|
}
|
||||||
setcc(cc);
|
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FPREM1: required FPU, configure --enable-fpu"));
|
BX_INFO(("FPREM1: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -290,20 +281,18 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FPREM(bxInstruction_c *i)
|
|||||||
|
|
||||||
floatx80 result = floatx80_remainder(a, b, quotient, status);
|
floatx80 result = floatx80_remainder(a, b, quotient, status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
int cc = 0;
|
||||||
|
if (quotient == (Bit64u) -1) cc = FPU_SW_C2;
|
||||||
|
else {
|
||||||
|
if (quotient & 1) cc |= FPU_SW_C1;
|
||||||
|
if (quotient & 2) cc |= FPU_SW_C3;
|
||||||
|
if (quotient & 4) cc |= FPU_SW_C0;
|
||||||
|
}
|
||||||
|
setcc(cc);
|
||||||
|
|
||||||
int cc = 0;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
if (quotient == (Bit64u) -1) cc = FPU_SW_C2;
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if (quotient & 1) cc |= FPU_SW_C1;
|
|
||||||
if (quotient & 2) cc |= FPU_SW_C3;
|
|
||||||
if (quotient & 4) cc |= FPU_SW_C0;
|
|
||||||
}
|
}
|
||||||
setcc(cc);
|
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FPREM: required FPU, configure --enable-fpu"));
|
BX_INFO(("FPREM: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -328,11 +317,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FYL2XP1(bxInstruction_c *i)
|
|||||||
|
|
||||||
floatx80 result = fyl2xp1(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
floatx80 result = fyl2xp1(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
||||||
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
}
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FYL2XP1: required FPU, configure --enable-fpu"));
|
BX_INFO(("FYL2XP1: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -376,12 +364,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSINCOS(bxInstruction_c *i)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags)) {
|
||||||
return;
|
BX_WRITE_FPU_REG(sin_y, 0);
|
||||||
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
||||||
BX_WRITE_FPU_REG(sin_y, 0);
|
BX_WRITE_FPU_REG(cos_y, 0);
|
||||||
BX_CPU_THIS_PTR the_i387.FPU_push();
|
}
|
||||||
BX_WRITE_FPU_REG(cos_y, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSINCOS: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSINCOS: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -406,10 +393,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSCALE(bxInstruction_c *i)
|
|||||||
|
|
||||||
floatx80 result = floatx80_scale(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
floatx80 result = floatx80_scale(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(result, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(result, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSCALE: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSCALE: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -439,10 +424,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSIN(bxInstruction_c *i)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(y, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(y, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FSIN: required FPU, configure --enable-fpu"));
|
BX_INFO(("FSIN: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
@ -472,10 +455,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::FCOS(bxInstruction_c *i)
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
||||||
return;
|
BX_WRITE_FPU_REG(y, 0);
|
||||||
|
|
||||||
BX_WRITE_FPU_REG(y, 0);
|
|
||||||
#else
|
#else
|
||||||
BX_INFO(("FCOS: required FPU, configure --enable-fpu"));
|
BX_INFO(("FCOS: required FPU, configure --enable-fpu"));
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
Reference in New Issue
Block a user