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increase max configurable msrs to 0x1000 again

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This commit is contained in:
Stanislav Shwartsman 2019-12-06 12:31:51 +00:00
parent 8c385f2a9a
commit 06d826755b
2 changed files with 3 additions and 3 deletions
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4
bochs/cpu/apic.cc
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@ -1280,7 +1280,7 @@ bx_bool bx_local_apic_c::read_x2apic(unsigned index, Bit64u *val_64)
*val_64 = read_aligned(index); *val_64 = read_aligned(index);
break; break;
default: default:
BX_DEBUG(("read_x2apic: not supported apic register 0x%08x", index)); BX_ERROR(("read_x2apic: not supported apic register 0x%08x", index));
return 0; return 0;
} }
@ -1366,7 +1366,7 @@ bx_bool bx_local_apic_c::write_x2apic(unsigned index, Bit32u val32_hi, Bit32u va
case BX_LAPIC_TIMER_DIVIDE_CFG: case BX_LAPIC_TIMER_DIVIDE_CFG:
break; // use legacy write break; // use legacy write
default: default:
BX_DEBUG(("write_x2apic: not supported apic register 0x%08x", index)); BX_ERROR(("write_x2apic: not supported apic register 0x%08x", index));
return 0; return 0;
} }

2
bochs/cpu/cpu.h
View File

@ -328,7 +328,7 @@ enum BxCpuMode {
BX_MODE_LONG_64 = 4 // EFER.LMA = 1, CR0.PE=1, CS.L=1 BX_MODE_LONG_64 = 4 // EFER.LMA = 1, CR0.PE=1, CS.L=1
}; };
const unsigned BX_MSR_MAX_INDEX = 0x800; const unsigned BX_MSR_MAX_INDEX = 0x1000;
extern const char* cpu_mode_string(unsigned cpu_mode); extern const char* cpu_mode_string(unsigned cpu_mode);