From 03691c8fca90019f2ba551e3d24f325eb6b65be7 Mon Sep 17 00:00:00 2001 From: Kevin Lawton Date: Sat, 14 Sep 2002 03:31:50 +0000 Subject: [PATCH] (cpu64) Merged segment_ctrl.cc. --- bochs/cpu/Makefile.in | 2 +- bochs/cpu/segment_ctrl.cc | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/bochs/cpu/Makefile.in b/bochs/cpu/Makefile.in index cf95476bb..a28121ff7 100644 --- a/bochs/cpu/Makefile.in +++ b/bochs/cpu/Makefile.in @@ -68,7 +68,6 @@ OBJS32 = \ flag_ctrl.o \ io.o \ proc_ctrl.o \ - segment_ctrl.o \ string.o \ $(EXT_DEBUG_OBJS) \ @@ -104,6 +103,7 @@ OBJSXX = \ logical8.o \ logical32.o \ arith16.o \ + segment_ctrl.o \ # Objects which are only used for x86-64 code, but which have been diff --git a/bochs/cpu/segment_ctrl.cc b/bochs/cpu/segment_ctrl.cc index 255cadb58..7152a281b 100644 --- a/bochs/cpu/segment_ctrl.cc +++ b/bochs/cpu/segment_ctrl.cc @@ -1,5 +1,5 @@ ///////////////////////////////////////////////////////////////////////// -// $Id: segment_ctrl.cc,v 1.6 2001-10-03 13:10:37 bdenney Exp $ +// $Id: segment_ctrl.cc,v 1.7 2002-09-14 03:31:50 kevinlawton Exp $ ///////////////////////////////////////////////////////////////////////// // // Copyright (C) 2001 MandrakeSoft S.A. @@ -60,7 +60,7 @@ BX_CPU_C::LES_GvMp(BxInstruction_t *i) load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es); - BX_WRITE_32BIT_REG(i->nnn, reg_32); + BX_WRITE_32BIT_REGZ(i->nnn, reg_32); } else #endif /* BX_CPU_LEVEL > 2 */ @@ -94,7 +94,7 @@ BX_CPU_C::LDS_GvMp(BxInstruction_t *i) load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds); - BX_WRITE_32BIT_REG(i->nnn, reg_32); + BX_WRITE_32BIT_REGZ(i->nnn, reg_32); } else #endif /* BX_CPU_LEVEL > 2 */ @@ -131,7 +131,7 @@ BX_CPU_C::LFS_GvMp(BxInstruction_t *i) load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs); - BX_WRITE_32BIT_REG(i->nnn, reg_32); + BX_WRITE_32BIT_REGZ(i->nnn, reg_32); } else { /* 16 bit operand size */ Bit16u reg_16; @@ -168,7 +168,7 @@ BX_CPU_C::LGS_GvMp(BxInstruction_t *i) load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs); - BX_WRITE_32BIT_REG(i->nnn, reg_32); + BX_WRITE_32BIT_REGZ(i->nnn, reg_32); } else { /* 16 bit operand size */ Bit16u reg_16; @@ -205,7 +205,7 @@ BX_CPU_C::LSS_GvMp(BxInstruction_t *i) load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss_raw); - BX_WRITE_32BIT_REG(i->nnn, reg_32); + BX_WRITE_32BIT_REGZ(i->nnn, reg_32); } else { /* 16 bit operand size */ Bit16u reg_16;