Some small changes in the PM register handling. No functional change.
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@ -2,7 +2,7 @@
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2006-2019 The Bochs Project
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// Copyright (C) 2006-2020 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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@ -39,9 +39,9 @@
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bx_acpi_ctrl_c* theACPIController = NULL;
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// FIXME
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const Bit8u acpi_pm_iomask[64] = {3, 0, 3, 0, 3, 0, 0, 0, 4, 0, 0, 0, 7, 7, 7, 7,
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7, 7, 7, 7, 1, 1, 0, 0, 7, 7, 0, 0, 7, 7, 7, 7,
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7, 7, 0, 0, 0, 0, 0, 0, 7, 7, 7, 7, 7, 7, 7, 7,
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const Bit8u acpi_pm_iomask[64] = {3, 0, 3, 0, 3, 0, 0, 0, 4, 0, 0, 0, 3, 1, 3, 1,
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7, 1, 3, 1, 1, 1, 0, 0, 3, 1, 0, 0, 7, 1, 3, 1,
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3, 1, 0, 0, 0, 0, 0, 0, 7, 1, 3, 1, 7, 1, 3, 1,
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1, 1, 1, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0};
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const Bit8u acpi_sm_iomask[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 0, 2, 0, 0, 0};
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@ -148,6 +148,8 @@ void bx_acpi_ctrl_c::init(void)
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void bx_acpi_ctrl_c::reset(unsigned type)
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{
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unsigned i;
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BX_ACPI_THIS pci_conf[0x04] = 0x00; // command_io + command_mem
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BX_ACPI_THIS pci_conf[0x05] = 0x00;
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BX_ACPI_THIS pci_conf[0x06] = 0x80; // status_devsel_medium
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@ -180,8 +182,10 @@ void bx_acpi_ctrl_c::reset(unsigned type)
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BX_ACPI_THIS s.pmsts = 0;
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BX_ACPI_THIS s.pmen = 0;
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BX_ACPI_THIS s.pmcntrl = 0;
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BX_ACPI_THIS s.glbctl = 0;
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BX_ACPI_THIS s.tmr_overflow_time = 0xffffff;
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for (i = 0; i < 0x38; i++) {
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BX_ACPI_THIS s.pmreg[i] = 0;
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}
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BX_ACPI_THIS s.smbus.stat = 0;
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BX_ACPI_THIS s.smbus.ctl = 0;
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@ -191,7 +195,7 @@ void bx_acpi_ctrl_c::reset(unsigned type)
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BX_ACPI_THIS s.smbus.data1 = 0;
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BX_ACPI_THIS s.smbus.index = 0;
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for (unsigned i = 0; i < 32; i++) {
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for (i = 0; i < 32; i++) {
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BX_ACPI_THIS s.smbus.data[i] = 0;
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}
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}
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@ -202,8 +206,8 @@ void bx_acpi_ctrl_c::register_state(void)
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BXRS_HEX_PARAM_FIELD(list, pmsts, BX_ACPI_THIS s.pmsts);
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BXRS_HEX_PARAM_FIELD(list, pmen, BX_ACPI_THIS s.pmen);
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BXRS_HEX_PARAM_FIELD(list, pmcntrl, BX_ACPI_THIS s.pmcntrl);
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BXRS_HEX_PARAM_FIELD(list, glbctl, BX_ACPI_THIS s.glbctl);
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BXRS_HEX_PARAM_FIELD(list, tmr_overflow_time, BX_ACPI_THIS s.tmr_overflow_time);
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new bx_shadow_data_c(list, "pmreg", BX_ACPI_THIS s.pmreg, 0x38, 1);
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bx_list_c *smbus = new bx_list_c(list, "smbus", "ACPI SMBus");
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BXRS_HEX_PARAM_FIELD(smbus, stat, BX_ACPI_THIS s.smbus.stat);
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BXRS_HEX_PARAM_FIELD(smbus, ctl, BX_ACPI_THIS s.smbus.ctl);
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@ -318,21 +322,15 @@ Bit32u bx_acpi_ctrl_c::read(Bit32u address, unsigned io_len)
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case 0x08:
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value = BX_ACPI_THIS get_pmtmr();
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break;
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case 0x28:
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value = (BX_ACPI_THIS s.glbctl & 0xfffffffd);
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break;
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case 0x0c: // GPSTS
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case 0x14: // PLVL2
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case 0x15: // PLVL3
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case 0x18: // GLBSTS
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case 0x1c: // DEVSTS
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case 0x30: // GPI
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case 0x31: // GPI
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case 0x32: // GPI
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value = 0x00;
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break;
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default:
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BX_INFO(("read from PM register 0x%02x not implemented yet (len=%d)", reg, io_len));
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value = BX_ACPI_THIS s.pmreg[reg];
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if (io_len >= 2) {
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value |= (BX_ACPI_THIS s.pmreg[reg + 1] << 8);
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}
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if (io_len == 4) {
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value |= (BX_ACPI_THIS s.pmreg[reg + 2] << 16);
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value |= (BX_ACPI_THIS s.pmreg[reg + 3] << 24);
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}
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}
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BX_DEBUG(("read from PM register 0x%02x returns 0x%08x (len=%d)", reg, value, io_len));
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} else {
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@ -437,13 +435,29 @@ void bx_acpi_ctrl_c::write(Bit32u address, Bit32u value, unsigned io_len)
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}
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}
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break;
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case 0x28:
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if (io_len == 4) {
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BX_ACPI_THIS s.glbctl = value;
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}
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case 0x0c: // GPSTS
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case 0x0d: // GPSTS
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case 0x14: // PLVL2
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case 0x15: // PLVL3
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case 0x18: // GLBSTS
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case 0x19: // GLBSTS
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case 0x1c: // DEVSTS
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case 0x1d: // DEVSTS
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case 0x1e: // DEVSTS
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case 0x1f: // DEVSTS
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case 0x30: // GPIREG
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case 0x31: // GPIREG
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case 0x32: // GPIREG
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break;
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default:
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BX_INFO(("write to PM register 0x%02x not implemented yet (len=%d)", reg, io_len));
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BX_ACPI_THIS s.pmreg[reg] = value;
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if (io_len >= 2) {
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BX_ACPI_THIS s.pmreg[reg + 1] = (value >> 8);
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}
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if (io_len == 4) {
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BX_ACPI_THIS s.pmreg[reg + 2] = (value >> 16);
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BX_ACPI_THIS s.pmreg[reg + 3] = (value >> 24);
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}
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}
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} else if ((address & 0xfff0) == BX_ACPI_THIS s.sm_base) {
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if (((BX_ACPI_THIS pci_conf[0x04] & 0x01) == 0) &&
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@ -2,7 +2,7 @@
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2006-2019 The Bochs Project
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// Copyright (C) 2006-2020 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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@ -66,8 +66,8 @@ private:
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Bit16u pmsts;
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Bit16u pmen;
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Bit16u pmcntrl;
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Bit32u glbctl;
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Bit64u tmr_overflow_time;
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Bit8u pmreg[0x38];
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int timer_index;
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struct {
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Bit8u stat;
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