Fixed priveledge level checks
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c07197758b
commit
02c2fc9e89
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: proc_ctrl.cc,v 1.158 2006-08-31 18:18:17 sshwarts Exp $
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// $Id: proc_ctrl.cc,v 1.159 2006-09-10 16:56:55 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -131,7 +131,6 @@ void BX_CPU_C::CLTS(bxInstruction_c *i)
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("CLTS: priveledge check failed, generate #GP(0)"));
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exception(BX_GP_EXCEPTION, 0, 0);
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return;
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}
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BX_CPU_THIS_PTR cr0.ts = 0;
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@ -194,8 +193,8 @@ void BX_CPU_C::MOV_DdRd(bxInstruction_c *i)
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{
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Bit32u val_32;
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if (v8086_mode()) {
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BX_INFO(("MOV_DdRd: v8086 mode causes #GP(0)"));
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("MOV_DdRd: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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@ -213,12 +212,6 @@ void BX_CPU_C::MOV_DdRd(bxInstruction_c *i)
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invalidate_prefetch_q();
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/* #GP(0) if CPL is not 0 */
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if (protected_mode() && CPL!=0) {
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BX_INFO(("MOV_DdRd: #GP(0) if CPL is not 0"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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val_32 = BX_READ_32BIT_REG(i->rm());
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if (bx_dbg.dreg)
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BX_INFO(("MOV_DdRd: DR[%u]=%08xh unhandled",
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@ -329,8 +322,8 @@ void BX_CPU_C::MOV_RdDd(bxInstruction_c *i)
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{
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Bit32u val_32;
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if (v8086_mode()) {
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BX_INFO(("MOV_RdDd: v8086 mode causes #GP(0)"));
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("MOV_RdDd: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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@ -340,12 +333,6 @@ void BX_CPU_C::MOV_RdDd(bxInstruction_c *i)
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if (!i->modC0())
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BX_PANIC(("MOV_RdDd(): rm field not a register!"));
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/* #GP(0) if CPL is not 0 */
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if (protected_mode() && (CPL!=0)) {
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BX_INFO(("MOV_RdDd: #GP(0) if CPL is not 0"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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if (bx_dbg.dreg)
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BX_INFO(("MOV_RdDd: DR%u not implemented yet", i->nnn()));
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@ -591,8 +578,8 @@ void BX_CPU_C::MOV_CdRd(bxInstruction_c *i)
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// mov general register data to control register
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Bit32u val_32;
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if (v8086_mode()) {
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BX_INFO(("MOV_CdRd: v8086 mode causes #GP(0)"));
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("MOV_CdRd: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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@ -610,12 +597,6 @@ void BX_CPU_C::MOV_CdRd(bxInstruction_c *i)
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invalidate_prefetch_q();
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/* #GP(0) if CPL is not 0 */
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if (protected_mode() && CPL!=0) {
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BX_INFO(("MOV_CdRd: #GP(0) if CPL is not 0"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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val_32 = BX_READ_32BIT_REG(i->rm());
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switch (i->nnn()) {
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@ -658,8 +639,8 @@ void BX_CPU_C::MOV_RdCd(bxInstruction_c *i)
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// mov control register data to register
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Bit32u val_32;
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if (v8086_mode()) {
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BX_INFO(("MOV_RdCd: v8086 mode causes #GP(0)"));
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("MOV_RdCd: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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@ -675,12 +656,6 @@ void BX_CPU_C::MOV_RdCd(bxInstruction_c *i)
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if (!i->modC0())
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BX_PANIC(("MOV_RdCd(): rm field not a register!"));
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/* #GP(0) if CPL is not 0 */
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if (protected_mode() && CPL!=0) {
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BX_INFO(("MOV_RdCd: #GP(0) if CPL is not 0"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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switch (i->nnn()) {
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case 0: // CR0 (MSW)
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val_32 = BX_CPU_THIS_PTR cr0.val32;
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@ -861,12 +836,10 @@ void BX_CPU_C::LMSW_Ew(bxInstruction_c *i)
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invalidate_prefetch_q();
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if (protected_mode() || v8086_mode()) {
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if (CPL != 0) {
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BX_INFO(("LMSW: CPL != 0, CPL=%u", (unsigned) CPL));
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("LMSW: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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if (i->modC0()) {
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msw = BX_READ_16BIT_REG(i->rm());
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@ -1542,13 +1515,8 @@ void BX_CPU_C::RDMSR(bxInstruction_c *i)
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#if BX_CPU_LEVEL >= 5
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invalidate_prefetch_q();
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if (v8086_mode()) {
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BX_INFO(("RDMSR: Invalid in virtual 8086 mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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if (protected_mode() && CPL != 0) {
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BX_INFO(("RDMSR: CPL != 0"));
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("RDMSR: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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@ -1686,13 +1654,8 @@ void BX_CPU_C::WRMSR(bxInstruction_c *i)
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#if BX_CPU_LEVEL >= 5
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invalidate_prefetch_q();
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if (v8086_mode()) {
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BX_INFO(("WRMSR: Invalid in virtual 8086 mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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if (protected_mode() && CPL != 0) {
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BX_INFO(("WDMSR: CPL != 0"));
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if (!real_mode() && CPL!=0) {
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BX_ERROR(("WRMSR: CPL!=0 not in real mode"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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@ -2315,6 +2278,8 @@ void BX_CPU_C::SWAPGS(bxInstruction_c *i)
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{
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Bit64u temp_GS_base;
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BX_ASSERT(protected_mode());
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if(CPL != 0)
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exception(BX_GP_EXCEPTION, 0, 0);
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