Started preparing the Bochs BIOS for i440BX chipset support.

- Added symbols for the i440BX host bridge device ID.
- Probe and search for devices on PCI bus #1 (AGP).
- Set up memory and i/o regions only for header type 0.
- Set AGP aperture size to 64 MB.
- TODO: PCI IRQ routing, i440BX specific register setup.

bochs/bios/rombios.c

@@ -134,6 +134,7 @@
 // i440FX is emulated by Bochs and QEMU
 #define PCI_FIXED_HOST_BRIDGE 0x12378086  ;; i440FX PCI bridge
 #define PCI_FIXED_HOST_BRIDGE2 0x01228086 ;; i430FX PCI bridge
+#define PCI_FIXED_HOST_BRIDGE3 0x71908086 ;; i440BX PCI bridge
 
 // #20  is dec 20
 // #$20 is hex 20 = 32
@@ -9591,15 +9592,18 @@ bios32_entry_point:
 #ifdef PCI_FIXED_HOST_BRIDGE
   cmp eax, #PCI_FIXED_HOST_BRIDGE
   je  pci_found
+#endif
 #ifdef PCI_FIXED_HOST_BRIDGE2
   cmp eax, #PCI_FIXED_HOST_BRIDGE2
-  jne unknown_service
+  je  pci_found
+#endif
+#ifdef PCI_FIXED_HOST_BRIDGE3
+  cmp eax, #PCI_FIXED_HOST_BRIDGE3
+  je  pci_found
 #endif
-#else
   ;; say ok if a device is present
   cmp eax, #0xffffffff
   je unknown_service
-#endif
 pci_found:
   mov ebx, #0x000f0000
   mov ecx, #0x10000
@@ -9646,7 +9650,7 @@ pci_pro_devloop:
   dec si
 pci_pro_nextdev:
   inc bx
-  cmp bx, #0x0100
+  cmp bx, #0x0200
   jne pci_pro_devloop
   mov ah, #0x86
   jmp pci_pro_fail
@@ -9667,7 +9671,7 @@ pci_pro_devloop2:
   dec si
 pci_pro_nextdev2:
   inc bx
-  cmp bx, #0x0100
+  cmp bx, #0x0200
   jne pci_pro_devloop2
   mov ah, #0x86
   jmp pci_pro_fail
@@ -9787,15 +9791,18 @@ pcibios_real:
 #ifdef PCI_FIXED_HOST_BRIDGE
   cmp eax, #PCI_FIXED_HOST_BRIDGE
   je  pci_present
+#endif
 #ifdef PCI_FIXED_HOST_BRIDGE2
   cmp eax, #PCI_FIXED_HOST_BRIDGE2
   je  pci_present
 #endif
-#else
+#ifdef PCI_FIXED_HOST_BRIDGE3
+  cmp eax, #PCI_FIXED_HOST_BRIDGE3
+  je  pci_present
+#endif
   ;; say ok if a device is present
   cmp eax, #0xffffffff
   jne  pci_present
-#endif
   pop dx
   pop eax
   mov ah, #0xff
@@ -9834,7 +9841,7 @@ pci_real_devloop:
   dec si
 pci_real_nextdev:
   inc bx
-  cmp bx, #0x0100
+  cmp bx, #0x0200
   jne pci_real_devloop
   mov dx, cx
   shr ecx, #16
@@ -9857,7 +9864,7 @@ pci_real_devloop2:
   dec si
 pci_real_nextdev2:
   inc bx
-  cmp bx, #0x0100
+  cmp bx, #0x0200
   jne pci_real_devloop2
   mov dx, cx
   shr ecx, #16

bochs/bios/rombios.h

@@ -235,6 +235,7 @@
 #define  PCI_COMMAND_IO		0x1	/* Enable response in I/O space */
 #define  PCI_COMMAND_MEMORY	0x2	/* Enable response in Memory space */
 #define PCI_CLASS_DEVICE        0x0a    /* Device class */
+#define PCI_HEADER_TYPE         0x0e    /* Header type */
 #define PCI_INTERRUPT_LINE	0x3c	/* 8 bits */
 #define PCI_INTERRUPT_PIN	0x3d	/* 8 bits */
 #define PCI_MIN_GNT		0x3e	/* 8 bits */
@@ -248,6 +249,7 @@
 #define PCI_VENDOR_ID_INTEL             0x8086
 #define PCI_DEVICE_ID_INTEL_82437       0x0122
 #define PCI_DEVICE_ID_INTEL_82441       0x1237
+#define PCI_DEVICE_ID_INTEL_82443       0x7190
 #define PCI_DEVICE_ID_INTEL_82371FB_0   0x122e
 #define PCI_DEVICE_ID_INTEL_82371FB_1   0x1230
 #define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000

bochs/bios/rombios32.c

@@ -770,6 +770,10 @@ static void pci_bios_init_bridges(PCIDevice *d)
               (device_id == PCI_DEVICE_ID_INTEL_82441 || device_id == PCI_DEVICE_ID_INTEL_82437)) {
         /* i440FX / i430FX PCI bridge */
         bios_shadow_init(d);
+    } else if (vendor_id == PCI_VENDOR_ID_INTEL && device_id == PCI_DEVICE_ID_INTEL_82443) {
+        /* i440BX PCI bridge */
+        bios_shadow_init(d);
+        pci_config_writeb(d, 0xb4, 0x30); /* AGP aperture size 64 MB */
     }
 }
 
@@ -884,13 +888,14 @@ static void pci_bios_init_device(PCIDevice *d)
     PCIDevice d1, *i440fx = &d1;
     uint16_t class;
     uint32_t *paddr;
-    int i, pin, pic_irq, vendor_id, device_id;
+    int headt, i, pin, pic_irq, vendor_id, device_id;
 
     i440fx->bus = 0;
     i440fx->devfn = 0;
     class = pci_config_readw(d, PCI_CLASS_DEVICE);
     vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
     device_id = pci_config_readw(d, PCI_DEVICE_ID);
+    headt = pci_config_readb(d, PCI_HEADER_TYPE);
     BX_INFO("PCI: bus=%d devfn=0x%02x: vendor_id=0x%04x device_id=0x%04x class=0x%04x\n",
             d->bus, d->devfn, vendor_id, device_id, class);
     switch(class) {
@@ -929,6 +934,8 @@ static void pci_bios_init_device(PCIDevice *d)
         break;
     default:
     default_map:
+        if ((headt & 0x03) != 0)
+          break;
         /* default memory mappings */
         for(i = 0; i < PCI_NUM_REGIONS; i++) {
             int ofs;
@@ -1004,7 +1011,7 @@ void pci_for_each_device(void (*init_func)(PCIDevice *d))
     int bus, devfn;
     uint16_t vendor_id, device_id;
 
-    for(bus = 0; bus < 1; bus++) {
+    for(bus = 0; bus < 2; bus++) {
         for(devfn = 0; devfn < 256; devfn++) {
             d->bus = bus;
             d->devfn = devfn;