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Bochs/bochs/cpu/logical8.cc

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- add RCS Id to header of every file. This makes it easier to know what's going on when someone sends in a modified file.
2001-10-03 17:10:38 +04:00
/////////////////////////////////////////////////////////////////////////
This was not a cleanup. Those macros were intentionally there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
2002-10-25 22:26:29 +04:00
// $Id: logical8.cc,v 1.21 2002-10-25 18:26:28 sshwarts Exp $
- add RCS Id to header of every file. This makes it easier to know what's going on when someone sends in a modified file.
2001-10-03 17:10:38 +04:00
/////////////////////////////////////////////////////////////////////////
//
- update copyright dates to 2001 for all mandrake headers - for bochs files with other header, replaced with current mandrake header
2001-04-10 06:20:02 +04:00
// Copyright (C) 2001 MandrakeSoft S.A.
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
//
// MandrakeSoft S.A.
// 43, rue d'Aboukir
// 75002 Paris - France
// http://www.linux-mandrake.com/
// http://www.mandrakesoft.com/
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- parts of the SMP merge apparantly broke the debugger and this revision tries to fix it. The shortcuts to register names such as AX and DL are #defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR. When BX_USE_CPU_SMF=1, this works fine. (This is what bochs used for a long time, and nobody used the SMF=0 mode at all.) To make SMP bochs work, I had to get SMF=0 mode working for the CPU so that there could be an array of cpus. When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which only works within methods of BX_CPU_C. Code outside of BX_CPU_C must reference BX_CPU(num) instead. - to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined. This is only done in the cpu/*.cc code.
2001-05-24 22:46:34 +04:00
#define NEED_CPU_REG_SHORTCUTS 1
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
#include "bochs.h"
merge in BRANCH-io-cleanup. To see the commit logs for this use either cvsweb or cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files. In general this provides a generic interface for logging. logfunctions:: is a class that is inherited by some classes, and also . allocated as a standalone global called 'genlog'. All logging uses . one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this . class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros . respectively. . . An example usage: . BX_INFO(("Hello, World!\n")); iofunctions:: is a class that is allocated once by default, and assigned as the iofunction of each logfunctions instance. It is this class that maintains the file descriptor and other output related code, at this point using vfprintf(). At some future point, someone may choose to write a gui 'console' for bochs to which messages would be redirected simply by assigning a different iofunction class to the various logfunctions objects. More cleanup is coming, but this works for now. If you want to see alot of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1. Comments, bugs, flames, to me: todd@fries.net
2001-05-15 18:49:57 +04:00
#define LOG_THIS BX_CPU_THIS_PTR
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::XOR_EbGb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op2, op1, result;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
result = op1 ^ op2;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
result = op1 ^ op2;
This was not a cleanup. Those macros were intentionally there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
2002-10-25 22:26:29 +04:00
Write_RMW_virtual_byte(result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_XOR8);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::XOR_GbEb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op1, op2, result;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_byte(i->seg(), RMAddr(i), &op2);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
result = op1 ^ op2;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_XOR8);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::XOR_ALIb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op1, op2, sum;
op1 = AL;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2 = i->Ib();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
sum = op1 ^ op2;
AL = sum;
SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_XOR8);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::XOR_EbIb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op2, op1, result;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2 = i->Ib();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
result = op1 ^ op2;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
result = op1 ^ op2;
This was not a cleanup. Those macros were intentionally there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
2002-10-25 22:26:29 +04:00
Write_RMW_virtual_byte(result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_XOR8);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::OR_EbIb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op2, op1, result;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2 = i->Ib();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
result = op1 | op2;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
result = op1 | op2;
This was not a cleanup. Those macros were intentionally there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
2002-10-25 22:26:29 +04:00
Write_RMW_virtual_byte(result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::NOT_Eb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op1_8, result_8;
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
result_8 = ~op1_8;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1_8);
result_8 = ~op1_8;
This was not a cleanup. Those macros were intentionally there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
2002-10-25 22:26:29 +04:00
Write_RMW_virtual_byte(result_8);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::OR_EbGb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op2, op1, result;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
result = op1 | op2;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
result = op1 | op2;
This was not a cleanup. Those macros were intentionally there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
2002-10-25 22:26:29 +04:00
Write_RMW_virtual_byte(result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::OR_GbEb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op1, op2, result;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_byte(i->seg(), RMAddr(i), &op2);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmOr8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#else
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
result = op1 | op2;
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::OR_ALIb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
Bit8u op1, op2, result;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
op1 = AL;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2 = i->Ib();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmOr8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#else
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
result = op1 | op2;
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
AL = result;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
- in OR_ALIb the local variable "sum" was changed to "result" but the non-host-asm line at the end still said "sum". Fixed.
2002-10-11 17:50:14 +04:00
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_OR8);
Integrated patches/patch.extra_eflags_asms from Jas, for more asm() coverage of the high-frequency eflags instructions. That should complete the asm() eflags updates for now, as we should be stabilizing moving towards bochs 2.0.
2002-10-03 22:12:40 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::AND_EbGb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op2, op1, result;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Added new configure option --enable-host-specific-asms, so the user can turn on/off use of native host specific inline asm statements. By default, this option is enabled, so you only need it to disable inline asms in your compile for now. Currently only on x86+GCC environments, will inline asm() statements be used. Eventually, other platforms could specify some asm()s; probably for endian issues such as byte-swapping and unaligned memory accesses. On x86, there are some inline asm()s which do the arithmetic EFLAGS processing so that the lazy flags handling is somewhat bypassed. Eventually, I'll add more, at least for the more common instructions. This adds a little extra performance.
2002-09-23 21:59:18 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#else
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
result = op1 & op2;
Integrated patches/patch.logicalxx_asm from Jas Sandys-Lumsdaine. Essentially, when I coded a few of the instructions to use asm()s for acceleration of the eflags, I got lazy and only used the asm() to compute eflags and let the normal C operation do the actual operation. Jas's patch, moved the asm()s such that they now do the work of the operation as well. The patches look great. The code reads a lot better as well. Further work can be done to give the compiler more options with register scheduling.
2002-09-28 05:48:18 +04:00
#endif
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
}
else {
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
#else
result = op1 & op2;
#endif
This was not a cleanup. Those macros were intentionally there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
2002-10-25 22:26:29 +04:00
Write_RMW_virtual_byte(result);
Integrated patches/patch.logicalxx_asm from Jas Sandys-Lumsdaine. Essentially, when I coded a few of the instructions to use asm()s for acceleration of the eflags, I got lazy and only used the asm() to compute eflags and let the normal C operation do the actual operation. Jas's patch, moved the asm()s such that they now do the work of the operation as well. The patches look great. The code reads a lot better as well. Further work can be done to give the compiler more options with register scheduling.
2002-09-28 05:48:18 +04:00
}
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::AND_GbEb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op1, op2, result;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_byte(i->seg(), RMAddr(i), &op2);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
Added new configure option --enable-host-specific-asms, so the user can turn on/off use of native host specific inline asm statements. By default, this option is enabled, so you only need it to disable inline asms in your compile for now. Currently only on x86+GCC environments, will inline asm() statements be used. Eventually, other platforms could specify some asm()s; probably for endian issues such as byte-swapping and unaligned memory accesses. On x86, there are some inline asm()s which do the arithmetic EFLAGS processing so that the lazy flags handling is somewhat bypassed. Eventually, I'll add more, at least for the more common instructions. This adds a little extra performance.
2002-09-23 21:59:18 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#else
Integrated patches/patch.logicalxx_asm from Jas Sandys-Lumsdaine. Essentially, when I coded a few of the instructions to use asm()s for acceleration of the eflags, I got lazy and only used the asm() to compute eflags and let the normal C operation do the actual operation. Jas's patch, moved the asm()s such that they now do the work of the operation as well. The patches look great. The code reads a lot better as well. Further work can be done to give the compiler more options with register scheduling.
2002-09-28 05:48:18 +04:00
result = op1 & op2;
#endif
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), result);
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::AND_ALIb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit8u op1, op2, result;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
op1 = AL;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2 = i->Ib();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Added new configure option --enable-host-specific-asms, so the user can turn on/off use of native host specific inline asm statements. By default, this option is enabled, so you only need it to disable inline asms in your compile for now. Currently only on x86+GCC environments, will inline asm() statements be used. Eventually, other platforms could specify some asm()s; probably for endian issues such as byte-swapping and unaligned memory accesses. On x86, there are some inline asm()s which do the arithmetic EFLAGS processing so that the lazy flags handling is somewhat bypassed. Eventually, I'll add more, at least for the more common instructions. This adds a little extra performance.
2002-09-23 21:59:18 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#else
Integrated patches/patch.logicalxx_asm from Jas Sandys-Lumsdaine. Essentially, when I coded a few of the instructions to use asm()s for acceleration of the eflags, I got lazy and only used the asm() to compute eflags and let the normal C operation do the actual operation. Jas's patch, moved the asm()s such that they now do the work of the operation as well. The patches look great. The code reads a lot better as well. Further work can be done to give the compiler more options with register scheduling.
2002-09-28 05:48:18 +04:00
result = op1 & op2;
#endif
AL = result;
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::AND_EbIb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Bit8u op2, op1, result;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2 = i->Ib();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Added new configure option --enable-host-specific-asms, so the user can turn on/off use of native host specific inline asm statements. By default, this option is enabled, so you only need it to disable inline asms in your compile for now. Currently only on x86+GCC environments, will inline asm() statements be used. Eventually, other platforms could specify some asm()s; probably for endian issues such as byte-swapping and unaligned memory accesses. On x86, there are some inline asm()s which do the arithmetic EFLAGS processing so that the lazy flags handling is somewhat bypassed. Eventually, I'll add more, at least for the more common instructions. This adds a little extra performance.
2002-09-23 21:59:18 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#else
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
result = op1 & op2;
Integrated patches/patch.logicalxx_asm from Jas Sandys-Lumsdaine. Essentially, when I coded a few of the instructions to use asm()s for acceleration of the eflags, I got lazy and only used the asm() to compute eflags and let the normal C operation do the actual operation. Jas's patch, moved the asm()s such that they now do the work of the operation as well. The patches look great. The code reads a lot better as well. Further work can be done to give the compiler more options with register scheduling.
2002-09-28 05:48:18 +04:00
#endif
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result);
}
else {
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmAnd8(result, op1, op2, flags32);
setEFlagsOSZAPC(flags32);
More merging of modRM==11b if () clauses in logical*.cc functions, and code cleanup.
2002-09-30 07:37:42 +04:00
#else
result = op1 & op2;
#endif
This was not a cleanup. Those macros were intentionally there to offer a way to substitute more efficient code to do the RMW cases. At the moment, they just map to the normal functions. Sorry, restored the previous version ...
2002-10-25 22:26:29 +04:00
Write_RMW_virtual_byte(result);
Integrated patches/patch.logicalxx_asm from Jas Sandys-Lumsdaine. Essentially, when I coded a few of the instructions to use asm()s for acceleration of the eflags, I got lazy and only used the asm() to compute eflags and let the normal C operation do the actual operation. Jas's patch, moved the asm()s such that they now do the work of the operation as well. The patches look great. The code reads a lot better as well. Further work can be done to give the compiler more options with register scheduling.
2002-09-28 05:48:18 +04:00
}
#if !(defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_AND8);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::TEST_EbGb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit8u op2, op1;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_byte(i->seg(), RMAddr(i), &op1);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
Added new configure option --enable-host-specific-asms, so the user can turn on/off use of native host specific inline asm statements. By default, this option is enabled, so you only need it to disable inline asms in your compile for now. Currently only on x86+GCC environments, will inline asm() statements be used. Eventually, other platforms could specify some asm()s; probably for endian issues such as byte-swapping and unaligned memory accesses. On x86, there are some inline asm()s which do the arithmetic EFLAGS processing so that the lazy flags handling is somewhat bypassed. Eventually, I'll add more, at least for the more common instructions. This adds a little extra performance.
2002-09-23 21:59:18 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmTest8(op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#else
Bit8u result;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
result = op1 & op2;
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_TEST8);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::TEST_ALIb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit8u op2, op1;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
op1 = AL;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2 = i->Ib();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Added new configure option --enable-host-specific-asms, so the user can turn on/off use of native host specific inline asm statements. By default, this option is enabled, so you only need it to disable inline asms in your compile for now. Currently only on x86+GCC environments, will inline asm() statements be used. Eventually, other platforms could specify some asm()s; probably for endian issues such as byte-swapping and unaligned memory accesses. On x86, there are some inline asm()s which do the arithmetic EFLAGS processing so that the lazy flags handling is somewhat bypassed. Eventually, I'll add more, at least for the more common instructions. This adds a little extra performance.
2002-09-23 21:59:18 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmTest8(op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#else
Bit8u result;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
result = op1 & op2;
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_TEST8);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::TEST_EbIb(bxInstruction_c *i)
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
{
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit8u op2, op1;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2 = i->Ib();
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op1 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
else {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_byte(i->seg(), RMAddr(i), &op1);
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
Added new configure option --enable-host-specific-asms, so the user can turn on/off use of native host specific inline asm statements. By default, this option is enabled, so you only need it to disable inline asms in your compile for now. Currently only on x86+GCC environments, will inline asm() statements be used. Eventually, other platforms could specify some asm()s; probably for endian issues such as byte-swapping and unaligned memory accesses. On x86, there are some inline asm()s which do the arithmetic EFLAGS processing so that the lazy flags handling is somewhat bypassed. Eventually, I'll add more, at least for the more common instructions. This adds a little extra performance.
2002-09-23 21:59:18 +04:00
#if (defined(__i386__) && defined(__GNUC__) && BX_SupportHostAsms)
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
Bit32u flags32;
Moved the asm() statements from the arithmetic instruction emulation into inline functions with asm() statements in cpu.h. This cleans up the *.cc code (which now doesn't have any asm()s in it), and centralizes the asm() code so constraints can be modified in one place. This also makes it easier to cover more instructions with asm()s for more efficient eflags handling.
2002-10-08 02:51:58 +04:00
asmTest8(op1, op2, flags32);
setEFlagsOSZAPC(flags32);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#else
Bit8u result;
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
result = op1 & op2;
SET_FLAGS_OSZAPC_8(op1, op2, result, BX_INSTR_TEST8);
Added more x86 specific asm() code to directly handle eflags return values for some common instructions (like test/and/cmp). Only compiles in on x86 of course.
2002-09-23 02:22:16 +04:00
#endif
- entered original Bochs snapshot bochs-2000_0325a.tar.gz from ftp.bochs.com
2001-04-10 05:04:59 +04:00
}
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