Bochs/bochs/cpu/arith64.cc

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/////////////////////////////////////////////////////////////////////////
// $Id$
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001-2015 The Bochs Project
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
2009-01-16 21:18:59 +03:00
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#include "cpu.h"
#define LOG_THIS BX_CPU_THIS_PTR
#if BX_SUPPORT_X86_64
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EqGqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
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sum_64 = op1_64 + op2_64;
write_RMW_linear_qword(sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GqEqR(bxInstruction_c *i)
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{
Bit64u op1_64, op2_64, sum_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = BX_READ_64BIT_REG(i->src());
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sum_64 = op1_64 + op2_64;
BX_WRITE_64BIT_REG(i->dst(), sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
sum_64 = op1_64 + op2_64;
BX_WRITE_64BIT_REG(i->dst(), sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EqGqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
sum_64 = op1_64 + op2_64 + getB_CF();
write_RMW_linear_qword(sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GqEqR(bxInstruction_c *i)
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{
Bit64u op1_64, op2_64, sum_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = BX_READ_64BIT_REG(i->src());
sum_64 = op1_64 + op2_64 + getB_CF();
BX_WRITE_64BIT_REG(i->dst(), sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
sum_64 = op1_64 + op2_64 + getB_CF();
BX_WRITE_64BIT_REG(i->dst(), sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EqGqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
diff_64 = op1_64 - (op2_64 + getB_CF());
write_RMW_linear_qword(diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GqEqR(bxInstruction_c *i)
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{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = BX_READ_64BIT_REG(i->src());
diff_64 = op1_64 - (op2_64 + getB_CF());
BX_WRITE_64BIT_REG(i->dst(), diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
diff_64 = op1_64 - (op2_64 + getB_CF());
BX_WRITE_64BIT_REG(i->dst(), diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EqIdM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - (op2_64 + getB_CF());
write_RMW_linear_qword(diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EqIdR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - (op2_64 + getB_CF());
BX_WRITE_64BIT_REG(i->dst(), diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EqGqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
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diff_64 = op1_64 - op2_64;
write_RMW_linear_qword(diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GqEqR(bxInstruction_c *i)
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{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = BX_READ_64BIT_REG(i->src());
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diff_64 = op1_64 - op2_64;
BX_WRITE_64BIT_REG(i->dst(), diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
diff_64 = op1_64 - op2_64;
BX_WRITE_64BIT_REG(i->dst(), diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EqGqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
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diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GqEqR(bxInstruction_c *i)
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{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = BX_READ_64BIT_REG(i->src());
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diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CDQE(bxInstruction_c *i)
{
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/* CWDE: no flags are affected */
RAX = (Bit32s) EAX;
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CQO(bxInstruction_c *i)
{
/* CQO: no flags are affected */
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if (RAX & BX_CONST64(0x8000000000000000))
RDX = BX_CONST64(0xffffffffffffffff);
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else
RDX = 0;
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EqGqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
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/* XADD dst(r/m), src(r)
* temp <-- src + dst | sum = op2 + op1
* src <-- dst | op2 = op1
* dst <-- tmp | op1 = sum
*/
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
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sum_64 = op1_64 + op2_64;
write_RMW_linear_qword(sum_64);
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/* and write destination into source */
BX_WRITE_64BIT_REG(i->src(), op1_64);
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SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EqGqR(bxInstruction_c *i)
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{
Bit64u op1_64, op2_64, sum_64;
/* XADD dst(r/m), src(r)
* temp <-- src + dst | sum = op2 + op1
* src <-- dst | op2 = op1
* dst <-- tmp | op1 = sum
*/
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = BX_READ_64BIT_REG(i->src());
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sum_64 = op1_64 + op2_64;
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// and write destination into source
// Note: if both op1 & op2 are registers, the last one written
// should be the sum, as op1 & op2 may be the same register.
// For example: XADD AL, AL
BX_WRITE_64BIT_REG(i->src(), op1_64);
BX_WRITE_64BIT_REG(i->dst(), sum_64);
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SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EqIdM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
sum_64 = op1_64 + op2_64;
write_RMW_linear_qword(sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EqIdR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = (Bit32s) i->Id();
sum_64 = op1_64 + op2_64;
BX_WRITE_64BIT_REG(i->dst(), sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EqIdM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
sum_64 = op1_64 + op2_64 + getB_CF();
write_RMW_linear_qword(sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EqIdR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = (Bit32s) i->Id();
sum_64 = op1_64 + op2_64 + getB_CF();
BX_WRITE_64BIT_REG(i->dst(), sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EqIdM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - op2_64;
write_RMW_linear_qword(diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EqIdR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - op2_64;
BX_WRITE_64BIT_REG(i->dst(), diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EqIdM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EqIdR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = (Bit32s) i->Id();
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diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 = - (Bit64s)(op1_64);
write_RMW_linear_qword(op1_64);
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SET_FLAGS_OSZAPC_SUB_64(0, -op1_64, op1_64);
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EqR(bxInstruction_c *i)
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{
Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
op1_64 = - (Bit64s)(op1_64);
BX_WRITE_64BIT_REG(i->dst(), op1_64);
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SET_FLAGS_OSZAPC_SUB_64(0, -op1_64, op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_EqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64++;
write_RMW_linear_qword(op1_64);
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SET_FLAGS_OSZAP_ADD_64(op1_64 - 1, 0, op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_EqR(bxInstruction_c *i)
{
Bit64u rrx = ++BX_READ_64BIT_REG(i->dst());
SET_FLAGS_OSZAP_ADD_64(rrx - 1, 0, rrx);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_EqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64--;
write_RMW_linear_qword(op1_64);
SET_FLAGS_OSZAP_SUB_64(op1_64 + 1, 0, op1_64);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_EqR(bxInstruction_c *i)
{
Bit64u rrx = --BX_READ_64BIT_REG(i->dst());
SET_FLAGS_OSZAP_SUB_64(rrx + 1, 0, rrx);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EqGqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
Bit64u diff_64 = RAX - op1_64;
SET_FLAGS_OSZAPC_SUB_64(RAX, op1_64, diff_64);
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if (diff_64 == 0) { // if accumulator == dest
// dest <-- src
write_RMW_linear_qword(BX_READ_64BIT_REG(i->src()));
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}
else {
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// accumulator <-- dest
write_RMW_linear_qword(op1_64);
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RAX = op1_64;
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}
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EqGqR(bxInstruction_c *i)
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{
Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
Bit64u diff_64 = RAX - op1_64;
SET_FLAGS_OSZAPC_SUB_64(RAX, op1_64, diff_64);
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if (diff_64 == 0) { // if accumulator == dest
// dest <-- src
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
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}
else {
// accumulator <-- dest
RAX = op1_64;
}
BX_NEXT_INSTR(i);
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}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG16B(bxInstruction_c *i)
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{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64_lo, op1_64_hi, diff;
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// check write permission for following write
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read_RMW_linear_dqword_aligned_64(i->seg(), get_laddr64(i->seg(), eaddr), &op1_64_hi, &op1_64_lo);
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diff = RAX - op1_64_lo;
diff |= RDX - op1_64_hi;
if (diff == 0) { // if accumulator == dest
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write_RMW_linear_dqword(RCX, RBX);
assert_ZF();
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}
else {
clear_ZF();
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write_RMW_linear_dqword(op1_64_hi, op1_64_lo);
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// accumulator <-- dest
RAX = op1_64_lo;
RDX = op1_64_hi;
}
BX_NEXT_INSTR(i);
}
- apply patch.ifdef-disabled-options. Comments from that patch are below: For a whole lot of configure options, I put #if...#endif around code that is specific to the option, even in files which are normally only compiled when the option is on. This allows me to create a MS Visual C++ 6.0 workspace that supports many of these options. The workspace will basically compile every file all the time, but the code for disabled options will be commented out by the #if...#endif. This may one day lead to simplification of the Makefiles and configure scripts, but for the moment I'm leaving Makefiles and configure scripts alone. Affected options: BX_SUPPORT_APIC (cpu/apic.cc) BX_SUPPORT_X86_64 (cpu/*64.cc) BX_DEBUGGER (debug/*) BX_DISASM (disasm/*) BX_WITH_nameofgui (gui/*) BX_SUPPORT_CDROM (iodev/cdrom.cc) BX_NE2K_SUPPORT (iodev/eth*.cc, iodev/ne2k.cc) BX_SUPPORT_APIC (iodev/ioapic.cc) BX_IODEBUG_SUPPORT (iodev/iodebug.cc) BX_PCI_SUPPORT (iodev/pci*.cc) BX_SUPPORT_SB16 (iodev/sb*.cc) Modified Files: cpu/apic.cc cpu/arith64.cc cpu/ctrl_xfer64.cc cpu/data_xfer64.cc cpu/fetchdecode64.cc cpu/logical64.cc cpu/mult64.cc cpu/resolve64.cc cpu/shift64.cc cpu/stack64.cc debug/Makefile.in debug/crc.cc debug/dbg_main.cc debug/lexer.l debug/linux.cc debug/parser.c debug/parser.y disasm/dis_decode.cc disasm/dis_groups.cc gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/macintosh.cc gui/rfb.cc gui/sdl.cc gui/term.cc gui/win32.cc gui/wx.cc gui/wxdialog.cc gui/wxmain.cc gui/x.cc iodev/cdrom.cc iodev/eth.cc iodev/eth_arpback.cc iodev/eth_fbsd.cc iodev/eth_linux.cc iodev/eth_null.cc iodev/eth_packetmaker.cc iodev/eth_tap.cc iodev/eth_tuntap.cc iodev/eth_win32.cc iodev/ioapic.cc iodev/iodebug.cc iodev/ne2k.cc iodev/pci.cc iodev/pci2isa.cc iodev/sb16.cc iodev/soundlnx.cc iodev/soundwin.cc
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#endif /* if BX_SUPPORT_X86_64 */