2002-09-13 19:53:22 +04:00
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/////////////////////////////////////////////////////////////////////////
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2003-03-13 03:43:00 +03:00
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// $Id: ctrl_xfer64.cc,v 1.21 2003-03-13 00:43:00 ptrumpet Exp $
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2002-09-13 19:53:22 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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2002-11-19 08:47:45 +03:00
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#if BX_SUPPORT_X86_64
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2002-09-13 19:53:22 +04:00
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::RETnear64_Iw(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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Bit16u imm16;
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Bit64u temp_RSP;
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Bit64u return_RIP;
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I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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temp_RSP = RSP;
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2002-09-18 02:50:53 +04:00
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imm16 = i->Iw();
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2002-09-13 19:53:22 +04:00
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//if ( !can_pop(8) ) {
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// BX_PANIC(("retnear_iw: can't pop RIP"));
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// /* ??? #SS(0) -or #GP(0) */
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// }
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access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_RSP + 0,
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8, CPL==3, BX_READ, &return_RIP);
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/* Pentium book says imm16 is number of words ??? */
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//if ( !can_pop(8 + imm16) ) {
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// BX_PANIC(("retnear_iw: can't release bytes from stack"));
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// /* #GP(0) -or #SS(0) ??? */
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// }
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RIP = return_RIP;
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RSP += 8 + imm16; /* ??? should it be 2*imm16 ? */
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2003-02-13 18:04:11 +03:00
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET, BX_CPU_THIS_PTR rip);
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2002-09-13 19:53:22 +04:00
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::RETnear64(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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Bit64u temp_RSP;
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Bit64u return_RIP;
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I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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temp_RSP = RSP;
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//if ( !can_pop(8) ) {
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// BX_PANIC(("retnear: can't pop RIP"));
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// /* ??? #SS(0) -or #GP(0) */
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// }
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access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_RSP + 0,
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8, CPL==3, BX_READ, &return_RIP);
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RIP = return_RIP;
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RSP += 8;
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2003-02-13 18:04:11 +03:00
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET, BX_CPU_THIS_PTR rip);
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2002-09-13 19:53:22 +04:00
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::RETfar64_Iw(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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Bit64u rip, rcs_raw;
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Bit16s imm16;
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I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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/* ??? is imm16, number of bytes/words depending on operandsize ? */
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2002-09-18 02:50:53 +04:00
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imm16 = i->Iw();
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2002-09-13 19:53:22 +04:00
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#if BX_CPU_LEVEL >= 2
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if (protected_mode()) {
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BX_CPU_THIS_PTR return_protected(i, imm16);
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goto done;
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}
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#endif
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pop_64(&rip);
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pop_64(&rcs_raw);
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RIP = rip;
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) rcs_raw);
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RSP += imm16;
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done:
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2003-02-13 18:04:11 +03:00
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET,
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2002-09-13 19:53:22 +04:00
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::RETfar64(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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Bit64u rip, rcs_raw;
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|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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#if BX_CPU_LEVEL >= 2
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if ( protected_mode() ) {
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BX_CPU_THIS_PTR return_protected(i, 0);
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goto done;
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}
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#endif
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pop_64(&rip);
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pop_64(&rcs_raw); /* 64bit pop, upper 48 bits discarded */
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RIP = rip;
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) rcs_raw);
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done:
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2003-02-13 18:04:11 +03:00
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET,
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2002-09-13 19:53:22 +04:00
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::CALL_Aq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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Bit64u new_RIP;
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Bit32s disp32;
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I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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2002-09-18 02:50:53 +04:00
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disp32 = i->Id();
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2002-09-13 19:53:22 +04:00
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new_RIP = RIP + disp32;
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/* push 64 bit EA of next instruction */
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push_64(BX_CPU_THIS_PTR rip);
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RIP = new_RIP;
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2003-02-13 18:04:11 +03:00
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL, BX_CPU_THIS_PTR rip);
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2002-09-13 19:53:22 +04:00
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::CALL64_Ap(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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Bit16u cs_raw;
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Bit32u disp32;
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|
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|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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2002-09-18 02:50:53 +04:00
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disp32 = i->Id();
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cs_raw = i->Iw2();
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2002-09-13 19:53:22 +04:00
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if (protected_mode()) {
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BX_CPU_THIS_PTR call_protected(i, cs_raw, disp32);
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goto done;
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}
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push_64(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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push_64(BX_CPU_THIS_PTR rip);
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RIP = disp32;
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
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done:
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2003-02-13 18:04:11 +03:00
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL,
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2002-09-13 19:53:22 +04:00
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
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}
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void
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2002-09-18 02:50:53 +04:00
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BX_CPU_C::CALL_Eq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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Bit64u temp_RSP;
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Bit64u op1_64;
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|
|
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|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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|
|
invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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temp_RSP = RSP;
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|
|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
|
|
|
if (i->modC0()) {
|
|
|
|
op1_64 = BX_READ_64BIT_REG(i->rm());
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
|
|
|
|
}
|
2002-09-13 19:53:22 +04:00
|
|
|
|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
|
|
|
push_64(BX_CPU_THIS_PTR rip);
|
|
|
|
RIP = op1_64;
|
2002-09-13 19:53:22 +04:00
|
|
|
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL, BX_CPU_THIS_PTR rip);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::CALL64_Ep(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
|
|
|
Bit16u cs_raw;
|
|
|
|
Bit64u op1_64;
|
|
|
|
|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
2002-09-13 19:53:22 +04:00
|
|
|
#if BX_DEBUGGER
|
|
|
|
BX_CPU_THIS_PTR show_flag |= Flag_call;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* op1_64 is a register or memory reference */
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-13 19:53:22 +04:00
|
|
|
BX_PANIC(("CALL_Ep: op1 is a register"));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* pointer, segment address pair */
|
2002-09-18 09:36:48 +04:00
|
|
|
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
|
|
|
|
read_virtual_word(i->seg(), RMAddr(i)+8, &cs_raw);
|
2002-09-13 19:53:22 +04:00
|
|
|
|
|
|
|
if ( protected_mode() ) {
|
|
|
|
BX_CPU_THIS_PTR call_protected(i, cs_raw, op1_64);
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
push_64(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
|
|
|
|
push_64(BX_CPU_THIS_PTR rip);
|
|
|
|
|
|
|
|
RIP = op1_64;
|
|
|
|
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
|
|
|
|
|
|
|
|
done:
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL,
|
2002-09-13 19:53:22 +04:00
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::JMP_Jq(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
RIP += (Bit32s) i->Id();
|
2002-09-27 11:01:02 +04:00
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, RIP);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::JCC_Jq(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
2002-10-25 15:44:41 +04:00
|
|
|
bx_bool condition;
|
2002-09-13 19:53:22 +04:00
|
|
|
|
2002-09-18 12:00:43 +04:00
|
|
|
switch (i->b1() & 0x0f) {
|
2002-09-13 19:53:22 +04:00
|
|
|
case 0x00: /* JO */ condition = get_OF(); break;
|
|
|
|
case 0x01: /* JNO */ condition = !get_OF(); break;
|
|
|
|
case 0x02: /* JB */ condition = get_CF(); break;
|
|
|
|
case 0x03: /* JNB */ condition = !get_CF(); break;
|
|
|
|
case 0x04: /* JZ */ condition = get_ZF(); break;
|
|
|
|
case 0x05: /* JNZ */ condition = !get_ZF(); break;
|
|
|
|
case 0x06: /* JBE */ condition = get_CF() || get_ZF(); break;
|
|
|
|
case 0x07: /* JNBE */ condition = !get_CF() && !get_ZF(); break;
|
|
|
|
case 0x08: /* JS */ condition = get_SF(); break;
|
|
|
|
case 0x09: /* JNS */ condition = !get_SF(); break;
|
|
|
|
case 0x0A: /* JP */ condition = get_PF(); break;
|
|
|
|
case 0x0B: /* JNP */ condition = !get_PF(); break;
|
2002-09-22 22:22:24 +04:00
|
|
|
case 0x0C: /* JL */ condition = getB_SF() != getB_OF(); break;
|
|
|
|
case 0x0D: /* JNL */ condition = getB_SF() == getB_OF(); break;
|
|
|
|
case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF());
|
2002-09-13 19:53:22 +04:00
|
|
|
break;
|
2002-09-22 22:22:24 +04:00
|
|
|
case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) &&
|
2002-09-13 19:53:22 +04:00
|
|
|
!get_ZF();
|
|
|
|
break;
|
2002-09-22 05:52:21 +04:00
|
|
|
default:
|
|
|
|
condition = 0; // For compiler...all targets should set condition.
|
|
|
|
break;
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (condition) {
|
|
|
|
|
2002-09-18 02:50:53 +04:00
|
|
|
RIP += (Bit32s) i->Id();
|
2002-09-27 11:01:02 +04:00
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-13 19:53:22 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef ignore
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::JMP64_Ap(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
|
|
|
Bit64u disp64;
|
|
|
|
Bit16u cs_raw;
|
|
|
|
|
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
2002-09-18 09:36:48 +04:00
|
|
|
if (i->os32L()) {
|
2002-09-18 02:50:53 +04:00
|
|
|
disp64 = (Bit32s) i->Id();
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-18 02:50:53 +04:00
|
|
|
disp64 = (Bit16s) i->Iw();
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
2002-09-18 02:50:53 +04:00
|
|
|
cs_raw = i->Iw2();
|
2002-09-13 19:53:22 +04:00
|
|
|
|
|
|
|
#if BX_CPU_LEVEL >= 2
|
|
|
|
if (protected_mode()) {
|
|
|
|
BX_CPU_THIS_PTR jump_protected(i, cs_raw, disp32);
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
|
|
|
|
RIP = disp64;
|
|
|
|
|
|
|
|
done:
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP,
|
2002-09-13 19:53:22 +04:00
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::JMP_Eq(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
|
|
|
Bit64u op1_64;
|
|
|
|
|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-18 02:50:53 +04:00
|
|
|
op1_64 = BX_READ_64BIT_REG(i->rm());
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
else {
|
2002-09-18 09:36:48 +04:00
|
|
|
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
RIP = op1_64;
|
|
|
|
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, RIP);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Far indirect jump */
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::JMP64_Ep(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
|
|
|
Bit16u cs_raw;
|
2003-03-13 03:43:00 +03:00
|
|
|
Bit32u op1_32;
|
2002-09-13 19:53:22 +04:00
|
|
|
|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
2002-09-20 07:52:59 +04:00
|
|
|
if (i->modC0()) {
|
2002-09-13 19:53:22 +04:00
|
|
|
BX_PANIC(("JMP_Ep(): op1 is a register"));
|
|
|
|
}
|
|
|
|
|
2003-03-13 03:43:00 +03:00
|
|
|
read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
|
|
|
|
read_virtual_word(i->seg(), RMAddr(i)+4, &cs_raw);
|
2002-09-13 19:53:22 +04:00
|
|
|
|
|
|
|
if ( protected_mode() ) {
|
2003-03-13 03:43:00 +03:00
|
|
|
BX_CPU_THIS_PTR jump_protected(i, cs_raw, op1_32);
|
2002-09-13 19:53:22 +04:00
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
2003-03-13 03:43:00 +03:00
|
|
|
RIP = op1_32;
|
2002-09-13 19:53:22 +04:00
|
|
|
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
|
|
|
|
|
|
|
|
done:
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP,
|
2002-09-15 19:10:21 +04:00
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2002-09-18 02:50:53 +04:00
|
|
|
BX_CPU_C::IRET64(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
|
|
|
Bit32u rip, ecs_raw, eflags;
|
|
|
|
|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
2002-09-13 19:53:22 +04:00
|
|
|
#if BX_DEBUGGER
|
|
|
|
BX_CPU_THIS_PTR show_flag |= Flag_iret;
|
|
|
|
BX_CPU_THIS_PTR show_eip = BX_CPU_THIS_PTR rip;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if BX_CPU_LEVEL >= 2
|
|
|
|
if (BX_CPU_THIS_PTR cr0.pe) {
|
|
|
|
iret_protected(i);
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
#endif
|
2002-09-16 21:00:16 +04:00
|
|
|
|
|
|
|
|
2002-09-13 19:53:22 +04:00
|
|
|
done:
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_IRET,
|
2002-09-13 19:53:22 +04:00
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
|
|
|
|
}
|
2002-09-27 11:01:02 +04:00
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
BX_CPU_C::JCXZ64_Jb(bxInstruction_c *i)
|
|
|
|
{
|
|
|
|
if (i->as64L()) {
|
|
|
|
if ( RCX == 0 ) {
|
|
|
|
RIP += (Bit32s) i->Id();
|
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
if ( ECX == 0 ) {
|
|
|
|
RIP += (Bit32s) i->Id();
|
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
BX_CPU_C::LOOPNE64_Jb(bxInstruction_c *i)
|
|
|
|
{
|
|
|
|
if (i->as64L()) {
|
|
|
|
|
|
|
|
if ( ((--RCX)!=0) && (get_ZF()==0) ) {
|
|
|
|
RIP += (Bit32s) i->Id();
|
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
if ( ((--ECX)!=0) && (get_ZF()==0) ) {
|
|
|
|
RIP += (Bit32s) i->Id();
|
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
BX_CPU_C::LOOPE64_Jb(bxInstruction_c *i)
|
|
|
|
{
|
|
|
|
if (i->as64L()) {
|
|
|
|
|
|
|
|
if ( ((--RCX)!=0) && (get_ZF()) ) {
|
|
|
|
RIP += (Bit32s) i->Id();
|
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
if ( ((--ECX)!=0) && get_ZF()) {
|
|
|
|
RIP += (Bit32s) i->Id();
|
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
BX_CPU_C::LOOP64_Jb(bxInstruction_c *i)
|
|
|
|
{
|
|
|
|
if (i->as64L()) {
|
|
|
|
|
|
|
|
if ((--RCX) != 0) {
|
|
|
|
RIP += (Bit32s) i->Id();
|
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
if ((--ECX) != 0) {
|
|
|
|
RIP += (Bit32s) i->Id();
|
|
|
|
if (i->os32L()==0)
|
|
|
|
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
revalidate_prefetch_q();
|
|
|
|
}
|
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
2002-11-19 08:47:45 +03:00
|
|
|
#endif /* if BX_SUPPORT_X86_64 */
|