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Bochs/bochs/cpu/ctrl_xfer64.cc

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Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/////////////////////////////////////////////////////////////////////////
Got rid of the KPL64Hacks macro. The fixes below eliminated it. Created 64-bit versions of some branch instructions and changed fetchdecode64.cc to use them instead. This keeps the #ifdef pollution down for 32-bit code and made fixing them easier. They needed to clear the upper bits of RIP for 16-bit operand sizes. They also should not have had a protection limit check in them, especially since that field is still 32-bit in cpu.h, so there's no way to set nominal 64-bit values. The 32-bit versions were also not honoring the upper 32-bits of RIP. LOOPNE64_Jb LOOPE64_Jb LOOP64_Jb JCXZ64_Jb Changed all occurances of JCC_Jw/JCC_Jd in fetchdecode64.cc to use JCC_Jq, which was coded already. Both JMP_Jq and JCC_Jq are now fixed w.r.t. 16-bit opsizes and upper RIP bit clearing.
2002-09-27 11:01:02 +04:00
// $Id: ctrl_xfer64.cc,v 1.14 2002-09-27 07:01:02 kevinlawton Exp $
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
//
// MandrakeSoft S.A.
// 43, rue d'Aboukir
// 75002 Paris - France
// http://www.linux-mandrake.com/
// http://www.mandrakesoft.com/
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#define LOG_THIS BX_CPU_THIS_PTR
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::RETnear64_Iw(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit16u imm16;
Bit64u temp_RSP;
Bit64u return_RIP;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_ret;
#endif
temp_RSP = RSP;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
imm16 = i->Iw();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
//if ( !can_pop(8) ) {
// BX_PANIC(("retnear_iw: can't pop RIP"));
// /* ??? #SS(0) -or #GP(0) */
// }
access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_RSP + 0,
8, CPL==3, BX_READ, &return_RIP);
/* Pentium book says imm16 is number of words ??? */
//if ( !can_pop(8 + imm16) ) {
// BX_PANIC(("retnear_iw: can't release bytes from stack"));
// /* #GP(0) -or #SS(0) ??? */
// }
RIP = return_RIP;
RSP += 8 + imm16; /* ??? should it be 2*imm16 ? */
BX_INSTR_UCNEAR_BRANCH(BX_INSTR_IS_RET, BX_CPU_THIS_PTR rip);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::RETnear64(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u temp_RSP;
Bit64u return_RIP;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_ret;
#endif
temp_RSP = RSP;
//if ( !can_pop(8) ) {
// BX_PANIC(("retnear: can't pop RIP"));
// /* ??? #SS(0) -or #GP(0) */
// }
access_linear(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.base + temp_RSP + 0,
8, CPL==3, BX_READ, &return_RIP);
RIP = return_RIP;
RSP += 8;
BX_INSTR_UCNEAR_BRANCH(BX_INSTR_IS_RET, BX_CPU_THIS_PTR rip);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::RETfar64_Iw(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u rip, rcs_raw;
Bit16s imm16;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_ret;
#endif
/* ??? is imm16, number of bytes/words depending on operandsize ? */
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
imm16 = i->Iw();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_CPU_LEVEL >= 2
if (protected_mode()) {
BX_CPU_THIS_PTR return_protected(i, imm16);
goto done;
}
#endif
pop_64(&rip);
pop_64(&rcs_raw);
RIP = rip;
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) rcs_raw);
RSP += imm16;
done:
BX_INSTR_FAR_BRANCH(BX_INSTR_IS_RET,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::RETfar64(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u rip, rcs_raw;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_ret;
#endif
#if BX_CPU_LEVEL >= 2
if ( protected_mode() ) {
BX_CPU_THIS_PTR return_protected(i, 0);
goto done;
}
#endif
pop_64(&rip);
pop_64(&rcs_raw); /* 64bit pop, upper 48 bits discarded */
RIP = rip;
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], (Bit16u) rcs_raw);
done:
BX_INSTR_FAR_BRANCH(BX_INSTR_IS_RET,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::CALL_Aq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u new_RIP;
Bit32s disp32;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_call;
#endif
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
disp32 = i->Id();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
new_RIP = RIP + disp32;
/* push 64 bit EA of next instruction */
push_64(BX_CPU_THIS_PTR rip);
RIP = new_RIP;
BX_INSTR_UCNEAR_BRANCH(BX_INSTR_IS_CALL, BX_CPU_THIS_PTR rip);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::CALL64_Ap(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit16u cs_raw;
Bit32u disp32;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_call;
#endif
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
disp32 = i->Id();
cs_raw = i->Iw2();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
if (protected_mode()) {
BX_CPU_THIS_PTR call_protected(i, cs_raw, disp32);
goto done;
}
push_64(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_64(BX_CPU_THIS_PTR rip);
RIP = disp32;
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
done:
BX_INSTR_FAR_BRANCH(BX_INSTR_IS_CALL,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::CALL_Eq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u temp_RSP;
Bit64u op1_64;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_call;
#endif
temp_RSP = RSP;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
push_64(BX_CPU_THIS_PTR rip);
RIP = op1_64;
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
BX_INSTR_UCNEAR_BRANCH(BX_INSTR_IS_CALL, BX_CPU_THIS_PTR rip);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::CALL64_Ep(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit16u cs_raw;
Bit64u op1_64;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_call;
#endif
/* op1_64 is a register or memory reference */
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
BX_PANIC(("CALL_Ep: op1 is a register"));
}
/* pointer, segment address pair */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
read_virtual_word(i->seg(), RMAddr(i)+8, &cs_raw);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
if ( protected_mode() ) {
BX_CPU_THIS_PTR call_protected(i, cs_raw, op1_64);
goto done;
}
push_64(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_64(BX_CPU_THIS_PTR rip);
RIP = op1_64;
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
done:
BX_INSTR_FAR_BRANCH(BX_INSTR_IS_CALL,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::JMP_Jq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u new_RIP;
invalidate_prefetch_q();
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
RIP += (Bit32s) i->Id();
Got rid of the KPL64Hacks macro. The fixes below eliminated it. Created 64-bit versions of some branch instructions and changed fetchdecode64.cc to use them instead. This keeps the #ifdef pollution down for 32-bit code and made fixing them easier. They needed to clear the upper bits of RIP for 16-bit operand sizes. They also should not have had a protection limit check in them, especially since that field is still 32-bit in cpu.h, so there's no way to set nominal 64-bit values. The 32-bit versions were also not honoring the upper 32-bits of RIP. LOOPNE64_Jb LOOPE64_Jb LOOP64_Jb JCXZ64_Jb Changed all occurances of JCC_Jw/JCC_Jd in fetchdecode64.cc to use JCC_Jq, which was coded already. Both JMP_Jq and JCC_Jq are now fixed w.r.t. 16-bit opsizes and upper RIP bit clearing.
2002-09-27 11:01:02 +04:00
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
BX_INSTR_UCNEAR_BRANCH(BX_INSTR_IS_JMP, new_RIP);
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::JCC_Jq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Split out JZ/JNZ instructions from JCC because they were called so frequently. Coded asm() statements for INC/DEC_ERX() instructions. Cleaned up the iCache a litle including a bug fix. The generation ID was decrementing the whole field including some high meta bits. That could roll over after 1 Billion cycles. I know only decrement if the field is valid, to save the write. I implemented inline functions which can serve the value of the arithmetic flags if they are cached, and redirect to the lazy_flags.cc routines if not. Most of this was just prep work for adding more asm() statements for native eflags processing when on x86.
2002-09-22 05:52:21 +04:00
Boolean condition;
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
Converted all the remaining available separate fields in bxInstruction_c to bitfields. bxInstruction_c is now 24 bytes, including 4 for the memory addr resolution function pointer, and 4 for the execution function pointer (16 + 4 + 4). Coded more accessors, to abstract access from most code.
2002-09-18 12:00:43 +04:00
switch (i->b1() & 0x0f) {
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
case 0x00: /* JO */ condition = get_OF(); break;
case 0x01: /* JNO */ condition = !get_OF(); break;
case 0x02: /* JB */ condition = get_CF(); break;
case 0x03: /* JNB */ condition = !get_CF(); break;
case 0x04: /* JZ */ condition = get_ZF(); break;
case 0x05: /* JNZ */ condition = !get_ZF(); break;
case 0x06: /* JBE */ condition = get_CF() || get_ZF(); break;
case 0x07: /* JNBE */ condition = !get_CF() && !get_ZF(); break;
case 0x08: /* JS */ condition = get_SF(); break;
case 0x09: /* JNS */ condition = !get_SF(); break;
case 0x0A: /* JP */ condition = get_PF(); break;
case 0x0B: /* JNP */ condition = !get_PF(); break;
Changed eflags accessors for get_?F() to use (val32 & (1<<N)) instead of (1 & (val32>>N)), and added a getB_?F() accessor for special cases which need a strict binary value (exactly 0 or 1). Most code only needed a value for logical comparison. I modified the special cases which do need a binary number for shifting and comparison between flags, to use the special getB_?F() accessor. Cleaned up memory.cc functions a little, now that all accesses are within a single page. Fixed a (not very likely encountered) bug in fetchdecode.cc (and fetchdecode64.cc) where a 2-byte opcode starting with a prefix starts at the last offset on a page. There were no checks on the segment overrides for a boundary condition. I added them. The eflags enhancements added just a tiny bit of performance.
2002-09-22 22:22:24 +04:00
case 0x0C: /* JL */ condition = getB_SF() != getB_OF(); break;
case 0x0D: /* JNL */ condition = getB_SF() == getB_OF(); break;
case 0x0E: /* JLE */ condition = get_ZF() || (getB_SF() != getB_OF());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
break;
Changed eflags accessors for get_?F() to use (val32 & (1<<N)) instead of (1 & (val32>>N)), and added a getB_?F() accessor for special cases which need a strict binary value (exactly 0 or 1). Most code only needed a value for logical comparison. I modified the special cases which do need a binary number for shifting and comparison between flags, to use the special getB_?F() accessor. Cleaned up memory.cc functions a little, now that all accesses are within a single page. Fixed a (not very likely encountered) bug in fetchdecode.cc (and fetchdecode64.cc) where a 2-byte opcode starting with a prefix starts at the last offset on a page. There were no checks on the segment overrides for a boundary condition. I added them. The eflags enhancements added just a tiny bit of performance.
2002-09-22 22:22:24 +04:00
case 0x0F: /* JNLE */ condition = (getB_SF() == getB_OF()) &&
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
!get_ZF();
break;
Split out JZ/JNZ instructions from JCC because they were called so frequently. Coded asm() statements for INC/DEC_ERX() instructions. Cleaned up the iCache a litle including a bug fix. The generation ID was decrementing the whole field including some high meta bits. That could roll over after 1 Billion cycles. I know only decrement if the field is valid, to save the write. I implemented inline functions which can serve the value of the arithmetic flags if they are cached, and redirect to the lazy_flags.cc routines if not. Most of this was just prep work for adding more asm() statements for native eflags processing when on x86.
2002-09-22 05:52:21 +04:00
default:
condition = 0; // For compiler...all targets should set condition.
break;
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
if (condition) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
RIP += (Bit32s) i->Id();
Got rid of the KPL64Hacks macro. The fixes below eliminated it. Created 64-bit versions of some branch instructions and changed fetchdecode64.cc to use them instead. This keeps the #ifdef pollution down for 32-bit code and made fixing them easier. They needed to clear the upper bits of RIP for 16-bit operand sizes. They also should not have had a protection limit check in them, especially since that field is still 32-bit in cpu.h, so there's no way to set nominal 64-bit values. The 32-bit versions were also not honoring the upper 32-bits of RIP. LOOPNE64_Jb LOOPE64_Jb LOOP64_Jb JCXZ64_Jb Changed all occurances of JCC_Jw/JCC_Jd in fetchdecode64.cc to use JCC_Jq, which was coded already. Both JMP_Jq and JCC_Jq are now fixed w.r.t. 16-bit opsizes and upper RIP bit clearing.
2002-09-27 11:01:02 +04:00
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
BX_INSTR_CNEAR_BRANCH_TAKEN(RIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
#ifdef ignore
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::JMP64_Ap(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u disp64;
Bit16u cs_raw;
invalidate_prefetch_q();
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (i->os32L()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
disp64 = (Bit32s) i->Id();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
disp64 = (Bit16s) i->Iw();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
cs_raw = i->Iw2();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_CPU_LEVEL >= 2
if (protected_mode()) {
BX_CPU_THIS_PTR jump_protected(i, cs_raw, disp32);
goto done;
}
#endif
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
RIP = disp64;
done:
BX_INSTR_FAR_BRANCH(BX_INSTR_IS_JMP,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
}
#endif
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::JMP_Eq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u new_RIP;
Bit64u op1_64;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op1_64 = BX_READ_64BIT_REG(i->rm());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
RIP = op1_64;
BX_INSTR_UCNEAR_BRANCH(BX_INSTR_IS_JMP, new_RIP);
}
/* Far indirect jump */
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::JMP64_Ep(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit16u cs_raw;
Bit64u op1_64;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
BX_PANIC(("JMP_Ep(): op1 is a register"));
}
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
read_virtual_word(i->seg(), RMAddr(i)+8, &cs_raw);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
if ( protected_mode() ) {
BX_CPU_THIS_PTR jump_protected(i, cs_raw, op1_64);
goto done;
}
RIP = op1_64;
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS], cs_raw);
done:
BX_INSTR_FAR_BRANCH(BX_INSTR_IS_JMP,
Removed references to building libextdb.a. It doesn't seem to be used at all, and Peter didn't want it. "extdb.o" is compiled into libcpu.a, if configured for it. Removed a few #warnings for x86-64 compile, based on Peter's line-item comments regarding the warnings I inserted during the port/merge.
2002-09-15 19:10:21 +04:00
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::IRET64(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit32u rip, ecs_raw, eflags;
I integrated my hacks to get Linux/x86-64 booting. To keep these from interfering from a normal compile here's what I did. In config.h.in (which will generate config.h after a configure), I added a #define called KPL64Hacks: #define KPL64Hacks *After* running configure, you must set this by hand. It will default to off, so you won't get my hacks in a normal compile. This will go away soon. There is also a macro just after that called BailBigRSP(). You don't need to enabled that, but you can. In many of the instructions which seemed like they could be hit by the fetchdecode64() process, but which also touched EIP/ESP, I inserted a macro. Usually this macro expands to nothing. If you like, you can enabled it, and it will panic if it finds the upper bits of RIP/RSP set. This helped me find bugs. Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc. There were some really old legacy code snippets which directly accessed operands on the stack with access_linear. Lots of ugly code instead of just pop_32() etc. Cleaning those up, minimized the number of instructions which directly manipulate the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
invalidate_prefetch_q();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#if BX_DEBUGGER
BX_CPU_THIS_PTR show_flag |= Flag_iret;
BX_CPU_THIS_PTR show_eip = BX_CPU_THIS_PTR rip;
#endif
#if BX_CPU_LEVEL >= 2
if (BX_CPU_THIS_PTR cr0.pe) {
iret_protected(i);
goto done;
}
#endif
- clean up ^M pollution from working in cygwin
2002-09-16 21:00:16 +04:00
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
done:
BX_INSTR_FAR_BRANCH(BX_INSTR_IS_IRET,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, BX_CPU_THIS_PTR rip);
}
Got rid of the KPL64Hacks macro. The fixes below eliminated it. Created 64-bit versions of some branch instructions and changed fetchdecode64.cc to use them instead. This keeps the #ifdef pollution down for 32-bit code and made fixing them easier. They needed to clear the upper bits of RIP for 16-bit operand sizes. They also should not have had a protection limit check in them, especially since that field is still 32-bit in cpu.h, so there's no way to set nominal 64-bit values. The 32-bit versions were also not honoring the upper 32-bits of RIP. LOOPNE64_Jb LOOPE64_Jb LOOP64_Jb JCXZ64_Jb Changed all occurances of JCC_Jw/JCC_Jd in fetchdecode64.cc to use JCC_Jq, which was coded already. Both JMP_Jq and JCC_Jq are now fixed w.r.t. 16-bit opsizes and upper RIP bit clearing.
2002-09-27 11:01:02 +04:00
void
BX_CPU_C::JCXZ64_Jb(bxInstruction_c *i)
{
if (i->as64L()) {
if ( RCX == 0 ) {
RIP += (Bit32s) i->Id();
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
BX_INSTR_CNEAR_BRANCH_TAKEN(new_RIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
else {
if ( ECX == 0 ) {
RIP += (Bit32s) i->Id();
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
BX_INSTR_CNEAR_BRANCH_TAKEN(new_EIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
}
void
BX_CPU_C::LOOPNE64_Jb(bxInstruction_c *i)
{
if (i->as64L()) {
if ( ((--RCX)!=0) && (get_ZF()==0) ) {
RIP += (Bit32s) i->Id();
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
BX_INSTR_CNEAR_BRANCH_TAKEN(RIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
else {
if ( ((--ECX)!=0) && (get_ZF()==0) ) {
RIP += (Bit32s) i->Id();
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
BX_INSTR_CNEAR_BRANCH_TAKEN(new_EIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
}
void
BX_CPU_C::LOOPE64_Jb(bxInstruction_c *i)
{
if (i->as64L()) {
if ( ((--RCX)!=0) && (get_ZF()) ) {
RIP += (Bit32s) i->Id();
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
BX_INSTR_CNEAR_BRANCH_TAKEN(RIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
else {
if ( ((--ECX)!=0) && get_ZF()) {
RIP += (Bit32s) i->Id();
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
BX_INSTR_CNEAR_BRANCH_TAKEN(new_EIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
}
void
BX_CPU_C::LOOP64_Jb(bxInstruction_c *i)
{
if (i->as64L()) {
if ((--RCX) != 0) {
RIP += (Bit32s) i->Id();
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
BX_INSTR_CNEAR_BRANCH_TAKEN(RIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
else {
if ((--ECX) != 0) {
RIP += (Bit32s) i->Id();
if (i->os32L()==0)
RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
BX_INSTR_CNEAR_BRANCH_TAKEN(new_EIP);
revalidate_prefetch_q();
}
#if BX_INSTRUMENTATION
else {
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
}
#endif
}
}
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