mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
a0c1fd60e6
Bochs/bochs/cpu/data_xfer64.cc

473 lines
10 KiB
C++
Raw Normal View History

Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/////////////////////////////////////////////////////////////////////////
Just little cleanup of macro duplicating an existing code
2002-10-25 21:23:34 +04:00
// $Id: data_xfer64.cc,v 1.11 2002-10-25 17:23:33 sshwarts Exp $
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
//
// MandrakeSoft S.A.
// 43, rue d'Aboukir
// 75002 Paris - France
// http://www.linux-mandrake.com/
// http://www.mandrakesoft.com/
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#define LOG_THIS BX_CPU_THIS_PTR
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::XCHG_RRXRAX(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u temp64;
temp64 = RAX;
Modified the way that the register field (low 3 bits of a few opcodes also extended by the REX.B field on Hammer) is passed to instructions. I rearranged the bxInstruction_c to free up a field to be used to pass this info when mod-rm bytes are not used. This got rid of the ugly ((i->b1 & 7) + i->rex_b) code. Probably shaved just a very little run time off Hammer emulation, and even less on x86-32. The resultant is a little cleaner anyways.
2002-09-21 03:17:51 +04:00
RAX = BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].rrx;
BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].rrx = temp64;
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_RRXIq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Modified the way that the register field (low 3 bits of a few opcodes also extended by the REX.B field on Hammer) is passed to instructions. I rearranged the bxInstruction_c to free up a field to be used to pass this info when mod-rm bytes are not used. This got rid of the ugly ((i->b1 & 7) + i->rex_b) code. Probably shaved just a very little run time off Hammer emulation, and even less on x86-32. The resultant is a little cleaner anyways.
2002-09-21 03:17:51 +04:00
BX_CPU_THIS_PTR gen_reg[i->opcodeReg()].rrx = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_EqGq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u op2_64;
/* op2_64 is a register, op2_addr is an index of a register */
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2_64 = BX_READ_64BIT_REG(i->nnn());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* op1_64 is a register or memory reference */
/* now write op2 to op1 */
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->rm(), op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
write_virtual_qword(i->seg(), RMAddr(i), &op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_GqEq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u op2_64;
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
//BX_DEBUG (("MOV_GqEq mod=%02x nnn=%d rm=%d rm_addr=%08x seg=%d",i->mod(),i->nnn(),i->rm(),RMAddr(i),i->seg()));
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2_64 = BX_READ_64BIT_REG(i->rm());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
/* pointer, segment address pair */
//BX_DEBUG (("call read_virtual_qword"));
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
//BX_DEBUG (("done read_virtual_qword"));
}
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->nnn(), op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::LEA_GqM(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
BX_PANIC(("LEA_GvM: op2 is a register"));
UndefinedOpcode(i);
return;
}
/* write effective address of op2 in op1 */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
BX_WRITE_64BIT_REG(i->nnn(), RMAddr(i));
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_ALOq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit8u temp_8;
bx_address addr;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
addr = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* read from memory address */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_byte(i->seg(), addr, &temp_8);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
read_virtual_byte(BX_SEG_REG_DS, addr, &temp_8);
}
/* write to register */
RAX = temp_8;
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_OqAL(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit8u temp_8;
bx_address addr;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
addr = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* read from register */
temp_8 = AL;
/* write to memory address */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (!BX_NULL_SEG_REG(i->seg())) {
write_virtual_byte(i->seg(), addr, &temp_8);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
write_virtual_byte(BX_SEG_REG_DS, addr, &temp_8);
}
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_AXOq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit16u temp_16;
bx_address addr;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
addr = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* read from memory address */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_word(i->seg(), addr, &temp_16);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
read_virtual_word(BX_SEG_REG_DS, addr, &temp_16);
}
/* write to register */
AX = temp_16;
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_OqAX(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit16u temp_16;
bx_address addr;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
addr = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* read from register */
temp_16 = AX;
/* write to memory address */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (!BX_NULL_SEG_REG(i->seg())) {
write_virtual_word(i->seg(), addr, &temp_16);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
write_virtual_word(BX_SEG_REG_DS, addr, &temp_16);
}
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_EAXOq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit32u temp_32;
bx_address addr;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
addr = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* read from memory address */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_dword(i->seg(), addr, &temp_32);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
read_virtual_dword(BX_SEG_REG_DS, addr, &temp_32);
}
/* write to register */
RAX = temp_32;
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_OqEAX(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit32u temp_32;
bx_address addr;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
addr = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* read from register */
temp_32 = EAX;
/* write to memory address */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (!BX_NULL_SEG_REG(i->seg())) {
write_virtual_dword(i->seg(), addr, &temp_32);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
write_virtual_dword(BX_SEG_REG_DS, addr, &temp_32);
}
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_RAXOq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u temp_64;
bx_address addr;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
addr = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* read from memory address */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_qword(i->seg(), addr, &temp_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
read_virtual_qword(BX_SEG_REG_DS, addr, &temp_64);
}
/* write to register */
RAX = temp_64;
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_OqRAX(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u temp_64;
bx_address addr;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
addr = i->Iq();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* read from register */
temp_64 = RAX;
/* write to memory address */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
if (!BX_NULL_SEG_REG(i->seg())) {
write_virtual_qword(i->seg(), addr, &temp_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
write_virtual_qword(BX_SEG_REG_DS, addr, &temp_64);
}
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOV_EqId(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u op2_64;
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2_64 = (Bit32s) i->Id();
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* now write sum back to destination */
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->rm(), op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
write_virtual_qword(i->seg(), RMAddr(i), &op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOVZX_GqEb(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
#if BX_CPU_LEVEL < 3
BX_PANIC(("MOVZX_GvEb: not supported on < 386"));
#else
Bit8u op2_8;
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
/* pointer, segment address pair */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
/* zero extend byte op2 into qword op1 */
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->nnn(), (Bit64u) op2_8);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#endif /* BX_CPU_LEVEL < 3 */
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOVZX_GqEw(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
#if BX_CPU_LEVEL < 3
BX_PANIC(("MOVZX_GvEw: not supported on < 386"));
#else
Bit16u op2_16;
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2_16 = BX_READ_16BIT_REG(i->rm());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
/* pointer, segment address pair */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
/* zero extend word op2 into qword op1 */
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->nnn(), (Bit64u) op2_16);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#endif /* BX_CPU_LEVEL < 3 */
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOVSX_GqEb(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
#if BX_CPU_LEVEL < 3
BX_PANIC(("MOVSX_GvEb: not supported on < 386"));
#else
Bit8u op2_8;
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
op2_8 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
/* pointer, segment address pair */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
/* sign extend byte op2 into qword op1 */
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->nnn(), (Bit8s) op2_8);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#endif /* BX_CPU_LEVEL < 3 */
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOVSX_GqEw(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
#if BX_CPU_LEVEL < 3
BX_PANIC(("MOVSX_GvEw: not supported on < 386"));
#else
Bit16u op2_16;
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2_16 = BX_READ_16BIT_REG(i->rm());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
/* pointer, segment address pair */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
/* sign extend word op2 into qword op1 */
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->nnn(), (Bit16s) op2_16);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#endif /* BX_CPU_LEVEL < 3 */
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::MOVSX_GqEd(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
#if BX_CPU_LEVEL < 3
BX_PANIC(("MOVSX_GvEw: not supported on < 386"));
#else
Bit32u op2_32;
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2_32 = BX_READ_32BIT_REG(i->rm());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
/* pointer, segment address pair */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
/* sign extend word op2 into qword op1 */
from Peter Tattam: in MOVSX_GqEd, typecast op2 to Bit32s instead of Bit16s
2002-09-22 19:42:09 +04:00
BX_WRITE_64BIT_REG(i->nnn(), (Bit32s) op2_32);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
#endif /* BX_CPU_LEVEL < 3 */
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::XCHG_EqGq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
Bit64u op2_64, op1_64;
/* op2_64 is a register, op2_addr is an index of a register */
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2_64 = BX_READ_64BIT_REG(i->nnn());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
/* op1_64 is a register or memory reference */
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op1_64 = BX_READ_64BIT_REG(i->rm());
BX_WRITE_64BIT_REG(i->rm(), op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
/* pointer, segment address pair */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
Just little cleanup of macro duplicating an existing code
2002-10-25 21:23:34 +04:00
write_RMW_virtual_qword(op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
void
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_CPU_C::CMOV_GqEq(bxInstruction_c *i)
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
{
#if (BX_CPU_LEVEL >= 6) || (BX_CPU_LEVEL_HACKED >= 6)
// Note: CMOV accesses a memory source operand (read), regardless
// of whether condition is true or not. Thus, exceptions may
// occur even if the MOV does not take place.
- Apply patch.replace-Boolean rev 1.3. Every "Boolean" is now changed to a "bx_bool" which is always defined as Bit32u on all platforms. In Carbon specific code, Boolean is still used because the Carbon header files define it to unsigned char. - this fixes bug [ 623152 ] MacOSX: Triple Exception Booting win95. The bug was that some code in Bochs depends on Boolean to be a 32 bit value. (This should be fixed, but I don't know all the places where it needs to be fixed yet.) Because Carbon defined Boolean as an unsigned char, Bochs just followed along and used the unsigned char definition to avoid compile problems. This exposed the dependency on 32 bit Boolean on MacOS X only and led to major simulation problems, that could only be reproduced and debugged on that platform. - On the mailing list we debated whether to make all Booleans into "bool" or our own type. I chose bx_bool for several reasons. 1. Unlike C++'s bool, we can guarantee that bx_bool is the same size on all platforms, which makes it much less likely to have more platform-specific simulation differences in the future. (I spent hours on a borrowed MacOSX machine chasing bug 618388 before discovering that different sized Booleans were the problem, and I don't want to repeat that.) 2. We still have at least one dependency on 32 bit Booleans which must be fixed some time, but I don't want to risk introducing new bugs into the simulation just before the 2.0 release. Modified Files: bochs.h config.h.in gdbstub.cc logio.cc main.cc pc_system.cc pc_system.h plugin.cc plugin.h bios/rombios.c cpu/apic.cc cpu/arith16.cc cpu/arith32.cc cpu/arith64.cc cpu/arith8.cc cpu/cpu.cc cpu/cpu.h cpu/ctrl_xfer16.cc cpu/ctrl_xfer32.cc cpu/ctrl_xfer64.cc cpu/data_xfer16.cc cpu/data_xfer32.cc cpu/data_xfer64.cc cpu/debugstuff.cc cpu/exception.cc cpu/fetchdecode.cc cpu/flag_ctrl_pro.cc cpu/init.cc cpu/io_pro.cc cpu/lazy_flags.cc cpu/lazy_flags.h cpu/mult16.cc cpu/mult32.cc cpu/mult64.cc cpu/mult8.cc cpu/paging.cc cpu/proc_ctrl.cc cpu/segment_ctrl_pro.cc cpu/stack_pro.cc cpu/tasking.cc debug/dbg_main.cc debug/debug.h debug/sim2.cc disasm/dis_decode.cc disasm/disasm.h doc/docbook/Makefile docs-html/cosimulation.html fpu/wmFPUemu_glue.cc gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/gui.cc gui/gui.h gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc gui/rfb.cc gui/sdl.cc gui/siminterface.cc gui/siminterface.h gui/term.cc gui/win32.cc gui/wx.cc gui/wxmain.cc gui/wxmain.h gui/x.cc instrument/example0/instrument.cc instrument/example0/instrument.h instrument/example1/instrument.cc instrument/example1/instrument.h instrument/stubs/instrument.cc instrument/stubs/instrument.h iodev/cdrom.cc iodev/cdrom.h iodev/cdrom_osx.cc iodev/cmos.cc iodev/devices.cc iodev/dma.cc iodev/dma.h iodev/eth_arpback.cc iodev/eth_packetmaker.cc iodev/eth_packetmaker.h iodev/floppy.cc iodev/floppy.h iodev/guest2host.h iodev/harddrv.cc iodev/harddrv.h iodev/ioapic.cc iodev/ioapic.h iodev/iodebug.cc iodev/iodev.h iodev/keyboard.cc iodev/keyboard.h iodev/ne2k.h iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pic.h iodev/pit.cc iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h iodev/sb16.cc iodev/sb16.h iodev/serial.cc iodev/serial.h iodev/vga.cc iodev/vga.h memory/memory.h memory/misc_mem.cc
2002-10-25 15:44:41 +04:00
bx_bool condition;
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
Bit64u op2_64;
Converted all the remaining available separate fields in bxInstruction_c to bitfields. bxInstruction_c is now 24 bytes, including 4 for the memory addr resolution function pointer, and 4 for the execution function pointer (16 + 4 + 4). Coded more accessors, to abstract access from most code.
2002-09-18 12:00:43 +04:00
switch (i->b1()) {
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
// CMOV opcodes:
case 0x140: condition = get_OF(); break;
case 0x141: condition = !get_OF(); break;
case 0x142: condition = get_CF(); break;
case 0x143: condition = !get_CF(); break;
case 0x144: condition = get_ZF(); break;
case 0x145: condition = !get_ZF(); break;
case 0x146: condition = get_CF() || get_ZF(); break;
case 0x147: condition = !get_CF() && !get_ZF(); break;
case 0x148: condition = get_SF(); break;
case 0x149: condition = !get_SF(); break;
case 0x14A: condition = get_PF(); break;
case 0x14B: condition = !get_PF(); break;
Changed eflags accessors for get_?F() to use (val32 & (1<<N)) instead of (1 & (val32>>N)), and added a getB_?F() accessor for special cases which need a strict binary value (exactly 0 or 1). Most code only needed a value for logical comparison. I modified the special cases which do need a binary number for shifting and comparison between flags, to use the special getB_?F() accessor. Cleaned up memory.cc functions a little, now that all accesses are within a single page. Fixed a (not very likely encountered) bug in fetchdecode.cc (and fetchdecode64.cc) where a 2-byte opcode starting with a prefix starts at the last offset on a page. There were no checks on the segment overrides for a boundary condition. I added them. The eflags enhancements added just a tiny bit of performance.
2002-09-22 22:22:24 +04:00
case 0x14C: condition = getB_SF() != getB_OF(); break;
case 0x14D: condition = getB_SF() == getB_OF(); break;
case 0x14E: condition = get_ZF() || (getB_SF() != getB_OF()); break;
case 0x14F: condition = !get_ZF() && (getB_SF() == getB_OF()); break;
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
default:
condition = 0;
BX_PANIC(("CMOV_GdEd: default case"));
}
Moved the EFLAGS.RF check and clearing of inhibit_mask code in cpu.cc out of the main loop, and into the asynchronous events handling. I went through all the code paths, and there doesn't seem to be any reason for that code to be in the hot loop. Added another accessor for getting instruction data, called modC0(). A lot of instructions test whether the mod field of mod-nnn-rm is 0xc0 or not, ie., it's a register operation and not memory. So I flag this in fetchdecode{,64}.cc. This added on the order of 1% performance improvement for a Win95 boot. Macroized a few leftover calls to Write_RMV_virtual_xyz() that didn't get modified in the x86-64 merge. Really, they just call the real function for now, but I want to have them available to do direct writes with the guest2host TLB pointers.
2002-09-20 07:52:59 +04:00
if (i->modC0()) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
op2_64 = BX_READ_64BIT_REG(i->rm());
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
else {
/* pointer, segment address pair */
Moved more separate fields in the bxInstruction_c into bitfields with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
2002-09-18 09:36:48 +04:00
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
if (condition) {
Updated accessing of modrm/sib addressing information to use accessors. This lets me work on compressing the size of fetch-decode structure (now called bxInstruction_c). I've reduced it down to about 76 bytes. We should be able to do much better soon. I needed the abstraction of the accessors, so I have a lot of freedom to re-arrange things without making massive future changes. Lost a few percent of performance in these mods, but my main focus was to get the abstraction.
2002-09-18 02:50:53 +04:00
BX_WRITE_64BIT_REG(i->nnn(), op2_64);
Moved 64-bit only files from cpu64 to cpu and modified the Makefiles accordingly. These files cause no conflicts at all, since they are not used in 32-bit compiles.
2002-09-13 19:53:22 +04:00
}
#else
BX_PANIC(("cmov_gded called"));
#endif
}
Reference in New Issue Copy Permalink