2004-06-18 18:11:11 +04:00
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/////////////////////////////////////////////////////////////////////////
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2008-04-05 01:05:37 +04:00
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// $Id: fpu_arith.cc,v 1.13 2008-04-04 21:05:37 sshwarts Exp $
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2005-03-21 00:19:38 +03:00
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/////////////////////////////////////////////////////////////////////////
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2004-06-18 18:11:11 +04:00
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//
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2005-05-12 22:07:48 +04:00
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// Copyright (c) 2003 Stanislav Shwartsman
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2007-03-24 00:27:13 +03:00
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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2004-06-18 18:11:11 +04:00
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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2005-05-12 22:07:48 +04:00
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//
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2004-06-18 18:11:11 +04:00
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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2006-03-07 01:03:16 +03:00
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#include "cpu/cpu.h"
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2004-06-18 18:11:11 +04:00
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_FPU
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2008-04-05 01:05:37 +04:00
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2004-06-18 18:11:11 +04:00
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float_status_t FPU_pre_exception_handling(Bit16u control_word)
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{
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float_status_t status;
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int precision = control_word & FPU_CW_PC;
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2008-02-06 01:33:35 +03:00
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2004-06-18 18:11:11 +04:00
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switch(precision)
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{
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case FPU_PR_32_BITS:
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status.float_rounding_precision = 32;
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break;
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case FPU_PR_64_BITS:
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status.float_rounding_precision = 64;
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break;
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case FPU_PR_80_BITS:
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status.float_rounding_precision = 80;
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break;
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default:
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2008-02-06 01:33:35 +03:00
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/* With the precision control bits set to 01 "(reserved)", a
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real CPU behaves as if the precision control bits were
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2004-06-18 18:11:11 +04:00
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set to 11 "80 bits" */
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status.float_rounding_precision = 80;
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}
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status.float_exception_flags = 0; // clear exceptions before execution
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status.float_nan_handling_mode = float_first_operand_nan;
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status.float_rounding_mode = (control_word & FPU_CW_RC) >> 10;
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status.flush_underflow_to_zero = 0;
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return status;
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_ST0_STj(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = BX_READ_FPU_REG(i->rm());
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2008-02-06 01:33:35 +03:00
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float_status_t status =
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2004-06-18 18:11:11 +04:00
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_add(a, b, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FADD_ST0_STj: required FPU, configure --enable-fpu"));
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#endif
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_STi_ST0(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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int pop_stack = i->b1() & 2;
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
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return;
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}
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floatx80 a = BX_READ_FPU_REG(i->rm());
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floatx80 b = BX_READ_FPU_REG(0);
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2008-02-06 01:33:35 +03:00
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float_status_t status =
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2004-06-18 18:11:11 +04:00
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_add(a, b, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, i->rm());
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2008-02-06 01:33:35 +03:00
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if (pop_stack)
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2004-06-18 18:11:11 +04:00
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FADD(P)_STi_ST0: required FPU, configure --enable-fpu"));
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#endif
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_SINGLE_REAL(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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2007-12-20 23:58:38 +03:00
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float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
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2004-06-18 18:11:11 +04:00
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2008-02-06 01:33:35 +03:00
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float_status_t status =
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2004-06-18 18:11:11 +04:00
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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2008-02-06 01:33:35 +03:00
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floatx80 result = floatx80_add(BX_READ_FPU_REG(0),
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2004-06-18 18:11:11 +04:00
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float32_to_floatx80(load_reg, status), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FADD_SINGLE_REAL: required FPU, configure --enable-fpu"));
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#endif
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_DOUBLE_REAL(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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2007-12-20 23:58:38 +03:00
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float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
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2004-06-18 18:11:11 +04:00
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2008-02-06 01:33:35 +03:00
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float_status_t status =
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2004-06-18 18:11:11 +04:00
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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2008-02-06 01:33:35 +03:00
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floatx80 result = floatx80_add(BX_READ_FPU_REG(0),
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2004-06-18 18:11:11 +04:00
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float64_to_floatx80(load_reg, status), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FADD_DOUBLE_REAL: required FPU, configure --enable-fpu"));
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#endif
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIADD_WORD_INTEGER(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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2007-12-20 23:58:38 +03:00
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Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
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2004-06-18 18:11:11 +04:00
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
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2008-02-06 01:33:35 +03:00
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float_status_t status =
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2004-06-18 18:11:11 +04:00
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_add(a, b, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FIADD_WORD_INTEGER: required FPU, configure --enable-fpu"));
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#endif
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIADD_DWORD_INTEGER(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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2007-12-20 23:58:38 +03:00
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Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
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2004-06-18 18:11:11 +04:00
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = int32_to_floatx80(load_reg);
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2008-02-06 01:33:35 +03:00
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float_status_t status =
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2004-06-18 18:11:11 +04:00
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_add(a, b, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FIADD_DWORD_INTEGER: required FPU, configure --enable-fpu"));
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#endif
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_ST0_STj(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = BX_READ_FPU_REG(i->rm());
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2008-02-06 01:33:35 +03:00
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float_status_t status =
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2004-06-18 18:11:11 +04:00
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_mul(a, b, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FMUL_ST0_STj: required FPU, configure --enable-fpu"));
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#endif
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_STi_ST0(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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int pop_stack = i->b1() & 2;
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
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return;
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}
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floatx80 a = BX_READ_FPU_REG(i->rm());
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floatx80 b = BX_READ_FPU_REG(0);
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2008-02-06 01:33:35 +03:00
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float_status_t status =
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2004-06-18 18:11:11 +04:00
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_mul(a, b, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, i->rm());
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2008-02-06 01:33:35 +03:00
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if (pop_stack)
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2004-06-18 18:11:11 +04:00
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FMUL(P)_STi_ST0: required FPU, configure --enable-fpu"));
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#endif
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}
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2008-03-23 00:29:41 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_SINGLE_REAL(bxInstruction_c *i)
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2004-06-18 18:11:11 +04:00
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{
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#if BX_SUPPORT_FPU
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|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_mul(BX_READ_FPU_REG(0),
|
2004-06-18 18:11:11 +04:00
|
|
|
float32_to_floatx80(load_reg, status), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FMUL_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_DOUBLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_mul(BX_READ_FPU_REG(0),
|
2004-06-18 18:11:11 +04:00
|
|
|
float64_to_floatx80(load_reg, status), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FMUL_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIMUL_WORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_mul(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FIMUL_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIMUL_DWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = int32_to_floatx80(load_reg);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_mul(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FIMUL_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_ST0_STj(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSUB_ST0_STj: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_ST0_STj(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(i->rm());
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSUBR_ST0_STj: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_STi_ST0(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
int pop_stack = i->b1() & 2;
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(i->rm());
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, i->rm());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
if (pop_stack)
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSUB(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_STi_ST0(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
int pop_stack = i->b1() & 2;
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, i->rm());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
if (pop_stack)
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSUBR(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_SINGLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
2004-06-18 18:11:11 +04:00
|
|
|
float32_to_floatx80(load_reg, status), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSUB_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_SINGLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_sub(float32_to_floatx80(load_reg, status),
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_READ_FPU_REG(0), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSUBR_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_DOUBLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
2004-06-18 18:11:11 +04:00
|
|
|
float64_to_floatx80(load_reg, status), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSUB_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_DOUBLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_sub(float64_to_floatx80(load_reg, status),
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_READ_FPU_REG(0), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSUBR_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUB_WORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FISUB_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUBR_WORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = int32_to_floatx80((Bit32s)(load_reg));
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FISUBR_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUB_DWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = int32_to_floatx80(load_reg);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0),
|
2004-06-18 18:11:11 +04:00
|
|
|
int32_to_floatx80(load_reg), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FISUB_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUBR_DWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = int32_to_floatx80(load_reg);
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FISUBR_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_ST0_STj(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FDIV_ST0_STj: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_ST0_STj(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(i->rm());
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FDIVR_ST0_STj: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_STi_ST0(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
int pop_stack = i->b1() & 2;
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(i->rm());
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, i->rm());
|
2008-02-06 01:33:35 +03:00
|
|
|
if (pop_stack)
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FDIV(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_STi_ST0(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
int pop_stack = i->b1() & 2;
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = BX_READ_FPU_REG(i->rm());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, i->rm());
|
2008-02-06 01:33:35 +03:00
|
|
|
if (pop_stack)
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FDIVR(P)_STi_ST0: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_SINGLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_div(BX_READ_FPU_REG(0),
|
2004-06-18 18:11:11 +04:00
|
|
|
float32_to_floatx80(load_reg, status), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FDIV_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_SINGLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_div(float32_to_floatx80(load_reg, status),
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_READ_FPU_REG(0), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FDIVR_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_DOUBLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_div(BX_READ_FPU_REG(0),
|
2004-06-18 18:11:11 +04:00
|
|
|
float64_to_floatx80(load_reg, status), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FDIV_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_DOUBLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
floatx80 result = floatx80_div(float64_to_floatx80(load_reg, status),
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_READ_FPU_REG(0), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FDIVR_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIV_WORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FIDIV_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIVR_WORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = int32_to_floatx80((Bit32s)(load_reg));
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FIDIVR_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIV_DWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
|
|
floatx80 b = int32_to_floatx80(load_reg);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FIDIV_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIVR_DWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-12-20 23:58:38 +03:00
|
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 a = int32_to_floatx80(load_reg);
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FIDIVR_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSQRT(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_sqrt(BX_READ_FPU_REG(0), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSQRT: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* D9 FC */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FRNDINT(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
|
|
BX_CPU_THIS_PTR FPU_stack_underflow(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
floatx80 result = floatx80_round_to_int(BX_READ_FPU_REG(0), status);
|
|
|
|
|
|
|
|
if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
|
|
|
|
return;
|
|
|
|
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FRNDINT: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
2008-04-05 01:05:37 +04:00
|
|
|
|
|
|
|
#endif
|