2003-05-15 20:41:17 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2002 Stanislav Shwartsman
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// Written by Stanislav Shwartsman <gate@fidonet.org.il>
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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//
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2002-09-09 20:11:25 +04:00
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#ifndef BX_I387_RELATED_EXTENSIONS_H
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#define BX_I387_RELATED_EXTENSIONS_H
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2003-04-13 01:02:08 +04:00
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#if BX_SUPPORT_FPU
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//
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// Minimal i387 structure
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//
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2003-10-04 15:04:10 +04:00
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struct i387_t
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{
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2003-12-30 00:47:36 +03:00
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Bit32u cwd; // control word
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Bit32u swd; // status word
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Bit32u twd; // tag word
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Bit32u fip;
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Bit32u fcs;
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Bit32u foo;
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Bit32u fos;
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2003-10-04 15:04:10 +04:00
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2003-04-13 01:02:08 +04:00
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unsigned char tos;
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unsigned char no_update;
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unsigned char rm;
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2003-04-16 22:38:53 +04:00
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unsigned align8;
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2003-10-04 15:04:10 +04:00
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Bit64u st_space[16]; // 8*16 bytes per FP-reg (aligned) = 128 bytes
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2003-04-13 01:02:08 +04:00
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};
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// Endian Host byte order Guest (x86) byte order
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// ======================================================
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// Little FFFFFFFFEEAAAAAA FFFFFFFFEEAAAAAA
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// Big AAAAAAEEFFFFFFFF FFFFFFFFEEAAAAAA
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//
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// Legend: F - fraction/mmx
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// E - exponent
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2003-04-16 22:38:53 +04:00
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// A - alignment
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2002-09-09 20:11:25 +04:00
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2003-01-23 20:53:11 +03:00
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#ifdef BX_BIG_ENDIAN
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2003-08-01 13:32:33 +04:00
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struct bx_fpu_reg_t {
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2003-04-16 22:38:53 +04:00
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Bit16u alignment1, alignment2, alignment3;
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2003-04-13 01:02:08 +04:00
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Bit16s exp; /* Signed quantity used in internal arithmetic. */
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Bit32u sigh;
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Bit32u sigl;
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2003-01-23 20:53:11 +03:00
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} GCC_ATTRIBUTE((aligned(16), packed));
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#else
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2003-08-01 13:32:33 +04:00
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struct bx_fpu_reg_t {
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2003-04-13 01:02:08 +04:00
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Bit32u sigl;
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Bit32u sigh;
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Bit16s exp; /* Signed quantity used in internal arithmetic. */
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2003-04-16 22:38:53 +04:00
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Bit16u alignment1, alignment2, alignment3;
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2003-01-23 20:53:11 +03:00
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} GCC_ATTRIBUTE((aligned(16), packed));
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#endif
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2003-10-25 14:32:54 +04:00
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typedef struct bx_fpu_reg_t FPU_REG;
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2003-01-23 20:53:11 +03:00
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#define BX_FPU_REG(index) \
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2003-04-13 01:02:08 +04:00
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(BX_CPU_THIS_PTR the_i387.st_space[index*2])
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#define FPU_PARTIAL_STATUS (BX_CPU_THIS_PTR the_i387.swd)
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2003-08-01 13:32:33 +04:00
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#define FPU_TAG_WORD (BX_CPU_THIS_PTR the_i387.twd)
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2003-04-13 01:02:08 +04:00
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#define FPU_TOS (BX_CPU_THIS_PTR the_i387.tos)
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2003-08-01 13:32:33 +04:00
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#define FPU_SW_SUMMARY (0x0080) /* exception summary */
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2003-10-25 14:32:54 +04:00
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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int FPU_tagof(FPU_REG *reg) BX_CPP_AttrRegparmN(1);
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#ifdef __cplusplus
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}
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#endif
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2003-01-23 20:53:11 +03:00
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2002-09-09 20:11:25 +04:00
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#if BX_SUPPORT_MMX
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2003-04-13 01:02:08 +04:00
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2002-09-09 20:11:25 +04:00
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typedef union {
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Bit8u u8;
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Bit8s s8;
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} MMX_BYTE;
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typedef union {
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Bit16u u16;
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Bit16s s16;
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struct {
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#ifdef BX_BIG_ENDIAN
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MMX_BYTE hi;
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MMX_BYTE lo;
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#else
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MMX_BYTE lo;
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MMX_BYTE hi;
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#endif
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} bytes;
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} MMX_WORD;
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typedef union {
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Bit32u u32;
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Bit32s s32;
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struct {
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#ifdef BX_BIG_ENDIAN
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MMX_WORD hi;
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MMX_WORD lo;
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#else
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MMX_WORD lo;
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MMX_WORD hi;
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#endif
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} words;
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} MMX_DWORD;
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typedef union {
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Bit64u u64;
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Bit64s s64;
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struct {
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#ifdef BX_BIG_ENDIAN
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MMX_DWORD hi;
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MMX_DWORD lo;
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#else
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MMX_DWORD lo;
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MMX_DWORD hi;
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#endif
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} dwords;
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} MMX_QWORD, BxPackedMmxRegister;
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#define MMXSB0(reg) (reg.dwords.lo.words.lo.bytes.lo.s8)
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#define MMXSB1(reg) (reg.dwords.lo.words.lo.bytes.hi.s8)
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#define MMXSB2(reg) (reg.dwords.lo.words.hi.bytes.lo.s8)
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#define MMXSB3(reg) (reg.dwords.lo.words.hi.bytes.hi.s8)
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#define MMXSB4(reg) (reg.dwords.hi.words.lo.bytes.lo.s8)
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#define MMXSB5(reg) (reg.dwords.hi.words.lo.bytes.hi.s8)
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#define MMXSB6(reg) (reg.dwords.hi.words.hi.bytes.lo.s8)
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#define MMXSB7(reg) (reg.dwords.hi.words.hi.bytes.hi.s8)
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#define MMXUB0(reg) (reg.dwords.lo.words.lo.bytes.lo.u8)
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#define MMXUB1(reg) (reg.dwords.lo.words.lo.bytes.hi.u8)
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#define MMXUB2(reg) (reg.dwords.lo.words.hi.bytes.lo.u8)
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#define MMXUB3(reg) (reg.dwords.lo.words.hi.bytes.hi.u8)
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#define MMXUB4(reg) (reg.dwords.hi.words.lo.bytes.lo.u8)
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#define MMXUB5(reg) (reg.dwords.hi.words.lo.bytes.hi.u8)
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#define MMXUB6(reg) (reg.dwords.hi.words.hi.bytes.lo.u8)
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#define MMXUB7(reg) (reg.dwords.hi.words.hi.bytes.hi.u8)
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#define MMXSW0(reg) (reg.dwords.lo.words.lo.s16)
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#define MMXSW1(reg) (reg.dwords.lo.words.hi.s16)
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#define MMXSW2(reg) (reg.dwords.hi.words.lo.s16)
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#define MMXSW3(reg) (reg.dwords.hi.words.hi.s16)
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#define MMXUW0(reg) (reg.dwords.lo.words.lo.u16)
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#define MMXUW1(reg) (reg.dwords.lo.words.hi.u16)
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#define MMXUW2(reg) (reg.dwords.hi.words.lo.u16)
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#define MMXUW3(reg) (reg.dwords.hi.words.hi.u16)
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#define MMXSD0(reg) (reg.dwords.lo.s32)
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#define MMXSD1(reg) (reg.dwords.hi.s32)
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#define MMXUD0(reg) (reg.dwords.lo.u32)
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#define MMXUD1(reg) (reg.dwords.hi.u32)
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#define MMXSQ(reg) (reg.s64)
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#define MMXUQ(reg) (reg.u64)
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2002-11-30 20:15:59 +03:00
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// Endian Host byte order Guest (x86) byte order
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// ======================================================
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// Little FFFFFFFFEEAAAAAA FFFFFFFFEEAAAAAA
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// Big AAAAAAEEFFFFFFFF FFFFFFFFEEAAAAAA
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//
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// Legend: F - fraction/mmx
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// E - exponent
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2003-04-16 22:38:53 +04:00
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// A - alignment
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2002-11-30 20:15:59 +03:00
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#ifdef BX_BIG_ENDIAN
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2003-04-13 01:02:08 +04:00
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struct bx_mmx_reg_t {
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2003-04-16 22:38:53 +04:00
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Bit16u alignment1, alignment2, alignment3;
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2003-04-13 01:02:08 +04:00
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Bit16u exp; /* 2 byte FP-reg exponent */
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2002-09-09 20:11:25 +04:00
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BxPackedMmxRegister packed_mmx_register;
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2003-04-13 01:02:08 +04:00
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} GCC_ATTRIBUTE((aligned(16), packed));
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2002-11-30 20:15:59 +03:00
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#else
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2003-04-13 01:02:08 +04:00
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struct bx_mmx_reg_t {
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2002-11-30 20:15:59 +03:00
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BxPackedMmxRegister packed_mmx_register;
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2003-04-13 01:02:08 +04:00
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Bit16u exp; /* 2 byte FP reg exponent */
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2003-04-16 22:38:53 +04:00
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Bit16u alignment1, alignment2, alignment3;
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2003-04-13 01:02:08 +04:00
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} GCC_ATTRIBUTE((aligned(16), packed));
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2002-11-30 20:15:59 +03:00
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#endif
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2002-09-09 20:11:25 +04:00
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2003-04-13 01:02:08 +04:00
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#define BX_MMX_REG(index) \
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(((bx_mmx_reg_t*)(BX_CPU_THIS_PTR the_i387.st_space))[index])
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2002-11-30 17:42:41 +03:00
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2003-04-13 01:02:08 +04:00
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#define BX_READ_MMX_REG(index) \
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((BX_MMX_REG(index)).packed_mmx_register)
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2002-11-30 17:42:41 +03:00
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2003-04-13 01:02:08 +04:00
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#define BX_WRITE_MMX_REG(index, value) \
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{ \
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(BX_MMX_REG(index)).packed_mmx_register = value; \
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(BX_MMX_REG(index)).exp = 0xffff; \
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2002-11-30 17:42:41 +03:00
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}
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2003-04-13 01:02:08 +04:00
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#endif /* BX_SUPPORT_MMX */
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#endif /* BX_SUPPORT_FPU */
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2002-11-30 17:42:41 +03:00
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2002-09-09 20:11:25 +04:00
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#endif
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