2007-12-07 13:59:18 +03:00
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/////////////////////////////////////////////////////////////////////////
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2011-02-25 00:54:04 +03:00
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// $Id$
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2007-12-07 13:59:18 +03:00
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/////////////////////////////////////////////////////////////////////////
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//
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2018-02-16 10:57:32 +03:00
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// Copyright (C) 2001-2018 The Bochs Project
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2007-12-07 13:59:18 +03:00
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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2009-01-16 21:18:59 +03:00
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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2007-12-07 13:59:18 +03:00
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64
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2014-03-02 20:40:13 +04:00
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#include "scalar_arith.h"
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSF_GqEqR(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit64u op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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if (op2_64 == 0) {
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2011-06-28 20:04:40 +04:00
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assert_ZF(); /* op1_64 undefined */
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2007-12-07 13:59:18 +03:00
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}
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2008-07-13 19:52:55 +04:00
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else {
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2014-03-02 20:40:13 +04:00
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Bit64u op1_64 = tzcntq(op2_64);
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2008-07-13 19:52:55 +04:00
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SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
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2011-06-28 20:04:40 +04:00
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clear_ZF();
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2007-12-07 13:59:18 +03:00
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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2008-07-13 19:52:55 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSR_GqEqR(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit64u op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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if (op2_64 == 0) {
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2011-06-28 20:04:40 +04:00
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assert_ZF(); /* op1_64 undefined */
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2007-12-07 13:59:18 +03:00
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}
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2008-07-13 19:52:55 +04:00
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else {
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2008-08-10 23:34:28 +04:00
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Bit64u op1_64 = 63;
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2008-07-13 19:52:55 +04:00
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while ((op2_64 & BX_CONST64(0x8000000000000000)) == 0) {
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op1_64--;
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op2_64 <<= 1;
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}
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2007-12-07 13:59:18 +03:00
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2008-07-13 19:52:55 +04:00
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SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
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2011-06-28 22:53:20 +04:00
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clear_ZF();
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2008-02-03 00:46:54 +03:00
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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2008-07-13 19:52:55 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqGqM(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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bx_address op1_addr;
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Bit64u op1_64, op2_64;
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Bit64s displacement64;
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Bit64u index;
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2012-08-05 17:52:40 +04:00
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op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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index = op2_64 & 0x3f;
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displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
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2008-08-08 13:22:49 +04:00
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op1_addr = eaddr + 8 * displacement64;
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2008-04-25 11:40:51 +04:00
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if (! i->as64L())
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op1_addr = (Bit32u) op1_addr;
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2007-12-07 13:59:18 +03:00
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/* pointer, segment address pair */
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2014-10-21 01:08:29 +04:00
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op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), op1_addr));
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2007-12-07 13:59:18 +03:00
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set_CF((op1_64 >> index) & 0x01);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqGqR(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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Bit64u op1_64, op2_64;
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2012-08-05 17:52:40 +04:00
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op1_64 = BX_READ_64BIT_REG(i->dst());
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op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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op2_64 &= 0x3f;
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set_CF((op1_64 >> op2_64) & 0x01);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqGqM(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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bx_address op1_addr;
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Bit64u op1_64, op2_64, index;
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Bit64s displacement64;
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2021-01-30 11:35:35 +03:00
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bool bit_i;
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2007-12-07 13:59:18 +03:00
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2012-08-05 17:52:40 +04:00
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op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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index = op2_64 & 0x3f;
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displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
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2008-08-08 13:22:49 +04:00
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op1_addr = eaddr + 8 * displacement64;
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2008-04-25 11:40:51 +04:00
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if (! i->as64L())
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op1_addr = (Bit32u) op1_addr;
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2007-12-07 13:59:18 +03:00
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/* pointer, segment address pair */
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2015-01-26 23:01:25 +03:00
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), op1_addr));
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2007-12-07 13:59:18 +03:00
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bit_i = (op1_64 >> index) & 0x01;
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op1_64 |= (((Bit64u) 1) << index);
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2015-01-25 23:55:10 +03:00
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write_RMW_linear_qword(op1_64);
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2007-12-07 13:59:18 +03:00
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set_CF(bit_i);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqGqR(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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Bit64u op1_64, op2_64;
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2012-08-05 17:52:40 +04:00
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op1_64 = BX_READ_64BIT_REG(i->dst());
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op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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op2_64 &= 0x3f;
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set_CF((op1_64 >> op2_64) & 0x01);
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op1_64 |= (((Bit64u) 1) << op2_64);
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/* now write result back to the destination */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqGqM(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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bx_address op1_addr;
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Bit64u op1_64, op2_64, index;
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Bit64s displacement64;
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2012-08-05 17:52:40 +04:00
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op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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index = op2_64 & 0x3f;
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displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
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2008-08-08 13:22:49 +04:00
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op1_addr = eaddr + 8 * displacement64;
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2008-04-25 11:40:51 +04:00
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if (! i->as64L())
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op1_addr = (Bit32u) op1_addr;
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2007-12-07 13:59:18 +03:00
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/* pointer, segment address pair */
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2015-01-26 23:01:25 +03:00
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), op1_addr));
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2021-01-30 11:35:35 +03:00
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bool temp_cf = (op1_64 >> index) & 0x01;
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2007-12-07 13:59:18 +03:00
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op1_64 &= ~(((Bit64u) 1) << index);
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/* now write back to destination */
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2015-01-25 23:55:10 +03:00
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write_RMW_linear_qword(op1_64);
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2007-12-07 13:59:18 +03:00
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set_CF(temp_cf);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqGqR(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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Bit64u op1_64, op2_64;
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2012-08-05 17:52:40 +04:00
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op1_64 = BX_READ_64BIT_REG(i->dst());
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op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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op2_64 &= 0x3f;
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set_CF((op1_64 >> op2_64) & 0x01);
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op1_64 &= ~(((Bit64u) 1) << op2_64);
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/* now write result back to the destination */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqGqM(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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bx_address op1_addr;
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Bit64u op1_64, op2_64;
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Bit64s displacement64;
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Bit64u index;
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2012-08-05 17:52:40 +04:00
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op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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index = op2_64 & 0x3f;
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displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
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2008-08-08 13:22:49 +04:00
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op1_addr = eaddr + 8 * displacement64;
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2008-04-25 11:40:51 +04:00
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if (! i->as64L())
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op1_addr = (Bit32u) op1_addr;
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2007-12-07 13:59:18 +03:00
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2015-01-26 23:01:25 +03:00
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), op1_addr));
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2021-01-30 11:35:35 +03:00
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bool temp_CF = (op1_64 >> index) & 0x01;
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2007-12-07 13:59:18 +03:00
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op1_64 ^= (((Bit64u) 1) << index); /* toggle bit */
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set_CF(temp_CF);
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2015-01-25 23:55:10 +03:00
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write_RMW_linear_qword(op1_64);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqGqR(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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Bit64u op1_64, op2_64;
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2012-08-05 17:52:40 +04:00
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op1_64 = BX_READ_64BIT_REG(i->dst());
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op2_64 = BX_READ_64BIT_REG(i->src());
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2007-12-07 13:59:18 +03:00
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op2_64 &= 0x3f;
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2021-01-30 11:35:35 +03:00
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bool temp_CF = (op1_64 >> op2_64) & 0x01;
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2007-12-07 13:59:18 +03:00
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op1_64 ^= (((Bit64u) 1) << op2_64); /* toggle bit */
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set_CF(temp_CF);
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqIbM(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2014-10-21 01:08:29 +04:00
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Bit64u op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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2007-12-20 23:58:38 +03:00
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Bit8u op2_8 = i->Ib() & 0x3f;
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2007-12-07 13:59:18 +03:00
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set_CF((op1_64 >> op2_8) & 0x01);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-12-07 13:59:18 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqIbR(bxInstruction_c *i)
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2007-12-07 13:59:18 +03:00
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{
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2012-08-05 17:52:40 +04:00
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|
Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
|
2007-12-07 13:59:18 +03:00
|
|
|
Bit8u op2_8 = i->Ib() & 0x3f;
|
|
|
|
|
|
|
|
set_CF((op1_64 >> op2_8) & 0x01);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-07 13:59:18 +03:00
|
|
|
}
|
|
|
|
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqIbM(bxInstruction_c *i)
|
2007-12-07 13:59:18 +03:00
|
|
|
{
|
|
|
|
Bit8u op2_8 = i->Ib() & 0x3f;
|
|
|
|
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
|
2008-01-10 22:37:56 +03:00
|
|
|
|
2015-01-26 23:01:25 +03:00
|
|
|
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
2021-01-30 11:35:35 +03:00
|
|
|
bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
2007-12-07 13:59:18 +03:00
|
|
|
op1_64 |= (((Bit64u) 1) << op2_8);
|
2015-01-25 23:55:10 +03:00
|
|
|
write_RMW_linear_qword(op1_64);
|
2007-12-07 13:59:18 +03:00
|
|
|
|
|
|
|
set_CF(temp_CF);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-07 13:59:18 +03:00
|
|
|
}
|
|
|
|
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqIbR(bxInstruction_c *i)
|
2007-12-07 13:59:18 +03:00
|
|
|
{
|
|
|
|
Bit8u op2_8 = i->Ib() & 0x3f;
|
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
|
2021-01-30 11:35:35 +03:00
|
|
|
bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
2007-12-07 13:59:18 +03:00
|
|
|
op1_64 |= (((Bit64u) 1) << op2_8);
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), op1_64);
|
2007-12-07 13:59:18 +03:00
|
|
|
|
|
|
|
set_CF(temp_CF);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-07 13:59:18 +03:00
|
|
|
}
|
|
|
|
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqIbM(bxInstruction_c *i)
|
2007-12-07 13:59:18 +03:00
|
|
|
{
|
|
|
|
Bit8u op2_8 = i->Ib() & 0x3f;
|
|
|
|
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
|
2008-01-10 22:37:56 +03:00
|
|
|
|
2015-01-26 23:01:25 +03:00
|
|
|
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
2021-01-30 11:35:35 +03:00
|
|
|
bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
2007-12-07 13:59:18 +03:00
|
|
|
op1_64 ^= (((Bit64u) 1) << op2_8); /* toggle bit */
|
2015-01-25 23:55:10 +03:00
|
|
|
write_RMW_linear_qword(op1_64);
|
2007-12-07 13:59:18 +03:00
|
|
|
|
|
|
|
set_CF(temp_CF);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-07 13:59:18 +03:00
|
|
|
}
|
|
|
|
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqIbR(bxInstruction_c *i)
|
2007-12-07 13:59:18 +03:00
|
|
|
{
|
|
|
|
Bit8u op2_8 = i->Ib() & 0x3f;
|
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
|
2021-01-30 11:35:35 +03:00
|
|
|
bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
2007-12-07 13:59:18 +03:00
|
|
|
op1_64 ^= (((Bit64u) 1) << op2_8); /* toggle bit */
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), op1_64);
|
2007-12-07 13:59:18 +03:00
|
|
|
|
|
|
|
set_CF(temp_CF);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-07 13:59:18 +03:00
|
|
|
}
|
|
|
|
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqIbM(bxInstruction_c *i)
|
2007-12-07 13:59:18 +03:00
|
|
|
{
|
|
|
|
Bit8u op2_8 = i->Ib() & 0x3f;
|
|
|
|
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
|
2008-01-10 22:37:56 +03:00
|
|
|
|
2015-01-26 23:01:25 +03:00
|
|
|
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
2021-01-30 11:35:35 +03:00
|
|
|
bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
2007-12-07 13:59:18 +03:00
|
|
|
op1_64 &= ~(((Bit64u) 1) << op2_8);
|
2015-01-25 23:55:10 +03:00
|
|
|
write_RMW_linear_qword(op1_64);
|
2007-12-07 13:59:18 +03:00
|
|
|
|
|
|
|
set_CF(temp_CF);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-07 13:59:18 +03:00
|
|
|
}
|
|
|
|
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqIbR(bxInstruction_c *i)
|
2007-12-07 13:59:18 +03:00
|
|
|
{
|
|
|
|
Bit8u op2_8 = i->Ib() & 0x3f;
|
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
|
2021-01-30 11:35:35 +03:00
|
|
|
bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
2007-12-07 13:59:18 +03:00
|
|
|
op1_64 &= ~(((Bit64u) 1) << op2_8);
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), op1_64);
|
2007-12-07 13:59:18 +03:00
|
|
|
|
|
|
|
set_CF(temp_CF);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-07 13:59:18 +03:00
|
|
|
}
|
|
|
|
|
2010-02-09 22:44:25 +03:00
|
|
|
/* F3 0F B8 */
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::POPCNT_GqEqR(bxInstruction_c *i)
|
2007-12-07 13:59:18 +03:00
|
|
|
{
|
2014-03-02 20:40:13 +04:00
|
|
|
Bit32u op_32 = popcntq(BX_READ_64BIT_REG(i->src()));
|
2007-12-07 13:59:18 +03:00
|
|
|
|
2014-10-22 21:49:12 +04:00
|
|
|
clearEFlagsOSZAPC();
|
|
|
|
if (! op_32) assert_ZF();
|
2007-12-07 13:59:18 +03:00
|
|
|
|
2014-03-02 20:40:13 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), op_32);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-07 13:59:18 +03:00
|
|
|
}
|
|
|
|
|
2011-09-01 00:43:47 +04:00
|
|
|
/* F3 0F BC */
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::TZCNT_GqEqR(bxInstruction_c *i)
|
2011-09-01 00:43:47 +04:00
|
|
|
{
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit64u op1_64 = BX_READ_64BIT_REG(i->src());
|
2014-02-28 01:12:02 +04:00
|
|
|
Bit64u result_64 = tzcntq(op1_64);
|
2011-09-01 00:43:47 +04:00
|
|
|
|
2011-11-27 17:23:26 +04:00
|
|
|
set_CF(! op1_64);
|
|
|
|
set_ZF(! result_64);
|
2022-08-23 21:38:00 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), result_64);
|
2011-09-01 00:43:47 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* F3 0F BD */
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LZCNT_GqEqR(bxInstruction_c *i)
|
2011-09-01 00:43:47 +04:00
|
|
|
{
|
2014-02-28 01:12:02 +04:00
|
|
|
Bit64u op1_64 = BX_READ_64BIT_REG(i->src());
|
|
|
|
Bit64u result_64 = lzcntq(op1_64);
|
2011-09-01 00:43:47 +04:00
|
|
|
|
2011-11-27 17:23:26 +04:00
|
|
|
set_CF(! op1_64);
|
|
|
|
set_ZF(! result_64);
|
2022-08-23 21:38:00 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), result_64);
|
2011-09-01 00:43:47 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
|
|
|
}
|
|
|
|
|
2007-12-07 13:59:18 +03:00
|
|
|
#endif // BX_SUPPORT_X86_64
|