391 lines
10 KiB
C++
391 lines
10 KiB
C++
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/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2013-2019 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_EVEX
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#include "simd_int.h"
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// broadcast from vector register or memory
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTB_MASK_VdqWbR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastb(&op, BX_READ_XMM_REG_LO_BYTE(i->src()), BYTE_ELEMENTS(len));
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avx512_write_regb_masked(i, &op, len, BX_READ_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTB_MASK_VdqWbM(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit64u opmask = BX_READ_OPMASK(i->opmask()) & CUT_OPMASK_TO(BYTE_ELEMENTS(len));
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Bit8u val_8 = 0;
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if (opmask) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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val_8 = read_virtual_byte(i->seg(), eaddr);
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}
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simd_pbroadcastb(&op, val_8, BYTE_ELEMENTS(len));
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avx512_write_regb_masked(i, &op, len, opmask);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTW_MASK_VdqWwR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastw(&op, BX_READ_XMM_REG_LO_WORD(i->src()), WORD_ELEMENTS(len));
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avx512_write_regw_masked(i, &op, len, BX_READ_32BIT_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTW_MASK_VdqWwM(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit32u opmask = BX_READ_32BIT_OPMASK(i->opmask()) & CUT_OPMASK_TO(WORD_ELEMENTS(len));
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Bit16u val_16 = 0;
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if (opmask) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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val_16 = read_virtual_word(i->seg(), eaddr);
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}
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simd_pbroadcastw(&op, val_16, WORD_ELEMENTS(len));
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avx512_write_regw_masked(i, &op, len, opmask);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTD_MASK_VdqWdR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastd(&op, BX_READ_XMM_REG_LO_DWORD(i->src()), DWORD_ELEMENTS(len));
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avx512_write_regd_masked(i, &op, len, BX_READ_16BIT_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTD_MASK_VdqWdM(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit32u opmask = BX_READ_16BIT_OPMASK(i->opmask()) & CUT_OPMASK_TO(DWORD_ELEMENTS(len));
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Bit32u val_32 = 0;
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if (opmask) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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val_32 = read_virtual_dword(i->seg(), eaddr);
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}
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simd_pbroadcastd(&op, val_32, DWORD_ELEMENTS(len));
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avx512_write_regd_masked(i, &op, len, opmask);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTQ_MASK_VdqWqR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastq(&op, BX_READ_XMM_REG_LO_QWORD(i->src()), QWORD_ELEMENTS(len));
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avx512_write_regq_masked(i, &op, len, BX_READ_8BIT_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTQ_MASK_VdqWqM(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit32u opmask = BX_READ_16BIT_OPMASK(i->opmask()) & CUT_OPMASK_TO(QWORD_ELEMENTS(len));
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Bit64u val_64 = 0;
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if (opmask) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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val_64 = read_virtual_qword(i->seg(), eaddr);
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}
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simd_pbroadcastq(&op, val_64, QWORD_ELEMENTS(len));
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avx512_write_regq_masked(i, &op, len, opmask);
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BX_NEXT_INSTR(i);
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}
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// broadcast from register
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTB_VdqEbR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastb(&op, BX_READ_8BIT_REGL(i->src()), BYTE_ELEMENTS(len));
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTB_MASK_VdqEbR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastb(&op, BX_READ_8BIT_REGL(i->src()), BYTE_ELEMENTS(len));
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avx512_write_regb_masked(i, &op, len, BX_READ_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTW_VdqEwR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastw(&op, BX_READ_16BIT_REG(i->src()), WORD_ELEMENTS(len));
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTW_MASK_VdqEwR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastw(&op, BX_READ_16BIT_REG(i->src()), WORD_ELEMENTS(len));
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avx512_write_regw_masked(i, &op, len, BX_READ_32BIT_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTD_VdqEdR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastd(&op, BX_READ_32BIT_REG(i->src()), DWORD_ELEMENTS(len));
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTD_MASK_VdqEdR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastd(&op, BX_READ_32BIT_REG(i->src()), DWORD_ELEMENTS(len));
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avx512_write_regd_masked(i, &op, len, BX_READ_16BIT_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTQ_VdqEqR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastq(&op, BX_READ_64BIT_REG(i->src()), QWORD_ELEMENTS(len));
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTQ_MASK_VdqEqR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastq(&op, BX_READ_64BIT_REG(i->src()), QWORD_ELEMENTS(len));
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avx512_write_regq_masked(i, &op, len, BX_READ_8BIT_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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// broadcast dword tupple from vector register or memory
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// writing to destination according to dword mask
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VBROADCASTF32x2_MASK_VpsWqR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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simd_pbroadcastq(&op, BX_READ_XMM_REG_LO_QWORD(i->src()), QWORD_ELEMENTS(len));
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avx512_write_regd_masked(i, &op, len, BX_READ_16BIT_OPMASK(i->opmask()));
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VBROADCASTF32x2_MASK_VpsWqM(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit32u opmask = BX_READ_16BIT_OPMASK(i->opmask()) & CUT_OPMASK_TO(DWORD_ELEMENTS(len));
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Bit64u val_64 = 0;
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if (opmask) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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val_64 = read_virtual_qword(i->seg(), eaddr);
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}
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simd_pbroadcastq(&op, val_64, QWORD_ELEMENTS(len));
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avx512_write_regd_masked(i, &op, len, opmask);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VBROADCASTF32x4_MASK_VpsMps(bxInstruction_c *i)
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{
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BxPackedAvxRegister dst;
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BxPackedXmmRegister src;
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unsigned len = i->getVL();
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Bit32u opmask = BX_READ_16BIT_OPMASK(i->opmask()) & CUT_OPMASK_TO(DWORD_ELEMENTS(len));
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if (opmask != 0) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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read_virtual_xmmword(i->seg(), eaddr, &src);
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for (unsigned n=0; n < len; n++) {
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dst.vmm128(n) = src;
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}
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avx512_write_regd_masked(i, &dst, len, opmask);
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}
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else {
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if (i->isZeroMasking()) {
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BX_CLEAR_AVX_REG(i->dst());
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}
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else {
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BX_CLEAR_AVX_REGZ(i->dst(), len);
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}
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VBROADCASTF64x2_MASK_VpdMpd(bxInstruction_c *i)
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{
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BxPackedAvxRegister dst;
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BxPackedXmmRegister src;
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unsigned len = i->getVL();
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Bit32u opmask = BX_READ_8BIT_OPMASK(i->opmask()) & CUT_OPMASK_TO(QWORD_ELEMENTS(len));
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if (opmask != 0) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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read_virtual_xmmword(i->seg(), eaddr, &src);
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for (unsigned n=0; n < len; n++) {
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dst.vmm128(n) = src;
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}
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avx512_write_regq_masked(i, &dst, len, opmask);
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}
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else {
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if (i->isZeroMasking()) {
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BX_CLEAR_AVX_REG(i->dst());
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}
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else {
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BX_CLEAR_AVX_REGZ(i->dst(), len);
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}
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}
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VBROADCASTF64x4_VpdMpd(bxInstruction_c *i)
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{
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BxPackedAvxRegister dst;
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BxPackedYmmRegister src;
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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read_virtual_ymmword(i->seg(), eaddr, &src);
|
||
|
|
|
||
|
|
dst.vmm256(0) = src;
|
||
|
|
dst.vmm256(1) = src;
|
||
|
|
|
||
|
|
BX_WRITE_AVX_REG(i->dst(), dst);
|
||
|
|
|
||
|
|
BX_NEXT_INSTR(i);
|
||
|
|
}
|
||
|
|
|
||
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VBROADCASTF64x4_MASK_VpdMpd(bxInstruction_c *i)
|
||
|
|
{
|
||
|
|
BxPackedAvxRegister dst;
|
||
|
|
BxPackedYmmRegister src;
|
||
|
|
|
||
|
|
Bit32u opmask = BX_READ_8BIT_OPMASK(i->opmask());
|
||
|
|
if (opmask != 0) {
|
||
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
||
|
|
read_virtual_ymmword(i->seg(), eaddr, &src);
|
||
|
|
|
||
|
|
dst.vmm256(0) = src;
|
||
|
|
dst.vmm256(1) = src;
|
||
|
|
|
||
|
|
avx512_write_regq_masked(i, &dst, BX_VL512, opmask);
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
if (i->isZeroMasking())
|
||
|
|
BX_CLEAR_AVX_REG(i->dst());
|
||
|
|
}
|
||
|
|
|
||
|
|
BX_NEXT_INSTR(i);
|
||
|
|
}
|
||
|
|
|
||
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VBROADCASTF32x8_MASK_VpsMps(bxInstruction_c *i)
|
||
|
|
{
|
||
|
|
BxPackedAvxRegister dst;
|
||
|
|
BxPackedYmmRegister src;
|
||
|
|
|
||
|
|
Bit32u opmask = BX_READ_16BIT_OPMASK(i->opmask());
|
||
|
|
if (opmask != 0) {
|
||
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
||
|
|
read_virtual_ymmword(i->seg(), eaddr, &src);
|
||
|
|
|
||
|
|
dst.vmm256(0) = src;
|
||
|
|
dst.vmm256(1) = src;
|
||
|
|
|
||
|
|
avx512_write_regd_masked(i, &dst, BX_VL512, opmask);
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
if (i->isZeroMasking())
|
||
|
|
BX_CLEAR_AVX_REG(i->dst());
|
||
|
|
}
|
||
|
|
|
||
|
|
BX_NEXT_INSTR(i);
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|