Bochs/bochs/cpu/arith64.cc

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/////////////////////////////////////////////////////////////////////////
// $Id: arith64.cc,v 1.21 2004-08-16 20:18:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
//
// MandrakeSoft S.A.
// 43, rue d'Aboukir
// 75002 Paris - France
// http://www.linux-mandrake.com/
// http://www.mandrakesoft.com/
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#define LOG_THIS BX_CPU_THIS_PTR
- apply patch.ifdef-disabled-options. Comments from that patch are below: For a whole lot of configure options, I put #if...#endif around code that is specific to the option, even in files which are normally only compiled when the option is on. This allows me to create a MS Visual C++ 6.0 workspace that supports many of these options. The workspace will basically compile every file all the time, but the code for disabled options will be commented out by the #if...#endif. This may one day lead to simplification of the Makefiles and configure scripts, but for the moment I'm leaving Makefiles and configure scripts alone. Affected options: BX_SUPPORT_APIC (cpu/apic.cc) BX_SUPPORT_X86_64 (cpu/*64.cc) BX_DEBUGGER (debug/*) BX_DISASM (disasm/*) BX_WITH_nameofgui (gui/*) BX_SUPPORT_CDROM (iodev/cdrom.cc) BX_NE2K_SUPPORT (iodev/eth*.cc, iodev/ne2k.cc) BX_SUPPORT_APIC (iodev/ioapic.cc) BX_IODEBUG_SUPPORT (iodev/iodebug.cc) BX_PCI_SUPPORT (iodev/pci*.cc) BX_SUPPORT_SB16 (iodev/sb*.cc) Modified Files: cpu/apic.cc cpu/arith64.cc cpu/ctrl_xfer64.cc cpu/data_xfer64.cc cpu/fetchdecode64.cc cpu/logical64.cc cpu/mult64.cc cpu/resolve64.cc cpu/shift64.cc cpu/stack64.cc debug/Makefile.in debug/crc.cc debug/dbg_main.cc debug/lexer.l debug/linux.cc debug/parser.c debug/parser.y disasm/dis_decode.cc disasm/dis_groups.cc gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/macintosh.cc gui/rfb.cc gui/sdl.cc gui/term.cc gui/win32.cc gui/wx.cc gui/wxdialog.cc gui/wxmain.cc gui/x.cc iodev/cdrom.cc iodev/eth.cc iodev/eth_arpback.cc iodev/eth_fbsd.cc iodev/eth_linux.cc iodev/eth_null.cc iodev/eth_packetmaker.cc iodev/eth_tap.cc iodev/eth_tuntap.cc iodev/eth_win32.cc iodev/ioapic.cc iodev/iodebug.cc iodev/ne2k.cc iodev/pci.cc iodev/pci2isa.cc iodev/sb16.cc iodev/soundlnx.cc iodev/soundwin.cc
2002-11-19 08:47:45 +03:00
#if BX_SUPPORT_X86_64
void
BX_CPU_C::ADD_EqGq(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, sum_64;
/* op2_64 is a register, RMAddr(i) is an index of a register */
op2_64 = BX_READ_64BIT_REG(i->nnn());
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
Write_RMW_virtual_qword(sum_64);
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD64);
}
void
BX_CPU_C::ADD_GqEq(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, sum_64;
/* op1_64 is a register, RMAddr(i) is an index of a register */
op1_64 = BX_READ_64BIT_REG(i->nnn());
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
sum_64 = op1_64 + op2_64;
/* now write sum back to destination */
BX_WRITE_64BIT_REG(i->nnn(), sum_64);
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD64);
}
void
BX_CPU_C::ADD_RAXId(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, sum_64;
op1_64 = RAX;
op2_64 = (Bit32s) i->Id();
sum_64 = op1_64 + op2_64;
/* now write sum back to destination */
RAX = sum_64;
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD64);
}
void
BX_CPU_C::ADC_EqGq(bxInstruction_c *i)
{
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bx_bool temp_CF = getB_CF();
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, sum_64;
/* op2_64 is a register, RMAddr(i) is an index of a register */
op2_64 = BX_READ_64BIT_REG(i->nnn());
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64 + temp_CF;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
Write_RMW_virtual_qword(sum_64);
}
SET_FLAGS_OSZAPC_64_CF(op1_64, op2_64, sum_64, BX_INSTR_ADC64, temp_CF);
}
void
BX_CPU_C::ADC_GqEq(bxInstruction_c *i)
{
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bx_bool temp_CF = getB_CF();
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, sum_64;
/* op1_64 is a register, RMAddr(i) is an index of a register */
op1_64 = BX_READ_64BIT_REG(i->nnn());
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
sum_64 = op1_64 + op2_64 + temp_CF;
/* now write sum back to destination */
BX_WRITE_64BIT_REG(i->nnn(), sum_64);
SET_FLAGS_OSZAPC_64_CF(op1_64, op2_64, sum_64, BX_INSTR_ADC64, temp_CF);
}
void
BX_CPU_C::ADC_RAXId(bxInstruction_c *i)
{
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bx_bool temp_CF = getB_CF();
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, sum_64;
op1_64 = RAX;
op2_64 = (Bit32s) i->Id();
sum_64 = op1_64 + op2_64 + temp_CF;
/* now write sum back to destination */
RAX = sum_64;
SET_FLAGS_OSZAPC_64_CF(op1_64, op2_64, sum_64, BX_INSTR_ADC64, temp_CF);
}
void
BX_CPU_C::SBB_EqGq(bxInstruction_c *i)
{
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bx_bool temp_CF = getB_CF();
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, diff_64;
/* op2_64 is a register, RMAddr(i) is an index of a register */
op2_64 = BX_READ_64BIT_REG(i->nnn());
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - (op2_64 + temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
Write_RMW_virtual_qword(diff_64);
}
SET_FLAGS_OSZAPC_64_CF(op1_64, op2_64, diff_64, BX_INSTR_SBB64, temp_CF);
}
void
BX_CPU_C::SBB_GqEq(bxInstruction_c *i)
{
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bx_bool temp_CF = getB_CF();
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, diff_64;
/* op1_64 is a register, RMAddr(i) is an index of a register */
op1_64 = BX_READ_64BIT_REG(i->nnn());
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
diff_64 = op1_64 - (op2_64 + temp_CF);
/* now write diff back to destination */
BX_WRITE_64BIT_REG(i->nnn(), diff_64);
SET_FLAGS_OSZAPC_64_CF(op1_64, op2_64, diff_64, BX_INSTR_SBB64, temp_CF);
}
void
BX_CPU_C::SBB_RAXId(bxInstruction_c *i)
{
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bx_bool temp_CF = getB_CF();
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, diff_64;
op1_64 = RAX;
op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - (op2_64 + temp_CF);
/* now write diff back to destination */
RAX = diff_64;
SET_FLAGS_OSZAPC_64_CF(op1_64, op2_64, diff_64, BX_INSTR_SBB64, temp_CF);
}
void
BX_CPU_C::SBB_EqId(bxInstruction_c *i)
{
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bx_bool temp_CF = getB_CF();
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, diff_64;
op2_64 = (Bit32s) i->Id();
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - (op2_64 + temp_CF);
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
Write_RMW_virtual_qword(diff_64);
}
SET_FLAGS_OSZAPC_64_CF(op1_64, op2_64, diff_64, BX_INSTR_SBB64, temp_CF);
}
void
BX_CPU_C::SUB_EqGq(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, diff_64;
/* op2_64 is a register, RMAddr(i) is an index of a register */
op2_64 = BX_READ_64BIT_REG(i->nnn());
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - op2_64;
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
Write_RMW_virtual_qword(diff_64);
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_SUB64);
}
void
BX_CPU_C::SUB_GqEq(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, diff_64;
/* op1_64 is a register, RMAddr(i) is an index of a register */
op1_64 = BX_READ_64BIT_REG(i->nnn());
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
diff_64 = op1_64 - op2_64;
/* now write diff back to destination */
BX_WRITE_64BIT_REG(i->nnn(), diff_64);
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_SUB64);
}
void
BX_CPU_C::SUB_RAXId(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, diff_64;
op1_64 = RAX;
op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - op2_64;
/* now write diff back to destination */
RAX = diff_64;
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_SUB64);
}
void
BX_CPU_C::CMP_EqGq(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, diff_64;
/* op2_64 is a register, RMAddr(i) is an index of a register */
op2_64 = BX_READ_64BIT_REG(i->nnn());
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_COMPARE64);
}
void
BX_CPU_C::CMP_GqEq(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, diff_64;
/* op1_64 is a register, RMAddr(i) is an index of a register */
op1_64 = BX_READ_64BIT_REG(i->nnn());
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_COMPARE64);
}
void
BX_CPU_C::CMP_RAXId(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op1_64, op2_64, diff_64;
op1_64 = RAX;
op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_COMPARE64);
}
void
BX_CPU_C::CDQE(bxInstruction_c *i)
{
/* CWDE: no flags are affected */
RAX = (Bit32s) EAX;
}
void
BX_CPU_C::CQO(bxInstruction_c *i)
{
/* CQO: no flags are affected */
if (RAX & BX_CONST64(0x8000000000000000))
RDX = BX_CONST64(0xffffffffffffffff);
else
RDX = 0;
}
void
BX_CPU_C::XADD_EqGq(bxInstruction_c *i)
{
Bit64u op2_64, op1_64, sum_64;
/* XADD dst(r/m), src(r)
* temp <-- src + dst | sum = op2 + op1
* src <-- dst | op2 = op1
* dst <-- tmp | op1 = sum
*/
/* op2 is a register, RMAddr(i) is an index of a register */
op2_64 = BX_READ_64BIT_REG(i->nnn());
/* op1 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64;
/* now write sum back to destination */
if (i->modC0()) {
// and write destination into source
// Note: if both op1 & op2 are registers, the last one written
// should be the sum, as op1 & op2 may be the same register.
// For example: XADD AL, AL
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
Write_RMW_virtual_qword(sum_64);
/* and write destination into source */
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD64);
}
void
BX_CPU_C::ADD_EqId(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, sum_64;
op2_64 = (Bit32s) i->Id();
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
Write_RMW_virtual_qword(sum_64);
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD64);
}
void
BX_CPU_C::ADC_EqId(bxInstruction_c *i)
{
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bx_bool temp_CF = getB_CF();
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, sum_64;
op2_64 = (Bit32s) i->Id();
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
sum_64 = op1_64 + op2_64 + temp_CF;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), sum_64);
}
else {
Write_RMW_virtual_qword(sum_64);
}
SET_FLAGS_OSZAPC_64_CF(op1_64, op2_64, sum_64, BX_INSTR_ADC64, temp_CF);
}
void
BX_CPU_C::SUB_EqId(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, diff_64;
op2_64 = (Bit32s) i->Id();
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - op2_64;
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
Write_RMW_virtual_qword(diff_64);
}
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_SUB64);
}
void
BX_CPU_C::CMP_EqId(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op2_64, op1_64, diff_64;
op2_64 = (Bit32s) i->Id();
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_COMPARE64);
}
void
BX_CPU_C::NEG_Eq(bxInstruction_c *i)
{
/* for 64 bit operand size mode */
Bit64u op1_64, diff_64;
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = 0 - op1_64;
/* now write diff back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), diff_64);
}
else {
Write_RMW_virtual_qword(diff_64);
}
2004-08-15 00:09:22 +04:00
SET_FLAGS_OSZAPC_S1_64(op1_64, diff_64, BX_INSTR_NEG64);
}
void
BX_CPU_C::INC_Eq(bxInstruction_c *i)
{
Bit64u op1_64;
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
op1_64++;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), op1_64);
}
else {
Write_RMW_virtual_qword(op1_64);
}
SET_FLAGS_OSZAP_RESULT_64(op1_64, BX_INSTR_INC64);
}
void
BX_CPU_C::DEC_Eq(bxInstruction_c *i)
{
Bit64u op1_64;
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
op1_64--;
/* now write sum back to destination */
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), op1_64);
}
else {
Write_RMW_virtual_qword(op1_64);
}
SET_FLAGS_OSZAP_RESULT_64(op1_64, BX_INSTR_DEC64);
}
void
BX_CPU_C::CMPXCHG_EqGq(bxInstruction_c *i)
{
Bit64u op2_64, op1_64, diff_64;
/* op1_64 is a register or memory reference */
if (i->modC0()) {
op1_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_RMW_virtual_qword(i->seg(), RMAddr(i), &op1_64);
}
diff_64 = RAX - op1_64;
SET_FLAGS_OSZAPC_64(RAX, op1_64, diff_64, BX_INSTR_COMPARE64);
if (diff_64 == 0) { // if accumulator == dest
// ZF = 1
set_ZF(1);
// dest <-- src
op2_64 = BX_READ_64BIT_REG(i->nnn());
if (i->modC0()) {
BX_WRITE_64BIT_REG(i->rm(), op2_64);
}
else {
Write_RMW_virtual_qword(op2_64);
}
}
else {
// ZF = 0
set_ZF(0);
// accumulator <-- dest
RAX = op1_64;
2004-04-07 23:23:06 +04:00
}
}
- apply patch.ifdef-disabled-options. Comments from that patch are below: For a whole lot of configure options, I put #if...#endif around code that is specific to the option, even in files which are normally only compiled when the option is on. This allows me to create a MS Visual C++ 6.0 workspace that supports many of these options. The workspace will basically compile every file all the time, but the code for disabled options will be commented out by the #if...#endif. This may one day lead to simplification of the Makefiles and configure scripts, but for the moment I'm leaving Makefiles and configure scripts alone. Affected options: BX_SUPPORT_APIC (cpu/apic.cc) BX_SUPPORT_X86_64 (cpu/*64.cc) BX_DEBUGGER (debug/*) BX_DISASM (disasm/*) BX_WITH_nameofgui (gui/*) BX_SUPPORT_CDROM (iodev/cdrom.cc) BX_NE2K_SUPPORT (iodev/eth*.cc, iodev/ne2k.cc) BX_SUPPORT_APIC (iodev/ioapic.cc) BX_IODEBUG_SUPPORT (iodev/iodebug.cc) BX_PCI_SUPPORT (iodev/pci*.cc) BX_SUPPORT_SB16 (iodev/sb*.cc) Modified Files: cpu/apic.cc cpu/arith64.cc cpu/ctrl_xfer64.cc cpu/data_xfer64.cc cpu/fetchdecode64.cc cpu/logical64.cc cpu/mult64.cc cpu/resolve64.cc cpu/shift64.cc cpu/stack64.cc debug/Makefile.in debug/crc.cc debug/dbg_main.cc debug/lexer.l debug/linux.cc debug/parser.c debug/parser.y disasm/dis_decode.cc disasm/dis_groups.cc gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/macintosh.cc gui/rfb.cc gui/sdl.cc gui/term.cc gui/win32.cc gui/wx.cc gui/wxdialog.cc gui/wxmain.cc gui/x.cc iodev/cdrom.cc iodev/eth.cc iodev/eth_arpback.cc iodev/eth_fbsd.cc iodev/eth_linux.cc iodev/eth_null.cc iodev/eth_packetmaker.cc iodev/eth_tap.cc iodev/eth_tuntap.cc iodev/eth_win32.cc iodev/ioapic.cc iodev/iodebug.cc iodev/ne2k.cc iodev/pci.cc iodev/pci2isa.cc iodev/sb16.cc iodev/soundlnx.cc iodev/soundwin.cc
2002-11-19 08:47:45 +03:00
#endif /* if BX_SUPPORT_X86_64 */