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Bochs/bochs/cpu/cpudb/Makefile.in

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forgot to add a file
2011-08-18 23:02:16 +04:00
# Copyright (C) 2011 The Bochs Project
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
# Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
@SUFFIX_LINE@
srcdir = @srcdir@
VPATH = @srcdir@
top_builddir = ../..
top_srcdir = @top_srcdir@
SHELL = /bin/sh
@SET_MAKE@
CXX = @CXX@
CXXFLAGS = @CXXFLAGS@ @GUI_CXXFLAGS@
LDFLAGS = @LDFLAGS@
LIBS = @LIBS@
RANLIB = @RANLIB@
merged patch ftom SF bug 3459998 Bochs cannot be compiled outside the source tree
2012-02-19 16:16:14 +04:00
BX_INCDIRS = -I.. -I../.. -I$(srcdir)/.. -I$(srcdir)/../.. -I../../@INSTRUMENT_DIR@ -I$(srcdir)/../../@INSTRUMENT_DIR@
forgot to add a file
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CPUDB_OBJS = pentium_mmx.o \
- Fixed compilation issue with cpu-level=5 - SYSCALL/SYSRET: SYSCALL/SYSRET instructions are not supported in legacy mode for Intel processors - CPUID: CPUID.0x80000001.EDX[11] SYSCALL/SYSRET support should not be reported outside long64 mode if legacy mode SYSCALL/SYSRET is not supported - Added new CPUDB entry - AMD K6-2 3D proc3essor (Chomper)
2011-08-31 02:00:27 +04:00
amd_k6_2_chomper.o \
forgot to add a file
2011-08-18 23:02:16 +04:00
p2_klamath.o \
p3_katmai.o \
p4_willamette.o \
p4_prescott_celeron_336.o \
athlon64_clawhammer.o \
added two AMD CPUs to CPUDB
2011-12-29 18:23:22 +04:00
athlon64_venice.o \
turion64_tyler.o \
Major commit ! ------------ Implemented SVN nested paging support - the Virtual Box boots perfectly with Nested Paging guest ! A lot of code duplication was added for now - major cleanup will follow later. ! Added AMD Phenom X3 8650 (Toliman) configuration to the CPUDB - this configuration has Nested Paging enabled. Some CPUID modules rework done to enable Toliman configuration. Ckean up 'executable' attribute from all CPU source files.
2012-02-14 03:29:01 +04:00
phenomx3_8650_toliman.o \
forgot to add a file
2011-08-18 23:02:16 +04:00
core_duo_t2400_yonah.o \
core2_penryn_t9600.o \
Added Corei5 750 (Lynnfield) configuration to the CPUDB
2012-01-03 00:59:02 +04:00
corei5_lynnfield_750.o \
added to cpudb: Intel(R) Core(TM) i5 M 520 (Arrandale) - based on Westmere arch
2011-10-07 23:32:44 +04:00
corei5_arrandale_m520.o \
forgot to add a file
2011-08-18 23:02:16 +04:00
corei7_sandy_bridge_2600K.o \
Added Corei7 ivyBridge configuration to CPUDB
2012-05-07 16:31:22 +04:00
corei7_ivy_bridge_3770K.o \
forgot to add a file
2011-08-18 23:02:16 +04:00
atom_n270.o
BX_INCLUDES = ../../bochs.h ../../config.h
all: libcpudb.a
.@CPP_SUFFIX@.o:
$(CXX) @DASH@c $(BX_INCDIRS) $(CXXFLAGS) @CXXFP@$< @OFP@$@
libcpudb.a: $(CPUDB_OBJS)
@RMCOMMAND@ libcpudb.a
@MAKELIB@ $(CPUDB_OBJS)
$(RANLIB) libcpudb.a
$(CPUDB_OBJS): $(BX_INCLUDES)
clean:
@RMCOMMAND@ *.o
@RMCOMMAND@ *.a
dist-clean: clean
@RMCOMMAND@ Makefile
###########################################
# dependencies generated by
# gcc -MM -I.. -I../.. -I../../instrument/stubs *.cc | sed 's/\.cc/.@CPP_SUFFIX@/g'
###########################################
athlon64_clawhammer.o: athlon64_clawhammer.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
forgot to add a file
2011-08-18 23:02:16 +04:00
athlon64_clawhammer.h ../../cpu/cpuid.h
added two AMD CPUs to CPUDB
2011-12-29 18:23:22 +04:00
athlon64_venice.o: athlon64_venice.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
athlon64_venice.h ../../cpu/cpuid.h
turion64_tyler.o: turion64_tyler.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
turion64_tyler.h ../../cpu/cpuid.h
Major commit ! ------------ Implemented SVN nested paging support - the Virtual Box boots perfectly with Nested Paging guest ! A lot of code duplication was added for now - major cleanup will follow later. ! Added AMD Phenom X3 8650 (Toliman) configuration to the CPUDB - this configuration has Nested Paging enabled. Some CPUID modules rework done to enable Toliman configuration. Ckean up 'executable' attribute from all CPU source files.
2012-02-14 03:29:01 +04:00
phenomx3_8650_toliman.o: phenomx3_8650_toliman.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
phenomx3_8650_toliman.h ../../cpu/cpuid.h
forgot to add a file
2011-08-18 23:02:16 +04:00
atom_n270.o: atom_n270.@CPP_SUFFIX@ ../../bochs.h ../../config.h ../../osdep.h \
../../bx_debug/debug.h ../../config.h ../../osdep.h \
../../gui/siminterface.h ../../cpudb.h ../../gui/paramtree.h \
../../memory/memory.h ../../pc_system.h ../../gui/gui.h \
../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h ../crregs.h \
../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h ../icache.h \
../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
forgot to add a file
2011-08-18 23:02:16 +04:00
../../param_names.h atom_n270.h
core2_penryn_t9600.o: core2_penryn_t9600.@CPP_SUFFIX@ ../../bochs.h ../../config.h \
../../osdep.h ../../bx_debug/debug.h ../../config.h ../../osdep.h \
../../gui/siminterface.h ../../cpudb.h ../../gui/paramtree.h \
../../memory/memory.h ../../pc_system.h ../../gui/gui.h \
../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h ../crregs.h \
../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h ../icache.h \
../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
forgot to add a file
2011-08-18 23:02:16 +04:00
../../param_names.h core2_penryn_t9600.h ../../cpu/cpuid.h
core_duo_t2400_yonah.o: core_duo_t2400_yonah.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
forgot to add a file
2011-08-18 23:02:16 +04:00
../../param_names.h core_duo_t2400_yonah.h
corei7_sandy_bridge_2600K.o: corei7_sandy_bridge_2600K.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
forgot to add a file
2011-08-18 23:02:16 +04:00
../../param_names.h corei7_sandy_bridge_2600K.h ../../cpu/cpuid.h
Added Corei7 ivyBridge configuration to CPUDB
2012-05-07 16:31:22 +04:00
corei7_ivy_bridge_3770K.o: corei7_ivy_bridge_3770K.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
../../param_names.h corei7_ivy_bridge_3770K.h ../../cpu/cpuid.h
added to cpudb: Intel(R) Core(TM) i5 M 520 (Arrandale) - based on Westmere arch
2011-10-07 23:32:44 +04:00
corei5_arrandale_m520.o: corei5_arrandale_m520.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
added to cpudb: Intel(R) Core(TM) i5 M 520 (Arrandale) - based on Westmere arch
2011-10-07 23:32:44 +04:00
../../param_names.h corei5_arrandale_m520.h ../../cpu/cpuid.h
Added Corei5 750 (Lynnfield) configuration to the CPUDB
2012-01-03 00:59:02 +04:00
corei5_lynnfield_750.o: corei5_lynnfield_750.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
../../param_names.h corei5_lynnfield_750.h ../../cpu/cpuid.h
forgot to add a file
2011-08-18 23:02:16 +04:00
p2_klamath.o: p2_klamath.@CPP_SUFFIX@ ../../bochs.h ../../config.h ../../osdep.h \
../../bx_debug/debug.h ../../config.h ../../osdep.h \
../../gui/siminterface.h ../../cpudb.h ../../gui/paramtree.h \
../../memory/memory.h ../../pc_system.h ../../gui/gui.h \
../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h ../crregs.h \
../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h ../icache.h \
../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
forgot to add a file
2011-08-18 23:02:16 +04:00
p2_klamath.h
p3_katmai.o: p3_katmai.@CPP_SUFFIX@ ../../bochs.h ../../config.h ../../osdep.h \
../../bx_debug/debug.h ../../config.h ../../osdep.h \
../../gui/siminterface.h ../../cpudb.h ../../gui/paramtree.h \
../../memory/memory.h ../../pc_system.h ../../gui/gui.h \
../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h ../crregs.h \
../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h ../icache.h \
../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h p3_katmai.h
forgot to add a file
2011-08-18 23:02:16 +04:00
p4_prescott_celeron_336.o: p4_prescott_celeron_336.@CPP_SUFFIX@ ../../bochs.h \
../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h \
../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
../icache.h ../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
removed param_names.h include where not needed anymore
2012-01-07 21:54:19 +04:00
p4_prescott_celeron_336.h ../../cpu/cpuid.h
forgot to add a file
2011-08-18 23:02:16 +04:00
p4_willamette.o: p4_willamette.@CPP_SUFFIX@ ../../bochs.h ../../config.h \
../../osdep.h ../../bx_debug/debug.h ../../config.h ../../osdep.h \
../../gui/siminterface.h ../../cpudb.h ../../gui/paramtree.h \
../../memory/memory.h ../../pc_system.h ../../gui/gui.h \
../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h ../crregs.h \
../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h ../icache.h \
../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
removed param_names.h include where not needed anymore
2012-01-07 21:54:19 +04:00
p4_willamette.h
forgot to add a file
2011-08-18 23:02:16 +04:00
pentium_mmx.o: pentium_mmx.@CPP_SUFFIX@ ../../bochs.h ../../config.h ../../osdep.h \
../../bx_debug/debug.h ../../config.h ../../osdep.h \
../../gui/siminterface.h ../../cpudb.h ../../gui/paramtree.h \
../../memory/memory.h ../../pc_system.h ../../gui/gui.h \
../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h ../crregs.h \
../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h ../icache.h \
../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
forgot to add a file
2011-08-18 23:02:16 +04:00
pentium_mmx.h
- Fixed compilation issue with cpu-level=5 - SYSCALL/SYSRET: SYSCALL/SYSRET instructions are not supported in legacy mode for Intel processors - CPUID: CPUID.0x80000001.EDX[11] SYSCALL/SYSRET support should not be reported outside long64 mode if legacy mode SYSCALL/SYSRET is not supported - Added new CPUDB entry - AMD K6-2 3D proc3essor (Chomper)
2011-08-31 02:00:27 +04:00
amd_k6_2_chomper.o: amd_k6_2_chomper.@CPP_SUFFIX@ ../../bochs.h ../../config.h ../../osdep.h \
../../bx_debug/debug.h ../../config.h ../../osdep.h \
../../gui/siminterface.h ../../cpudb.h ../../gui/paramtree.h \
../../memory/memory.h ../../pc_system.h ../../gui/gui.h \
../../instrument/stubs/instrument.h ../cpu.h ../cpuid.h ../crregs.h \
../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h ../icache.h \
../apic.h ../i387.h ../../fpu/softfloat.h ../../fpu/tag_w.h \
implemented SVM emulation support for Bochs (incomplete yet) I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation. Of course SVM emulation is incomplete, completely untested and not expected to work. But someone could already take a look one the code and give some suggestions. Also looking for anybody with existing SVM kernels - as simple as possible - for testing. Status: - exceptions intercept is not implemented yet - IO intercept is not implemented yet - MSR intercept is not implemented yet - virtual interrupts are not implemented yet - CPUID is not implemented yet No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
2011-12-25 23:35:29 +04:00
../../fpu/status_w.h ../../fpu/control_w.h ../xmm.h ../vmx.h ../svm.h \
- Fixed compilation issue with cpu-level=5 - SYSCALL/SYSRET: SYSCALL/SYSRET instructions are not supported in legacy mode for Intel processors - CPUID: CPUID.0x80000001.EDX[11] SYSCALL/SYSRET support should not be reported outside long64 mode if legacy mode SYSCALL/SYSRET is not supported - Added new CPUDB entry - AMD K6-2 3D proc3essor (Chomper)
2011-08-31 02:00:27 +04:00
amd_k6_2_chomper.h
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