2009-04-05 22:16:29 +04:00
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/////////////////////////////////////////////////////////////////////////
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2011-02-25 00:54:04 +03:00
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// $Id$
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2002-09-13 19:53:22 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2011-07-07 00:01:18 +04:00
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// Copyright (C) 2001-2011 The Bochs Project
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2002-09-13 19:53:22 +04:00
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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2009-01-16 21:18:59 +03:00
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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2006-03-14 21:11:22 +03:00
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/////////////////////////////////////////////////////////////////////////
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2002-09-13 19:53:22 +04:00
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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2006-03-07 01:03:16 +03:00
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#include "cpu.h"
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2002-09-13 19:53:22 +04:00
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#define LOG_THIS BX_CPU_THIS_PTR
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2002-11-19 08:47:45 +03:00
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#if BX_SUPPORT_X86_64
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2002-09-13 19:53:22 +04:00
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2008-03-23 00:29:41 +03:00
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(1) BX_CPU_C::branch_near64(bxInstruction_c *i)
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{
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Bit64u new_RIP = RIP + (Bit32s) i->Id();
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if (! IsCanonical(new_RIP)) {
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BX_ERROR(("branch_near64: canonical RIP violation"));
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2010-03-14 18:51:27 +03:00
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exception(BX_GP_EXCEPTION, 0);
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2008-03-23 00:29:41 +03:00
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}
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2008-06-22 07:45:55 +04:00
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RIP = new_RIP;
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2011-08-21 18:31:08 +04:00
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#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS == 0
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2008-03-23 00:29:41 +03:00
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// assert magic async_event to stop trace execution
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BX_CPU_THIS_PTR async_event |= BX_ASYNC_EVENT_STOP_TRACE;
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#endif
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RETnear64_Iw(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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2008-05-10 22:10:53 +04:00
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Bit64u return_RIP = read_virtual_qword_64(BX_SEG_REG_SS, RSP);
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2002-09-13 19:53:22 +04:00
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2006-03-14 21:11:22 +03:00
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if (! IsCanonical(return_RIP)) {
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BX_ERROR(("RETnear64_Iw: canonical RIP violation"));
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2010-03-14 18:51:27 +03:00
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exception(BX_GP_EXCEPTION, 0);
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2005-04-17 22:54:54 +04:00
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}
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2002-09-13 19:53:22 +04:00
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RIP = return_RIP;
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2007-12-20 23:58:38 +03:00
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RSP += 8 + i->Iw();
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2007-11-24 17:22:34 +03:00
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2005-07-31 21:57:27 +04:00
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RETnear64(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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2008-05-10 22:10:53 +04:00
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Bit64u return_RIP = read_virtual_qword_64(BX_SEG_REG_SS, RSP);
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2002-09-13 19:53:22 +04:00
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2006-03-14 21:11:22 +03:00
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if (! IsCanonical(return_RIP)) {
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2008-05-09 01:04:03 +04:00
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BX_ERROR(("RETnear64: canonical RIP violation %08x%08x", GET32H(return_RIP), GET32L(return_RIP)));
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2010-03-14 18:51:27 +03:00
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exception(BX_GP_EXCEPTION, 0);
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2005-04-17 22:54:54 +04:00
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}
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2002-09-13 19:53:22 +04:00
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RIP = return_RIP;
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2007-12-17 00:40:44 +03:00
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RSP += 8;
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2007-11-24 17:22:34 +03:00
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2005-07-31 21:57:27 +04:00
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RETfar64_Iw(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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2005-07-11 00:32:32 +04:00
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BX_ASSERT(protected_mode());
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2005-03-20 21:01:01 +03:00
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2010-02-21 09:56:48 +03:00
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// return_protected is RSP safe
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2005-07-21 05:59:05 +04:00
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return_protected(i, i->Iw());
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2002-09-13 19:53:22 +04:00
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2003-02-13 18:04:11 +03:00
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET,
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2005-07-31 21:57:27 +04:00
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CALL_Jq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2005-11-12 01:02:42 +03:00
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Bit64u new_RIP = RIP + (Bit32s) i->Id();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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2008-08-16 19:32:44 +04:00
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/* push 64 bit EA of next instruction */
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2008-09-07 01:10:40 +04:00
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write_virtual_qword_64(BX_SEG_REG_SS, RSP-8, RIP);
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2008-08-16 19:32:44 +04:00
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2006-03-14 21:11:22 +03:00
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if (! IsCanonical(new_RIP)) {
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2007-10-22 21:41:41 +04:00
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BX_ERROR(("CALL_Jq: canonical RIP violation"));
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2010-03-14 18:51:27 +03:00
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exception(BX_GP_EXCEPTION, 0);
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2005-04-17 22:54:54 +04:00
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}
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2002-09-13 19:53:22 +04:00
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RIP = new_RIP;
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2008-09-07 01:10:40 +04:00
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RSP -= 8;
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2008-08-16 19:32:44 +04:00
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2005-07-31 21:57:27 +04:00
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CALL_EqR(bxInstruction_c *i)
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2008-01-12 19:40:38 +03:00
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{
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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2008-08-16 19:32:44 +04:00
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Bit64u new_RIP = BX_READ_64BIT_REG(i->rm());
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2008-01-12 19:40:38 +03:00
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2008-08-16 19:32:44 +04:00
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/* push 64 bit EA of next instruction */
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2008-09-07 01:10:40 +04:00
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write_virtual_qword_64(BX_SEG_REG_SS, RSP-8, RIP);
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2008-08-16 19:32:44 +04:00
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if (! IsCanonical(new_RIP))
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2005-04-17 22:54:54 +04:00
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{
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2006-06-10 02:29:07 +04:00
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BX_ERROR(("CALL_Eq: canonical RIP violation"));
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2010-03-14 18:51:27 +03:00
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exception(BX_GP_EXCEPTION, 0);
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2005-04-17 22:54:54 +04:00
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}
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2002-09-13 19:53:22 +04:00
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2008-08-16 19:32:44 +04:00
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RIP = new_RIP;
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2008-09-07 01:10:40 +04:00
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RSP -= 8;
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2002-09-13 19:53:22 +04:00
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2005-07-31 21:57:27 +04:00
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CALL64_Ep(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
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invalidate_prefetch_q();
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2002-09-13 19:53:22 +04:00
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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2008-08-08 13:22:49 +04:00
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-01-10 22:37:56 +03:00
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2002-09-13 19:53:22 +04:00
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/* pointer, segment address pair */
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2008-08-08 13:22:49 +04:00
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Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
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2010-10-19 02:19:45 +04:00
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Bit16u cs_raw = read_virtual_word_64(i->seg(), (eaddr+8) & i->asize_mask());
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2002-09-13 19:53:22 +04:00
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2005-07-20 05:26:47 +04:00
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BX_ASSERT(protected_mode());
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2002-09-13 19:53:22 +04:00
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2010-02-21 09:56:48 +03:00
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// call_protected is RSP safe for 64-bit mode
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2008-04-14 00:57:49 +04:00
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call_protected(i, cs_raw, op1_64);
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2007-11-24 17:22:34 +03:00
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2003-02-13 18:04:11 +03:00
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL,
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2005-07-31 21:57:27 +04:00
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JMP_Jq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2008-01-12 19:40:38 +03:00
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Bit64u new_RIP = RIP + (Bit32s) i->Id();
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if (! IsCanonical(new_RIP)) {
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BX_ERROR(("JMP_Jq: canonical RIP violation"));
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2010-03-14 18:51:27 +03:00
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exception(BX_GP_EXCEPTION, 0);
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2008-01-12 19:40:38 +03:00
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}
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RIP = new_RIP;
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2003-02-13 18:04:11 +03:00
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JO_Jq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2007-11-12 21:20:15 +03:00
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if (get_OF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2007-11-12 21:20:15 +03:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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2007-11-12 21:20:15 +03:00
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}
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2002-09-13 19:53:22 +04:00
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNO_Jq(bxInstruction_c *i)
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2007-11-12 21:20:15 +03:00
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{
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if (! get_OF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2005-04-17 22:54:54 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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2007-11-12 21:20:15 +03:00
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}
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2002-09-13 19:53:22 +04:00
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JB_Jq(bxInstruction_c *i)
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2007-11-12 21:20:15 +03:00
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{
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if (get_CF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_TRACE(i);
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2007-11-12 21:20:15 +03:00
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}
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2011-07-07 00:01:18 +04:00
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|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNB_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (! get_CF()) {
|
2005-04-18 01:51:59 +04:00
|
|
|
branch_near64(i);
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 00:26:10 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 00:26:10 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JZ_Jq(bxInstruction_c *i)
|
2007-11-12 00:26:10 +03:00
|
|
|
{
|
|
|
|
if (get_ZF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 00:26:10 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 00:26:10 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNZ_Jq(bxInstruction_c *i)
|
2007-11-12 00:26:10 +03:00
|
|
|
{
|
|
|
|
if (! get_ZF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JBE_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (get_CF() || get_ZF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNBE_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (! (get_CF() || get_ZF())) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JS_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (get_SF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNS_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (! get_SF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JP_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (get_PF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNP_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (! get_PF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JL_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (getB_SF() != getB_OF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNL_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (getB_SF() == getB_OF()) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JLE_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (get_ZF() || (getB_SF() != getB_OF())) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2007-11-12 21:20:15 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNLE_Jq(bxInstruction_c *i)
|
2007-11-12 21:20:15 +03:00
|
|
|
{
|
|
|
|
if (! get_ZF() && (getB_SF() == getB_OF())) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_NEXT_TRACE(i);
|
2005-04-17 22:54:54 +04:00
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
BX_NEXT_INSTR(i); // trace can continue over non-taken branch
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JMP_EqR(bxInstruction_c *i)
|
2008-01-12 19:40:38 +03:00
|
|
|
{
|
|
|
|
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
|
|
|
|
|
2005-04-17 22:54:54 +04:00
|
|
|
if (! IsCanonical(op1_64)) {
|
2006-06-10 02:29:07 +04:00
|
|
|
BX_ERROR(("JMP_Eq: canonical RIP violation"));
|
2010-03-14 18:51:27 +03:00
|
|
|
exception(BX_GP_EXCEPTION, 0);
|
2005-04-17 22:54:54 +04:00
|
|
|
}
|
2002-09-13 19:53:22 +04:00
|
|
|
|
|
|
|
RIP = op1_64;
|
|
|
|
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_TRACE(i);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
2005-04-18 01:51:59 +04:00
|
|
|
/* Far indirect jump */
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JMP64_Ep(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
2008-08-08 13:22:49 +04:00
|
|
|
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
2008-01-10 22:37:56 +03:00
|
|
|
|
2008-08-08 13:22:49 +04:00
|
|
|
Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
|
2010-10-19 02:19:45 +04:00
|
|
|
Bit16u cs_raw = read_virtual_word_64(i->seg(), (eaddr+8) & i->asize_mask());
|
2002-09-13 19:53:22 +04:00
|
|
|
|
2005-07-20 05:26:47 +04:00
|
|
|
BX_ASSERT(protected_mode());
|
2007-11-24 17:22:34 +03:00
|
|
|
|
2008-04-14 00:57:49 +04:00
|
|
|
jump_protected(i, cs_raw, op1_64);
|
2007-11-24 17:22:34 +03:00
|
|
|
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP,
|
2002-09-15 19:10:21 +04:00
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_TRACE(i);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::IRET64(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
I integrated my hacks to get Linux/x86-64 booting. To keep
these from interfering from a normal compile here's what I did.
In config.h.in (which will generate config.h after a configure),
I added a #define called KPL64Hacks:
#define KPL64Hacks
*After* running configure, you must set this by hand. It will
default to off, so you won't get my hacks in a normal compile.
This will go away soon. There is also a macro just after that
called BailBigRSP(). You don't need to enabled that, but you
can. In many of the instructions which seemed like they could
be hit by the fetchdecode64() process, but which also touched
EIP/ESP, I inserted a macro. Usually this macro expands to nothing.
If you like, you can enabled it, and it will panic if it finds
the upper bits of RIP/RSP set. This helped me find bugs.
Also, I cleaned up the emulation in ctrl_xfer{8,16,32}.cc.
There were some really old legacy code snippets which directly
accessed operands on the stack with access_linear. Lots of
ugly code instead of just pop_32() etc. Cleaning those up,
minimized the number of instructions which directly manipulate
the stack pointer, which should help in refining 64-bit support.
2002-09-24 04:44:56 +04:00
|
|
|
invalidate_prefetch_q();
|
|
|
|
|
2009-02-03 22:17:15 +03:00
|
|
|
#if BX_SUPPORT_VMX
|
|
|
|
if (!BX_CPU_THIS_PTR in_vmx_guest || !VMEXIT(VMX_VM_EXEC_CTRL1_NMI_VMEXIT))
|
|
|
|
#endif
|
|
|
|
BX_CPU_THIS_PTR disable_NMI = 0;
|
|
|
|
|
2002-09-13 19:53:22 +04:00
|
|
|
#if BX_DEBUGGER
|
|
|
|
BX_CPU_THIS_PTR show_flag |= Flag_iret;
|
|
|
|
#endif
|
|
|
|
|
2009-03-10 19:28:01 +03:00
|
|
|
BX_ASSERT(long_mode());
|
2007-11-24 17:22:34 +03:00
|
|
|
|
|
|
|
long_iret(i);
|
|
|
|
|
2003-02-13 18:04:11 +03:00
|
|
|
BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_IRET,
|
2005-07-31 21:57:27 +04:00
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_TRACE(i);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
2002-09-27 11:01:02 +04:00
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JRCXZ_Jb(bxInstruction_c *i)
|
2002-09-27 11:01:02 +04:00
|
|
|
{
|
2008-06-23 19:58:22 +04:00
|
|
|
Bit64u temp_RCX;
|
|
|
|
|
|
|
|
if (i->as64L())
|
|
|
|
temp_RCX = RCX;
|
|
|
|
else
|
|
|
|
temp_RCX = ECX;
|
|
|
|
|
|
|
|
if (temp_RCX == 0) {
|
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2005-04-17 22:54:54 +04:00
|
|
|
}
|
2008-06-23 19:58:22 +04:00
|
|
|
#if BX_INSTRUMENTATION
|
2005-04-17 22:54:54 +04:00
|
|
|
else {
|
2008-06-23 19:58:22 +04:00
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
2008-06-23 19:58:22 +04:00
|
|
|
#endif
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_TRACE(i);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
|
2007-12-21 20:30:49 +03:00
|
|
|
//
|
|
|
|
// There is some weirdness in LOOP instructions definition. If an exception
|
|
|
|
// was generated during the instruction execution (for example #GP fault
|
|
|
|
// because EIP was beyond CS segment limits) CPU state should restore the
|
2008-02-03 00:46:54 +03:00
|
|
|
// state prior to instruction execution.
|
2007-12-21 20:30:49 +03:00
|
|
|
//
|
2008-06-22 07:45:55 +04:00
|
|
|
// The final point that we are not allowed to decrement RCX register before
|
2007-12-21 20:30:49 +03:00
|
|
|
// it is known that no exceptions can happen.
|
|
|
|
//
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOOPNE64_Jb(bxInstruction_c *i)
|
2002-09-27 11:01:02 +04:00
|
|
|
{
|
2005-04-18 01:51:59 +04:00
|
|
|
if (i->as64L()) {
|
2007-12-21 20:30:49 +03:00
|
|
|
Bit64u count = RCX;
|
|
|
|
|
|
|
|
if (((--count) != 0) && (get_ZF()==0)) {
|
2005-04-18 01:51:59 +04:00
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
2007-12-21 20:30:49 +03:00
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
RCX = count;
|
2005-04-17 22:54:54 +04:00
|
|
|
}
|
|
|
|
else {
|
2007-12-21 20:30:49 +03:00
|
|
|
Bit32u count = ECX;
|
|
|
|
|
|
|
|
if (((--count) != 0) && (get_ZF()==0)) {
|
2005-04-18 01:51:59 +04:00
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
|
|
}
|
2007-12-21 20:30:49 +03:00
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
}
|
|
|
|
#endif
|
2005-04-18 01:51:59 +04:00
|
|
|
|
2007-12-21 20:30:49 +03:00
|
|
|
RCX = count;
|
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_TRACE(i);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOOPE64_Jb(bxInstruction_c *i)
|
2002-09-27 11:01:02 +04:00
|
|
|
{
|
2005-04-18 01:51:59 +04:00
|
|
|
if (i->as64L()) {
|
2007-12-21 20:30:49 +03:00
|
|
|
Bit64u count = RCX;
|
|
|
|
|
|
|
|
if (((--count) != 0) && get_ZF()) {
|
2005-04-18 01:51:59 +04:00
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
2007-12-21 20:30:49 +03:00
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
RCX = count;
|
2005-04-17 22:54:54 +04:00
|
|
|
}
|
|
|
|
else {
|
2007-12-21 20:30:49 +03:00
|
|
|
Bit32u count = ECX;
|
|
|
|
|
|
|
|
if (((--count) != 0) && get_ZF()) {
|
2005-04-18 01:51:59 +04:00
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
|
|
}
|
2007-12-21 20:30:49 +03:00
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
}
|
|
|
|
#endif
|
2005-04-18 01:51:59 +04:00
|
|
|
|
2007-12-21 20:30:49 +03:00
|
|
|
RCX = count;
|
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_TRACE(i);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOOP64_Jb(bxInstruction_c *i)
|
2002-09-27 11:01:02 +04:00
|
|
|
{
|
2005-04-18 01:51:59 +04:00
|
|
|
if (i->as64L()) {
|
2007-12-21 20:30:49 +03:00
|
|
|
Bit64u count = RCX;
|
|
|
|
|
|
|
|
if ((--count) != 0) {
|
2005-04-18 01:51:59 +04:00
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
2007-12-21 20:30:49 +03:00
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
RCX = count;
|
2005-04-17 22:54:54 +04:00
|
|
|
}
|
|
|
|
else {
|
2007-12-21 20:30:49 +03:00
|
|
|
Bit32u count = ECX;
|
|
|
|
|
|
|
|
if ((--count) != 0) {
|
2005-04-18 01:51:59 +04:00
|
|
|
branch_near64(i);
|
|
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
|
|
}
|
2007-12-21 20:30:49 +03:00
|
|
|
#if BX_INSTRUMENTATION
|
|
|
|
else {
|
|
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
|
|
}
|
|
|
|
#endif
|
2005-04-18 01:51:59 +04:00
|
|
|
|
2007-12-21 20:30:49 +03:00
|
|
|
RCX = count;
|
|
|
|
}
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_TRACE(i);
|
2002-09-27 11:01:02 +04:00
|
|
|
}
|
2003-12-30 00:47:36 +03:00
|
|
|
|
2002-11-19 08:47:45 +03:00
|
|
|
#endif /* if BX_SUPPORT_X86_64 */
|