116 lines
3.5 KiB
C
116 lines
3.5 KiB
C
/**
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* @file modules/i965.c
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* @brief Bitbanged modeset driver for a ThinkPad T410's Intel graphics.
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* @package x86_64
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*
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* This is NOT a viable driver for Intel graphics devices. It assumes Vesa
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* has already properly set up the display pipeline with the needed timings
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* for the panel on one particular model of Lenovo ThinkPad and then sets
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* a handful of registers to get the framebuffer into the right resolution.
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*
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* @copyright
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* This file is part of ToaruOS and is released under the terms
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* of the NCSA / University of Illinois License - see LICENSE.md
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* Copyright (C) 2021 K. Lange
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*/
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#include <errno.h>
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#include <kernel/printf.h>
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#include <kernel/types.h>
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#include <kernel/video.h>
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#include <kernel/pci.h>
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#include <kernel/mmu.h>
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#include <kernel/vfs.h>
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#include <kernel/args.h>
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#include <kernel/module.h>
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#define REG_PIPEASRC 0x6001C
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#define REG_PIPEACONF 0x70008
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#define PIPEACONF_ENABLE (1 << 31)
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#define PIPEACONF_STATE (1 << 30)
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#define REG_DSPALINOFF 0x70184
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#define REG_DSPASTRIDE 0x70188
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#define REG_DSPASURF 0x7019c
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extern uint32_t lfb_resolution_s;
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extern fs_node_t * lfb_device;
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static uintptr_t ctrl_regs = 0;
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static uint32_t i965_mmio_read(uint32_t reg) {
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return *(volatile uint32_t*)(ctrl_regs + reg);
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}
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static void i965_mmio_write(uint32_t reg, uint32_t val) {
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*(volatile uint32_t*)(ctrl_regs + reg) = val;
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}
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static void split(uint32_t val, uint32_t * a, uint32_t * b) {
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*a = (val & 0xFFFF) + 1;
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*b = (val >> 16) + 1;
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}
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static void i965_modeset(uint16_t x, uint16_t y) {
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/* Disable pipe A while we update source size */
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uint32_t pipe = i965_mmio_read(REG_PIPEACONF);
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i965_mmio_write(REG_PIPEACONF, pipe & ~PIPEACONF_ENABLE);
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while (i965_mmio_read(REG_PIPEACONF) & PIPEACONF_STATE);
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/* Set source size */
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i965_mmio_write(REG_PIPEASRC, ((x - 1) << 16) | (y - 1));
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/* Re-enable pipe */
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pipe = i965_mmio_read(REG_PIPEACONF);
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i965_mmio_write(REG_PIPEACONF, pipe | PIPEACONF_ENABLE);
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while (!(i965_mmio_read(REG_PIPEACONF) & PIPEACONF_STATE));
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/* Keep the plane enabled while we update stride value */
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i965_mmio_write(REG_DSPALINOFF, 0); /* offset to default of 0 */
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i965_mmio_write(REG_DSPASTRIDE, x * 4); /* stride to 4 x width */
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i965_mmio_write(REG_DSPASURF, 0); /* write to surface address triggers change; use default of 0 */
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/* Update the values we expose to userspace. */
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lfb_resolution_x = x;
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lfb_resolution_y = y;
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lfb_resolution_b = 32;
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lfb_resolution_s = i965_mmio_read(REG_DSPASTRIDE);
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lfb_device->length = lfb_resolution_s * lfb_resolution_y;
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}
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static void setup_framebuffer(uint32_t pcidev) {
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/* Map BAR space for the control registers */
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uint32_t ctrl_space = pci_read_field(pcidev, PCI_BAR0, 4);
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pci_write_field(pcidev, PCI_BAR0, 4, 0xFFFFFFFF);
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uint32_t ctrl_size = pci_read_field(pcidev, PCI_BAR0, 4);
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ctrl_size = ~(ctrl_size & -15) + 1;
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pci_write_field(pcidev, PCI_BAR0, 4, ctrl_space);
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ctrl_space &= 0xFFFFFF00;
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ctrl_regs = (uintptr_t)mmu_map_mmio_region(ctrl_space, ctrl_size);
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lfb_resolution_impl = i965_modeset;
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lfb_set_resolution(1440,900);
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}
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static void find_intel(uint32_t device, uint16_t v, uint16_t d, void * extra) {
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if (v == 0x8086 && d == 0x0046) {
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setup_framebuffer(device);
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}
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}
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static int i965_install(int argc, char * argv[]) {
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if (args_present("noi965")) return -ENODEV;
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if (!lfb_resolution_x) return -ENODEV;
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pci_scan(find_intel, -1, NULL);
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return 0;
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}
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static int fini(void) {
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return 0;
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}
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struct Module metadata = {
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.name = "i965",
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.init = i965_install,
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.fini = fini,
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};
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