318 lines
9.7 KiB
C
318 lines
9.7 KiB
C
/**
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* @file kernel/audio/ac97.c
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* @brief Driver for the Intel AC'97.
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*
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* Simple PCM interface for the AC'97 codec when used with the
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* ICH hardware interface. There are other hardware interfaces
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* that use this codec and this driver could probably be ported
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* to them.
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*
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* Note that the audio subsystem is intended to be non-blocking
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* so that buffer filling can be done directly in interrupt handlers.
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*
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* @see http://www.intel.com/design/chipsets/manuals/29802801.pdf
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*
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* @copyright
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* This file is part of ToaruOS and is released under the terms
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* of the NCSA / University of Illinois License - see LICENSE.md
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* Copyright (C) 2015 Michael Gerow
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* Copyright (C) 2015-2021 K. Lange
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*/
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#include <kernel/types.h>
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#include <kernel/string.h>
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#include <kernel/printf.h>
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#include <kernel/pci.h>
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#include <kernel/process.h>
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#include <kernel/mmu.h>
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#include <kernel/list.h>
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#include <kernel/mod/snd.h>
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#include <kernel/arch/x86_64/ports.h>
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#include <kernel/arch/x86_64/regs.h>
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#include <kernel/arch/x86_64/irq.h>
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/* Utility macros */
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#define N_ELEMENTS(arr) (sizeof(arr) / sizeof((arr)[0]))
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/* BARs! */
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#define AC97_NAMBAR 0x10 /* Native Audio Mixer Base Address Register */
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#define AC97_NABMBAR 0x14 /* Native Audio Bus Mastering Base Address Register */
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/* Bus mastering IO port offsets */
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#define AC97_PO_BDBAR 0x10 /* PCM out buffer descriptor BAR */
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#define AC97_PO_CIV 0x14 /* PCM out current index value */
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#define AC97_PO_LVI 0x15 /* PCM out last valid index */
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#define AC97_PO_SR 0x16 /* PCM out status register */
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#define AC97_PO_PICB 0x18 /* PCM out position in current buffer register */
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#define AC97_PO_CR 0x1B /* PCM out control register */
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/* Bus mastering misc */
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/* Buffer descriptor list constants */
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#define AC97_BDL_LEN 32 /* Buffer descriptor list length */
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#define AC97_BDL_BUFFER_LEN 0x1000 /* Length of buffer in BDL */
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#define AC97_CL_GET_LENGTH(cl) ((cl) & 0xFFFF) /* Decode length from cl */
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#define AC97_CL_SET_LENGTH(cl, v) ((cl) = (v) & 0xFFFF) /* Encode length to cl */
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#define AC97_CL_BUP ((uint32_t)1 << 30) /* Buffer underrun policy in cl */
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#define AC97_CL_IOC ((uint32_t)1 << 31) /* Interrupt on completion flag in cl */
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/* PCM out control register flags */
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#define AC97_X_CR_RPBM (1 << 0) /* Run/pause bus master */
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#define AC97_X_CR_RR (1 << 1) /* Reset registers */
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#define AC97_X_CR_LVBIE (1 << 2) /* Last valid buffer interrupt enable */
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#define AC97_X_CR_FEIE (1 << 3) /* FIFO error interrupt enable */
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#define AC97_X_CR_IOCE (1 << 4) /* Interrupt on completion enable */
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/* Status register flags */
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#define AC97_X_SR_DCH (1 << 0) /* DMA controller halted */
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#define AC97_X_SR_CELV (1 << 1) /* Current equals last valid */
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#define AC97_X_SR_LVBCI (1 << 2) /* Last valid buffer completion interrupt */
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#define AC97_X_SR_BCIS (1 << 3) /* Buffer completion interrupt status */
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#define AC97_X_SR_FIFOE (1 << 4) /* FIFO error */
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/* Mixer IO port offsets */
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#define AC97_RESET 0x00
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#define AC97_MASTER_VOLUME 0x02
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#define AC97_AUX_OUT_VOLUME 0x04
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#define AC97_MONO_VOLUME 0x06
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#define AC97_PCM_OUT_VOLUME 0x18
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/* snd values */
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#define AC97_SND_NAME "Intel AC'97"
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#define AC97_PLAYBACK_SPEED 48000
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#define AC97_PLAYBACK_FORMAT SND_FORMAT_L16SLE
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/* An entry in a buffer dscriptor list */
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typedef struct {
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uint32_t pointer; /* Pointer to buffer */
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uint32_t cl; /* Control values and buffer length */
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} __attribute__((packed)) ac97_bdl_entry_t;
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typedef struct {
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uint32_t pci_device;
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uint16_t nabmbar; /* Native audio bus mastring BAR */
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uint16_t nambar; /* Native audio mixing BAR */
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size_t irq; /* This ac97's irq */
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uint8_t lvi; /* The currently set last valid index */
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uint8_t bits; /* How many bits of volume are supported (5 or 6) */
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ac97_bdl_entry_t * bdl; /* Buffer descriptor list */
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uint16_t * bufs[AC97_BDL_LEN]; /* Virtual addresses for buffers in BDL */
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uint32_t bdl_p;
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uint32_t mask;
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} ac97_device_t;
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static ac97_device_t _device;
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#define AC97_KNOB_PCM_OUT (SND_KNOB_VENDOR + 0)
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static snd_knob_t _knobs[] = {
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{
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"Master",
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SND_KNOB_MASTER
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},
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{
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"PCM Out",
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SND_KNOB_VENDOR + 0
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}
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};
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static int ac97_mixer_read(uint32_t knob_id, uint32_t *val);
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static int ac97_mixer_write(uint32_t knob_id, uint32_t val);
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static snd_device_t _snd = {
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.name = AC97_SND_NAME,
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.device = &_device,
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.playback_speed = AC97_PLAYBACK_SPEED,
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.playback_format = AC97_PLAYBACK_FORMAT,
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.knobs = _knobs,
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.num_knobs = N_ELEMENTS(_knobs),
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.mixer_read = ac97_mixer_read,
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.mixer_write = ac97_mixer_write,
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};
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/*
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* This could be unnecessary if we instead allocate just two buffers and make
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* the ac97 think there are more.
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*/
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static void find_ac97(uint32_t device, uint16_t vendorid, uint16_t deviceid, void * extra) {
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ac97_device_t * ac97 = extra;
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if ((vendorid == 0x8086) && (deviceid == 0x2415)) {
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ac97->pci_device = device;
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}
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}
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#define DIVISION 0x1000
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static int ac97_irq_handler(struct regs * regs) {
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uint16_t sr = inports(_device.nabmbar + AC97_PO_SR);
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if (sr & AC97_X_SR_BCIS) {
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uint16_t current_buffer = inportb(_device.nabmbar + AC97_PO_CIV);
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uint16_t last_valid = ((current_buffer+2) & (AC97_BDL_LEN-1));
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snd_request_buf(&_snd, 0x1000, (uint8_t *)_device.bufs[last_valid]);
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outportb(_device.nabmbar + AC97_PO_LVI, last_valid);
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snd_request_buf(&_snd, 0x1000, (uint8_t *)_device.bufs[last_valid]+0x1000);
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outports(_device.nabmbar + AC97_PO_SR, AC97_X_SR_BCIS);
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} else if (sr & AC97_X_SR_LVBCI) {
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outports(_device.nabmbar + AC97_PO_SR, AC97_X_SR_LVBCI);
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} else if (sr & AC97_X_SR_FIFOE) {
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outports(_device.nabmbar + AC97_PO_SR, AC97_X_SR_FIFOE);
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} else {
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return 0;
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}
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irq_ack(_device.irq);
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return 1;
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}
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/* Currently we just assume right and left are the same */
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static int ac97_mixer_read(uint32_t knob_id, uint32_t *val) {
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uint16_t tmp;
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switch (knob_id) {
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case SND_KNOB_MASTER:
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tmp = inports(_device.nambar + AC97_MASTER_VOLUME);
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if (tmp == 0x8000) {
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*val = 0;
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} else {
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/* 6 bit value */
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*val = (tmp & _device.mask) << (sizeof(*val) * 8 - _device.bits);
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*val = ~*val;
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*val &= (uint32_t)_device.mask << (sizeof(*val) * 8 - _device.bits);
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}
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break;
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case AC97_KNOB_PCM_OUT:
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tmp = inports(_device.nambar + AC97_PCM_OUT_VOLUME);
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if (tmp == 0x8000) {
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*val = 0;
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} else {
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/* 5 bit value */
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*val = (tmp & 0x1f) << (sizeof(*val) * 8 - 5);
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*val = ~*val;
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*val &= 0x1f << (sizeof(*val) * 8 - 5);
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}
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break;
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default:
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return -1;
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}
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return 0;
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}
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static int ac97_mixer_write(uint32_t knob_id, uint32_t val) {
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switch (knob_id) {
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case SND_KNOB_MASTER: {
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uint16_t encoded;
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if (val == 0x0) {
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encoded = 0x8000;
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} else {
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/* 0 is the highest volume */
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val = ~val;
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/* 6 bit value */
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val >>= (sizeof(val) * 8 - _device.bits);
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encoded = (val & 0xFF) | (val << 8);
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}
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outports(_device.nambar + AC97_MASTER_VOLUME, encoded);
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break;
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}
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case AC97_KNOB_PCM_OUT: {
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uint16_t encoded;
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if (val == 0x0) {
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encoded = 0x8000;
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} else {
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/* 0 is the highest volume */
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val = ~val;
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/* 5 bit value */
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val >>= (sizeof(val) * 8 - 5);
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encoded = (val & 0xFF) | (val << 8);
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}
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outports(_device.nambar + AC97_PCM_OUT_VOLUME, encoded);
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break;
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}
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default:
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return -1;
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}
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return 0;
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}
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void ac97_install(void) {
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//debug_print(NOTICE, "Initializing AC97");
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pci_scan(&find_ac97, -1, &_device);
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if (!_device.pci_device) {
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return;
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}
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_device.nabmbar = pci_read_field(_device.pci_device, AC97_NABMBAR, 2) & ((uint32_t) -1) << 1;
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_device.nambar = pci_read_field(_device.pci_device, PCI_BAR0, 4) & ((uint32_t) -1) << 1;
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_device.irq = pci_get_interrupt(_device.pci_device);
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//printf("device wants irq %zd\n", _device.irq);
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irq_install_handler(_device.irq, ac97_irq_handler, "ac97");
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/* Enable all matter of interrupts */
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outportb(_device.nabmbar + AC97_PO_CR, AC97_X_CR_FEIE | AC97_X_CR_IOCE);
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/* Enable bus mastering and disable memory mapped space */
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pci_write_field(_device.pci_device, PCI_COMMAND, 2, 0x5);
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/* Default the PCM output to full volume. */
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outports(_device.nambar + AC97_PCM_OUT_VOLUME, 0x0000);
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/* Allocate our BDL and our buffers */
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_device.bdl_p = mmu_allocate_a_frame() << 12;
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_device.bdl = mmu_map_from_physical(_device.bdl_p);
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memset(_device.bdl, 0, AC97_BDL_LEN * sizeof(*_device.bdl));
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for (int i = 0; i < AC97_BDL_LEN; i++) {
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_device.bdl[i].pointer = mmu_allocate_n_frames(2) << 12;
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_device.bufs[i] = mmu_map_from_physical(_device.bdl[i].pointer);
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memset(_device.bufs[i], 0, AC97_BDL_BUFFER_LEN * sizeof(*_device.bufs[0]));
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AC97_CL_SET_LENGTH(_device.bdl[i].cl, AC97_BDL_BUFFER_LEN);
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/* Set all buffers to interrupt */
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_device.bdl[i].cl |= AC97_CL_IOC;
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}
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/* Tell the ac97 where our BDL is */
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outportl(_device.nabmbar + AC97_PO_BDBAR, _device.bdl_p);
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/* Set the LVI to be the last index */
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_device.lvi = 2;
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outportb(_device.nabmbar + AC97_PO_LVI, _device.lvi);
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/* detect whether device supports MSB */
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outports(_device.nambar + AC97_MASTER_VOLUME, 0x2020);
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uint16_t t = inports(_device.nambar + AC97_MASTER_VOLUME) & 0x1f;
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if (t == 0x1f) {
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//debug_print(WARNING, "This device only supports 5 bits of audio volume.");
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_device.bits = 5;
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_device.mask = 0x1f;
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} else {
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_device.bits = 6;
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_device.mask = 0x3f;
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}
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outports(_device.nambar + AC97_MASTER_VOLUME, 0x0000);
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snd_register(&_snd);
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/* Start things playing */
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outportb(_device.nabmbar + AC97_PO_CR, inportb(_device.nabmbar + AC97_PO_CR) | AC97_X_CR_RPBM);
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//debug_print(NOTICE, "AC97 initialized successfully");
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return;
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}
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#if 0
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static int fini(void) {
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snd_unregister(&_snd);
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free(_device.bdl);
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for (int i = 0; i < AC97_BDL_LEN; i++) {
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free(_device.bufs[i]);
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}
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return 0;
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}
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#endif
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