272 lines
4.1 KiB
ArmAsm
272 lines
4.1 KiB
ArmAsm
; ToAruOS Start Up / Entry Point
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; vim:syntax=nasm
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; vim:tabstop=4
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;
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; Copyright 2011 ToAruOS Kernel Development Group
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; See main.c for licensing terms (NCSA)
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;
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BITS 32
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ALIGN 4
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mboot:
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; Multiboot headers:
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; Page aligned loading, please
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MULTIBOOT_PAGE_ALIGN equ 1<<0
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; We require memory information
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MULTIBOOT_MEMORY_INFO equ 1<<1
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; We would really, really like graphics...
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MULTIBOOT_USE_GFX equ 1<<2
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; We are multiboot compatible!
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MULTIBOOT_HEADER_MAGIC equ 0x1BADB002
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; Load up those flags.
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MULTIBOOT_HEADER_FLAGS equ MULTIBOOT_PAGE_ALIGN | MULTIBOOT_MEMORY_INFO | MULTIBOOT_USE_GFX
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; Checksum the result
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MULTIBOOT_CHECKSUM equ -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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; Load the headers into the binary image.
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dd MULTIBOOT_HEADER_MAGIC
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dd MULTIBOOT_HEADER_FLAGS
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dd MULTIBOOT_CHECKSUM
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dd 0x00000000 ; header_addr
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dd 0x00000000 ; load_addr
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dd 0x00000000 ; load_end_addr
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dd 0x00000000 ; bss_end_addr
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dd 0x00000000 ; entry_addr
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; Graphics requests
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dd 0x00000000 ; 0 = linear graphics
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dd 0
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dd 0
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dd 32 ; Set me to 32 or else.
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; Some external references.
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extern code, bss, end
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; Main entrypoint
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global start
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start:
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; Set up stack pointer.
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mov esp, 0x7FFFF
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push esp
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; Push the incoming mulitboot headers
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push eax ; Header magic
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push ebx ; Header pointer
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; Disable interrupts
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cli
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; Call the C entry
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extern main
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call main
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jmp $
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; Global Descriptor Table
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global gdt_flush
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extern gp
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gdt_flush:
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; Load the GDT
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lgdt [gp]
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; Flush the values to 0x10
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mov ax, 0x10
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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jmp 0x08:flush2
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flush2:
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ret
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; Interrupt Descriptor Table
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global idt_load
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extern idtp
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idt_load:
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lidt [idtp]
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ret
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; Return to Userspace (from thread creation)
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global return_to_userspace
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return_to_userspace:
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pop gs
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pop fs
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pop es
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pop ds
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popa
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add esp, 8
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iret
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; Interrupt Service Routines
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%macro ISR_NOERR 1
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global _isr%1
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_isr%1:
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cli
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push byte 0
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push byte %1
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jmp isr_common_stub
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%endmacro
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%macro ISR_ERR 1
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global _isr%1
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_isr%1:
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cli
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push byte %1
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jmp isr_common_stub
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%endmacro
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%macro IRQ_ENTRY 2
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global _irq%1
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_irq%1:
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cli
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push byte 0
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push byte %2
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jmp irq_common_stub
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%endmacro
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; Standard X86 interrupt service routines
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ISR_NOERR 0
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ISR_NOERR 1
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ISR_NOERR 2
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ISR_NOERR 3
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ISR_NOERR 4
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ISR_NOERR 5
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ISR_NOERR 6
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ISR_NOERR 7
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ISR_ERR 8
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ISR_NOERR 9
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ISR_ERR 10
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ISR_ERR 11
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ISR_ERR 12
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ISR_ERR 13
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ISR_ERR 14
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ISR_NOERR 15
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ISR_NOERR 16
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ISR_NOERR 17
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ISR_NOERR 18
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ISR_NOERR 19
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ISR_NOERR 20
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ISR_NOERR 21
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ISR_NOERR 22
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ISR_NOERR 23
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ISR_NOERR 24
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ISR_NOERR 25
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ISR_NOERR 26
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ISR_NOERR 27
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ISR_NOERR 28
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ISR_NOERR 29
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ISR_NOERR 30
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ISR_NOERR 31
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ISR_NOERR 127
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; Interrupt Requests
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IRQ_ENTRY 0, 32
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IRQ_ENTRY 1, 33
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IRQ_ENTRY 2, 34
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IRQ_ENTRY 3, 35
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IRQ_ENTRY 4, 36
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IRQ_ENTRY 5, 37
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IRQ_ENTRY 6, 38
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IRQ_ENTRY 7, 39
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IRQ_ENTRY 8, 40
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IRQ_ENTRY 9, 41
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IRQ_ENTRY 10, 42
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IRQ_ENTRY 11, 43
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IRQ_ENTRY 12, 44
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IRQ_ENTRY 13, 45
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IRQ_ENTRY 14, 46
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IRQ_ENTRY 15, 47
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; Interrupt handlers
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extern fault_handler
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isr_common_stub:
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pusha
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push ds
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push es
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push fs
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push gs
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mov ax, 0x10
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov eax, esp
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push eax
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; Call the C kernel fault handler
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mov eax, fault_handler
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call eax
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pop eax
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pop gs
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pop fs
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pop es
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pop ds
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popa
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add esp, 8
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iret
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extern irq_handler
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irq_common_stub:
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pusha
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push ds
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push es
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push fs
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push gs
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mov ax, 0x10
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov eax, esp
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push eax
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; Call the C kernel hardware interrupt handler
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mov eax, irq_handler
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call eax
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pop eax
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pop gs
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pop fs
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pop es
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pop ds
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popa
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add esp, 8
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iret
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global read_eip
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read_eip: ; Clever girl
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pop eax
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jmp eax
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global copy_page_physical
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copy_page_physical:
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push ebx
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pushf
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cli
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mov ebx, [esp+12]
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mov ecx, [esp+16]
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mov edx, cr0
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and edx, 0x7FFFFFFF
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mov cr0, edx
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mov edx, 0x400
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.page_loop:
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mov eax, [ebx]
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mov [ecx], eax
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add ebx, 4
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add ecx, 4
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dec edx
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jnz .page_loop
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mov edx, cr0
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or edx, 0x80000000
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mov cr0, edx
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popf
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pop ebx
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ret
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global tss_flush
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tss_flush:
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mov ax, 0x2B
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ltr ax
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ret
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; BSS Section
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SECTION .bss
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resb 8192 ; 8KB of memory reserved
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