diff --git a/kernel/arch/x86_64/pit.c b/kernel/arch/x86_64/pit.c index 3dcb9d49..11ff388b 100644 --- a/kernel/arch/x86_64/pit.c +++ b/kernel/arch/x86_64/pit.c @@ -3,27 +3,13 @@ * @author K. Lange * @brief Legacy x86 Programmable Interrupt Timer * - * Trusty old timer chip that still exists, and is still somehow - * the only reliable to measure subsecond wallclock times. - * - * We continue to the use the PIT as the BSP timer interrupt source, - * and we also use it as part of timer calibration for TSCs, which - * is then used to calibrate LAPIC timers. - * - * Our main tick rate is 100Hz. We use periodic modes, so this - * doesn't equate to 1/100s worth of CPU time per process before - * it gets switched out, rather something less usually, but it - * does mean we don't need to care about resetting timers or - * even knowing which timer triggered a userspace pre-emption, since - * APs use their LAPIC timers (which we also try to set to 100Hz). - * - * The actual time doesn't matter, as we don't use the PIT as a real - * timing source after initialization of the TSC. 100Hz just feels nice? + * The PIT is used as a fallback preempt source if the LAPIC can + * not be configured. The preempt signal is 100Hz. * * @copyright * This file is part of ToaruOS and is released under the terms * of the NCSA / University of Illinois License - see LICENSE.md - * Copyright (C) 2021 K. Lange + * Copyright (C) 2021-2024 K. Lange */ #include #include