aarch64: be more flexible about where the kernel is physically
This commit is contained in:
K. Lange
parent
097662ef3d
commit
e1e66bf6cd
@ -18,6 +18,9 @@
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#include <kernel/printf.h>
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#include <kernel/elf.h>
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#define QEMU_DTB_BASE 0x40000000UL
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#define KERNEL_PHYS_BASE 0x41000000UL
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static uint32_t swizzle(uint32_t from) {
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uint8_t a = from >> 24;
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uint8_t b = from >> 16;
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@ -153,7 +156,7 @@ static uint32_t * find_subnode(uint32_t * node, char * strings, const char * nam
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}
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static uint32_t * find_node_int(const char * name, int (*cmp)(const char*,const char*)) {
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uintptr_t addr = 0x40000000;
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uintptr_t addr = QEMU_DTB_BASE;
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struct fdt_header * fdt = (struct fdt_header*)addr;
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char * dtb_strings = (char *)(addr + swizzle(fdt->off_dt_strings));
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uint32_t * dtb_struct = (uint32_t *)(addr + swizzle(fdt->off_dt_struct));
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@ -202,7 +205,7 @@ static uint32_t * node_find_property_int(uint32_t * node, char * strings, const
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}
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static uint32_t * node_find_property(uint32_t * node, const char * property) {
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uintptr_t addr = 0x40000000;
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uintptr_t addr = QEMU_DTB_BASE;
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struct fdt_header * fdt = (struct fdt_header*)addr;
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char * dtb_strings = (char *)(addr + swizzle(fdt->off_dt_strings));
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uint32_t * out = NULL;
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@ -228,6 +231,7 @@ static struct BaseTables {
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uintptr_t l0_base[512];
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uintptr_t l1_high_gbs[512];
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uintptr_t l1_low_gbs[512];
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uintptr_t l2_kernel[512];
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} _baseTables __attribute__((aligned(4096)));
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#define PTE_VALID (1UL << 0)
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@ -267,7 +271,7 @@ static void bootstub_mmu_init(void) {
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_baseTables.l0_base[511] = (uintptr_t)&_baseTables.l1_high_gbs | PTE_VALID | PTE_TABLE | PTE_AF;
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/* Mapping for us */
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_baseTables.l1_low_gbs[1] = 0x40000000 | PTE_VALID | PTE_AF | PTE_SH_A | (1 << 2);
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_baseTables.l1_low_gbs[1] = QEMU_DTB_BASE | PTE_VALID | PTE_AF | PTE_SH_A | (1 << 2);
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/* -512GB is a map of 64GB of memory */
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for (size_t i = 0; i < 64; ++i) {
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@ -275,7 +279,12 @@ static void bootstub_mmu_init(void) {
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}
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/* -2GiB, map kernel here */
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_baseTables.l1_high_gbs[510] = 0x80000000 | PTE_VALID | PTE_AF | PTE_SH_A | (1 << 2);
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_baseTables.l1_high_gbs[510] = (uintptr_t)&_baseTables.l2_kernel | PTE_VALID | PTE_TABLE | PTE_AF;
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for (size_t i = 0; i < 512; ++i) {
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_baseTables.l2_kernel[i] = (KERNEL_PHYS_BASE + (i << 21)) | PTE_VALID | PTE_AF | PTE_SH_A | (1 << 2);
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}
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uint64_t sctlr = 0
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| (1UL << 0) /* mmu enabled */
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@ -428,8 +437,8 @@ static void bootstub_start_kernel(Elf64_Header * header) {
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printf("bootstub: Jump to kernel entry point at %zx\n",
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header->e_entry);
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void (*entry)(void) = (void(*)(void))header->e_entry;
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entry();
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void (*entry)(uintptr_t,uintptr_t) = (void(*)(uintptr_t,uintptr_t))header->e_entry;
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entry(QEMU_DTB_BASE, KERNEL_PHYS_BASE);
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}
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int kmain(void) {
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@ -15,6 +15,8 @@
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#include <kernel/arch/aarch64/dtb.h>
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uintptr_t aarch64_dtb_phys = 0;
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static uint32_t swizzle(uint32_t from) {
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uint8_t a = from >> 24;
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uint8_t b = from >> 16;
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@ -137,7 +139,8 @@ void dtb_callback_direct_children(uint32_t * node, void (*callback)(uint32_t * c
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static uint32_t * find_node_int(const char * name, int (*cmp)(const char*,const char*)) {
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uintptr_t addr = (uintptr_t)mmu_map_from_physical(0x40000000);
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uintptr_t addr = (uintptr_t)mmu_map_from_physical(aarch64_dtb_phys);
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dprintf("dtb: find '%s' from %#zx\n", name, addr);
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struct fdt_header * fdt = (struct fdt_header*)addr;
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char * dtb_strings = (char *)(addr + swizzle(fdt->off_dt_strings));
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uint32_t * dtb_struct = (uint32_t *)(addr + swizzle(fdt->off_dt_struct));
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@ -187,7 +190,7 @@ static uint32_t * node_find_property_int(uint32_t * node, char * strings, const
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}
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uint32_t * dtb_node_find_property(uint32_t * node, const char * property) {
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uintptr_t addr = (uintptr_t)mmu_map_from_physical(0x40000000);
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uintptr_t addr = (uintptr_t)mmu_map_from_physical(aarch64_dtb_phys);
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struct fdt_header * fdt = (struct fdt_header*)addr;
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char * dtb_strings = (char *)(addr + swizzle(fdt->off_dt_strings));
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uint32_t * out = NULL;
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@ -199,7 +202,7 @@ uint32_t * dtb_node_find_property(uint32_t * node, const char * property) {
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* Figure out 1) how much actual memory we have and 2) what the last
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* address of physical memory is.
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*/
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void dtb_memory_size(size_t * memsize, size_t * physsize) {
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void dtb_memory_size(size_t * memaddr, size_t * physsize) {
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uint32_t * memory = dtb_find_node_prefix("memory");
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if (!memory) {
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printf("dtb: Could not find memory node.\n");
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@ -218,7 +221,7 @@ void dtb_memory_size(size_t * memsize, size_t * physsize) {
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uint64_t mem_addr = (uint64_t)swizzle(regs[3]) | ((uint64_t)swizzle(regs[2]) << 32UL);
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uint64_t mem_size = (uint64_t)swizzle(regs[5]) | ((uint64_t)swizzle(regs[4]) << 32UL);
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*memsize = mem_size;
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*physsize = mem_addr + mem_size;
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*memaddr = mem_addr;
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*physsize = mem_size;
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}
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@ -54,7 +54,7 @@ void fwcfg_load_initrd(uintptr_t * ramdisk_phys_base, size_t * ramdisk_size) {
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size_t uz_pages = 0;
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extern char end[];
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uintptr_t ramdisk_map_start = ((uintptr_t)&end - 0xffffffff80000000UL) + 0x80000000;
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uintptr_t ramdisk_map_start = mmu_map_to_physical(NULL, (uintptr_t)&end);
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/* See if we can find a qemu fw_cfg interface, we can use that for a ramdisk */
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uint32_t * fw_cfg = dtb_find_node_prefix("fw-cfg");
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@ -442,9 +442,17 @@ void aarch64_processor_data(void) {
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* at -2GiB, and there's some other mappings so that
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* a bit of RAM is 1:1.
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*/
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int kmain(void) {
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int kmain(uintptr_t dtb_base, uintptr_t phys_base) {
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early_log_initialize();
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console_set_output(_early_log_write);
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extern uintptr_t aarch64_kernel_phys_base;
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aarch64_kernel_phys_base = phys_base;
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extern uintptr_t aarch64_dtb_phys;
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aarch64_dtb_phys = dtb_base;
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dprintf("%s %d.%d.%d-%s %s %s\n",
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__kernel_name,
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__kernel_version_major,
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@ -454,6 +462,9 @@ int kmain(void) {
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__kernel_version_codename,
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__kernel_arch);
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dprintf("boot: dtb @ %#zx kernel @ %#zx\n",
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dtb_base, phys_base);
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/* Initialize TPIDR_EL1 */
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arch_set_core_base((uintptr_t)&processor_local_data[0]);
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@ -470,12 +481,12 @@ int kmain(void) {
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/* Probe DTB for memory layout. */
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extern char end[];
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size_t memsize, physsize;
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dtb_memory_size(&memsize, &physsize);
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size_t memaddr, memsize;
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dtb_memory_size(&memaddr, &memsize);
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/* Initialize the MMU based on the memory we got from dtb */
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mmu_init(
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memsize, physsize,
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memaddr, memsize,
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0x40100000 /* Should be end of DTB, but we're really just guessing */,
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(uintptr_t)&end + ramdisk_size - 0xffffffff80000000UL);
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@ -20,6 +20,9 @@ static volatile uint32_t *frames;
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static size_t nframes;
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static size_t total_memory = 0;
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static size_t unavailable_memory = 0;
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static uint64_t ram_starts_at = 0;
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uintptr_t aarch64_kernel_phys_base = 0;
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/* TODO Used for CoW later. */
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//static uint8_t * mem_refcounts = NULL;
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@ -46,8 +49,6 @@ static size_t unavailable_memory = 0;
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#define INDEX_FROM_BIT(b) ((b) >> 5)
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#define OFFSET_FROM_BIT(b) ((b) & 0x1F)
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#define QEMU_VIRT_KERNEL_BASE 0x80000000UL
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#define _pagemap __attribute__((aligned(PAGE_SIZE))) = {0}
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union PML init_page_region[512] _pagemap;
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union PML high_base_pml[512] _pagemap;
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@ -87,6 +88,8 @@ union PML kbase_pmls[65][512] _pagemap;
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void mmu_frame_set(uintptr_t frame_addr) {
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if (frame_addr < ram_starts_at) return;
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frame_addr -= ram_starts_at;
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if (frame_addr < nframes * PAGE_SIZE) {
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uint64_t frame = frame_addr >> 12;
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uint64_t index = INDEX_FROM_BIT(frame);
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@ -99,6 +102,8 @@ void mmu_frame_set(uintptr_t frame_addr) {
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static uintptr_t lowest_available = 0;
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void mmu_frame_clear(uintptr_t frame_addr) {
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if (frame_addr < ram_starts_at) return;
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frame_addr -= ram_starts_at;
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if (frame_addr < nframes * PAGE_SIZE) {
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uint64_t frame = frame_addr >> PAGE_SHIFT;
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uint64_t index = INDEX_FROM_BIT(frame);
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@ -110,6 +115,8 @@ void mmu_frame_clear(uintptr_t frame_addr) {
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}
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int mmu_frame_test(uintptr_t frame_addr) {
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if (frame_addr < ram_starts_at) return 1;
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frame_addr -= ram_starts_at;
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if (!(frame_addr < nframes * PAGE_SIZE)) return 1;
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uint64_t frame = frame_addr >> PAGE_SHIFT;
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uint64_t index = INDEX_FROM_BIT(frame);
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@ -132,7 +139,7 @@ uintptr_t mmu_first_n_frames(int n) {
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}
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}
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if (!bad) {
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return i / PAGE_SIZE;
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return (i + ram_starts_at) / PAGE_SIZE;
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}
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}
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@ -152,7 +159,7 @@ uintptr_t mmu_first_frame(void) {
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if (!(frames[i] & testFrame)) {
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uintptr_t out = (i << 5) + j;
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lowest_available = out + 1;
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return out;
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return out + (ram_starts_at >> 12);
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}
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}
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}
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@ -266,7 +273,7 @@ union PML * mmu_get_page_other(union PML * root, uintptr_t virtAddr) {
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uintptr_t mmu_map_to_physical(union PML * root, uintptr_t virtAddr) {
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if (!root) {
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if (virtAddr >= MODULE_BASE_START) {
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return (virtAddr - MODULE_BASE_START) + QEMU_VIRT_KERNEL_BASE;
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return (virtAddr - MODULE_BASE_START) + aarch64_kernel_phys_base;
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} else if (virtAddr >= HIGH_MAP_REGION) {
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return (virtAddr - HIGH_MAP_REGION);
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}
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@ -612,7 +619,7 @@ void mmu_free(union PML * from) {
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}
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union PML * mmu_get_kernel_directory(void) {
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return mmu_map_from_physical((uintptr_t)&init_page_region - MODULE_BASE_START + QEMU_VIRT_KERNEL_BASE);
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return mmu_map_from_physical((uintptr_t)&init_page_region - MODULE_BASE_START + aarch64_kernel_phys_base);
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}
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void mmu_set_directory(union PML * new_pml) {
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@ -733,50 +740,23 @@ int mmu_validate_user_pointer(void * addr, size_t size, int flags) {
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}
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static uintptr_t k2p(void * x) {
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return ((uintptr_t)x - MODULE_BASE_START) + QEMU_VIRT_KERNEL_BASE;
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return ((uintptr_t)x - MODULE_BASE_START) + aarch64_kernel_phys_base;
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}
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void mmu_init(uintptr_t memsize, size_t physsize, uintptr_t firstFreePage, uintptr_t endOfRamDisk) {
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void mmu_init(uintptr_t memaddr, size_t memsize, uintptr_t firstFreePage, uintptr_t endOfRamDisk) {
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this_core->current_pml = (union PML *)&init_page_region;
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/* On this machine, there's 1GiB of unavailable memory. */
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unavailable_memory = 1048576;
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/* Convert from bytes to kibibytes */
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total_memory = memsize / 1024;
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/* MAIR setup? */
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uint64_t mair;
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asm volatile ("mrs %0,MAIR_EL1" : "=r"(mair));
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dprintf("Current MAIR:\n"
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" Attr0: 0x%02zx Attr1: 0x%02zx\n"
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" Attr2: 0x%02zx Attr3: 0x%02zx\n"
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" Attr4: 0x%02zx Attr5: 0x%02zx\n"
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" Attr6: 0x%02zx Attr7: 0x%02zx\n",
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((mair >> 0) & 0xFF),
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((mair >> 8) & 0xFF),
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((mair >> 16) & 0xFF),
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((mair >> 24) & 0xFF),
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((mair >> 32) & 0xFF),
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((mair >> 40) & 0xFF),
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((mair >> 48) & 0xFF),
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((mair >> 52) & 0xFF));
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/* We don't currently support gaps in this setup. */
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unavailable_memory = 0;
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//mair &= (0xFFffFFffFF000000);
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mair = (0x000000000044ff00);
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/* MAIR setup? */
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uint64_t mair = (0x000000000044ff00);
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asm volatile ("msr MAIR_EL1,%0" :: "r"(mair));
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asm volatile ("mrs %0,MAIR_EL1" : "=r"(mair));
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dprintf("Loaded MAIR:\n"
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" Attr0: 0x%02zx Attr1: 0x%02zx\n"
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" Attr2: 0x%02zx Attr3: 0x%02zx\n"
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" Attr4: 0x%02zx Attr5: 0x%02zx\n"
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" Attr6: 0x%02zx Attr7: 0x%02zx\n",
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((mair >> 0) & 0xFF),
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((mair >> 8) & 0xFF),
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((mair >> 16) & 0xFF),
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((mair >> 24) & 0xFF),
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((mair >> 32) & 0xFF),
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((mair >> 40) & 0xFF),
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((mair >> 48) & 0xFF),
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((mair >> 52) & 0xFF));
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dprintf("mmu: MAIR_EL1=0x%016lx\n", mair);
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asm volatile ("" ::: "memory");
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@ -800,7 +780,7 @@ void mmu_init(uintptr_t memsize, size_t physsize, uintptr_t firstFreePage, uintp
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for (size_t j = 0; j < twoms; ++j) {
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kbase_pmls[0][j].raw = k2p(&kbase_pmls[1+j]) | PTE_VALID | PTE_TABLE | PTE_AF;
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for (int i = 0; i < 512; ++i) {
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kbase_pmls[1+j][i].raw = (uintptr_t)(QEMU_VIRT_KERNEL_BASE + LARGE_PAGE_SIZE * j + PAGE_SIZE * i) |
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kbase_pmls[1+j][i].raw = (uintptr_t)(aarch64_kernel_phys_base + LARGE_PAGE_SIZE * j + PAGE_SIZE * i) |
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PTE_VALID | PTE_AF | PTE_SH_A | PTE_TABLE | (1 << 2);
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}
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}
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@ -818,7 +798,8 @@ void mmu_init(uintptr_t memsize, size_t physsize, uintptr_t firstFreePage, uintp
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/* Physical frame allocator. We're gonna do this the same as the one we have x86-64, because
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* I can't be bothered to think of anything better right now... */
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nframes = (physsize) >> 12;
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ram_starts_at = memaddr;
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nframes = (memsize) >> 12;
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size_t bytesOfFrames = INDEX_FROM_BIT(nframes * 8);
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bytesOfFrames = (bytesOfFrames + PAGE_LOW_MASK) & PAGE_SIZE_MASK;
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@ -837,18 +818,18 @@ void mmu_init(uintptr_t memsize, size_t physsize, uintptr_t firstFreePage, uintp
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frames = (void*)((uintptr_t)KERNEL_HEAP_START);
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memset((void*)frames, 0x00, bytesOfFrames);
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/* Set frames as in use... this also marks all of the lower gigabyte, conveniently... */
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for (uintptr_t i = 0; i < firstFreePage + bytesOfFrames; i+= PAGE_SIZE) {
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/* Set frames as in use... */
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for (uintptr_t i = memaddr; i < firstFreePage + bytesOfFrames; i+= PAGE_SIZE) {
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mmu_frame_set(i);
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}
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/* Set kernel space as in use */
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for (uintptr_t i = 0; i < twoms * LARGE_PAGE_SIZE; i += PAGE_SIZE) {
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mmu_frame_set(QEMU_VIRT_KERNEL_BASE + i);
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mmu_frame_set(aarch64_kernel_phys_base + i);
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}
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heapStart = (char*)KERNEL_HEAP_START + bytesOfFrames;
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lowest_available = (firstFreePage + bytesOfFrames);
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lowest_available = (firstFreePage + bytesOfFrames) - memaddr;
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}
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@ -184,7 +184,9 @@ void aarch64_smp_start(void) {
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asm volatile ("mrs %0, VBAR_EL1" : "=r"(aarch64_vbar));
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startup_ttbr0[0][0].raw = mmu_map_to_physical(NULL, (uintptr_t)&startup_ttbr0[1]) | (0x3) | (1 << 10);
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startup_ttbr0[1][2].raw = 0x80000000 | (1 << 2) | 1 | (1 << 10);
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for (long i = 0; i < 512; ++i) {
|
||||
startup_ttbr0[1][i].raw = (i << 30) | (1 << 2) | 1 | (1 << 10);
|
||||
}
|
||||
|
||||
aarch64_ttbr0 = mmu_map_to_physical(NULL, (uintptr_t)&startup_ttbr0[0]);
|
||||
aarch64_ttbr1 = mmu_map_to_physical(NULL, (uintptr_t)mmu_get_kernel_directory());
|
||||
|
||||
@ -31,6 +31,8 @@ static uintptr_t pcie_addr(uint32_t device, int field) {
|
||||
return (pci_extract_bus(device) << 20) | (pci_extract_slot(device) << 15) | (pci_extract_func(device) << 12) | (field);
|
||||
}
|
||||
|
||||
uintptr_t pcie_ecam_phys = 0x3f000000;
|
||||
|
||||
/**
|
||||
* @brief Write to a PCI device configuration space field.
|
||||
*/
|
||||
@ -42,13 +44,13 @@ void pci_write_field(uint32_t device, int field, int size, uint32_t value) {
|
||||
|
||||
/* ECAM space */
|
||||
if (size == 4) {
|
||||
*(volatile uint32_t*)mmu_map_from_physical(0x3f000000 + pcie_addr(device,field)) = value;
|
||||
*(volatile uint32_t*)mmu_map_from_physical(pcie_ecam_phys + pcie_addr(device,field)) = value;
|
||||
return;
|
||||
} else if (size == 2) {
|
||||
*(volatile uint16_t*)mmu_map_from_physical(0x3f000000 + pcie_addr(device,field)) = value;
|
||||
*(volatile uint16_t*)mmu_map_from_physical(pcie_ecam_phys + pcie_addr(device,field)) = value;
|
||||
return;
|
||||
} else if (size == 1) {
|
||||
*(volatile uint8_t*)mmu_map_from_physical(0x3f000000 + pcie_addr(device,field)) = value;
|
||||
*(volatile uint8_t*)mmu_map_from_physical(pcie_ecam_phys + pcie_addr(device,field)) = value;
|
||||
return;
|
||||
}
|
||||
|
||||
@ -77,11 +79,11 @@ uint32_t pci_read_field(uint32_t device, int field, int size) {
|
||||
#else
|
||||
uintptr_t field_addr = pcie_addr(device,field);
|
||||
if (size == 4) {
|
||||
return *(volatile uint32_t*)mmu_map_from_physical(0x3f000000 + field_addr);
|
||||
return *(volatile uint32_t*)mmu_map_from_physical(pcie_ecam_phys + field_addr);
|
||||
} else if (size == 2) {
|
||||
return *(volatile uint16_t*)mmu_map_from_physical(0x3f000000 + field_addr);
|
||||
return *(volatile uint16_t*)mmu_map_from_physical(pcie_ecam_phys + field_addr);
|
||||
} else if (size == 1) {
|
||||
return *(volatile uint8_t*)mmu_map_from_physical(0x3f000000 + field_addr);
|
||||
return *(volatile uint8_t*)mmu_map_from_physical(pcie_ecam_phys + field_addr);
|
||||
}
|
||||
#endif
|
||||
return 0xFFFF;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user