xhci: cleanup
This commit is contained in:
K. Lange
parent
82714d4183
commit
7c7ec4689a
2
Makefile
2
Makefile
@ -50,7 +50,7 @@ EMU_ARGS += -netdev hubport,id=u1,hubid=0, -device e1000e,netdev=u1 -object fil
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#EMU_ARGS += -netdev hubport,id=u2,hubid=0, -device e1000e,netdev=u2
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# Add an XHCI tablet
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#EMU_ARGS += -device qemu-xhci -device usb-tablet
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EMU_ARGS += -device qemu-xhci -device usb-tablet
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EMU_KVM ?= -enable-kvm
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@ -11,33 +11,34 @@
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#include <kernel/procfs.h>
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struct xhci_cap_regs {
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uint32_t cap_caplen_version;
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uint32_t cap_hcsparams1;
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uint32_t cap_hcsparams2;
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uint32_t cap_hcsparams3;
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uint32_t cap_hccparams1;
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uint32_t cap_dboff;
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uint32_t cap_rtsoff;
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uint32_t cap_hccparams2;
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};
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volatile uint32_t cap_caplen_version;
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volatile uint32_t cap_hcsparams1;
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volatile uint32_t cap_hcsparams2;
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volatile uint32_t cap_hcsparams3;
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volatile uint32_t cap_hccparams1;
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volatile uint32_t cap_dboff;
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volatile uint32_t cap_rtsoff;
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volatile uint32_t cap_hccparams2;
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} __attribute__((packed));
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struct xhci_op_regs {
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uint32_t op_usbcmd;
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uint32_t op_usbsts;
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uint32_t op_pagesize;
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uint32_t op__pad1[2];
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uint32_t op_dnctrl;
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uint32_t op_crcr;
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uint32_t op__pad2[5];
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uint32_t op_dcbaap;
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uint32_t op__pad3[1];
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uint32_t op_config;
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};
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volatile uint32_t op_usbcmd;
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volatile uint32_t op_usbsts;
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volatile uint32_t op_pagesize;
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volatile uint32_t op__pad1[2];
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volatile uint32_t op_dnctrl;
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volatile uint32_t op_crcr;
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volatile uint32_t op__pad2[5];
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volatile uint32_t op_dcbaap;
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volatile uint32_t op__pad3[1];
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volatile uint32_t op_config;
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} __attribute__((packed));
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struct XHCIControllerData {
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uintptr_t mmio;
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uint32_t device;
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volatile struct xhci_cap_regs * cregs;
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volatile struct xhci_op_regs * oregs;
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struct xhci_cap_regs * cregs;
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struct xhci_op_regs * oregs;
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};
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static int _counter = 0;
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@ -47,16 +48,27 @@ static ssize_t xhci_procfs_callback(fs_node_t * node, off_t offset, size_t size,
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char buf[2048];
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size_t _bsize = snprintf(buf, 2000,
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"Device status: %#x\n"
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"64-bit capable? %s\n"
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"context size bit? %d\n"
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"has %d ports, %d slots\n"
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"%08x\n"
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"0x%016zx\n"
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"CAPLENGTH 0x%08x\n"
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"HCSPARAMS1 0x%08x\n"
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"HCSPARAMS2 0x%08x\n"
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"HCSPARAMS3 0x%08x\n"
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"HCCPARAMS1 0x%08x\n"
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"DBOFF 0x%08x\n"
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"RTSOFF 0x%08x\n"
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"HCCPARAMS2 0x%08x\n"
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,
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controller->oregs->op_usbsts,
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(controller->cregs->cap_hccparams1 & 1) ? "yes" : "no",
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(controller->cregs->cap_hccparams1 >> 2) & 1,
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(controller->cregs->cap_hcsparams1 >> 24) & 0xFF,
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(controller->cregs->cap_hcsparams1) & 0xFF
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controller->device,
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(uintptr_t)controller->mmio,
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controller->cregs->cap_caplen_version,
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controller->cregs->cap_hcsparams1,
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controller->cregs->cap_hcsparams2,
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controller->cregs->cap_hcsparams3,
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controller->cregs->cap_hccparams1,
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controller->cregs->cap_dboff,
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controller->cregs->cap_rtsoff,
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controller->cregs->cap_hccparams2
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);
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if ((size_t)offset > _bsize) return 0;
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@ -67,57 +79,50 @@ static ssize_t xhci_procfs_callback(fs_node_t * node, off_t offset, size_t size,
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}
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static void find_xhci(uint32_t device, uint16_t v, uint16_t d, void * extra) {
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uint16_t device_type = pci_find_type(device);
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if (device_type == 0x0C03) {
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printf("xhci: found a host controller at %02x:%02x.%d\n",
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(int)pci_extract_bus(device),
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(int)pci_extract_slot(device),
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(int)pci_extract_func(device));
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if (pci_find_type(device) != 0x0C03) return;
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if (pci_read_field(device, PCI_PROG_IF, 1) != 0x30) return;
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struct XHCIControllerData * controller = calloc(sizeof(struct XHCIControllerData), 1);
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controller->device = device;
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uint16_t command_reg = pci_read_field(device, PCI_COMMAND, 2);
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command_reg |= (1 << 2);
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command_reg |= (1 << 1);
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pci_write_field(device, PCI_COMMAND, 2, command_reg);
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/* The mmio address is 64 bits and combines BAR0 and BAR1... */
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uint64_t addr_low = pci_read_field(device, PCI_BAR0, 4) & 0xFFFFFFF0;
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uint64_t addr_high = pci_read_field(device, PCI_BAR1, 4) & 0xFFFFFFFF; /* I think this is right? */
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uint64_t mmio_addr = (addr_high << 32) | addr_low;
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/* The mmio address is 64 bits and combines BAR0 and BAR1... */
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uint64_t addr_low = pci_read_field(device, PCI_BAR0, 4) & 0xFFFFFFF0;
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uint64_t addr_high = pci_read_field(device, PCI_BAR1, 4) & 0xFFFFFFFF; /* I think this is right? */
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uint64_t mmio_addr = (addr_high << 32) | addr_low;
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printf("xhci: mmio space is at %#lx\n", mmio_addr);
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/* Map mmio space... */
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uintptr_t xhci_regs = (uintptr_t)mmu_map_mmio_region(mmio_addr, 0x1000 * 4); /* I don't know. */
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controller->cregs = (volatile struct xhci_cap_regs*)xhci_regs;
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/* Read some registers */
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uint32_t caplength = controller->cregs->cap_caplen_version & 0xFF;
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uint32_t hciversion = (controller->cregs->cap_caplen_version >> 16) & 0xFFFF;
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printf("xhci: CAPLENGTH = %d\n", caplength);
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printf("xhci: HCIVERSION = %d\n", hciversion);
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controller->oregs = (volatile struct xhci_op_regs*)(xhci_regs + caplength);
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printf("xhci: USBSTS = %#x\n", controller->oregs->op_usbsts);
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if (controller->oregs->op_usbsts & (1 << 0)) printf("xhci: host controller halt\n");
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if (controller->oregs->op_usbsts & (1 << 2)) printf("xhci: host system error\n");
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if (controller->oregs->op_usbsts & (1 << 3)) printf("xhci: event interrupt\n");
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if (controller->oregs->op_usbsts & (1 << 4)) printf("xhci: port change detect\n");
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if (controller->oregs->op_usbsts & (1 << 8)) printf("xhci: save state status\n");
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if (controller->oregs->op_usbsts & (1 << 9)) printf("xhci: restore state status\n");
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if (controller->oregs->op_usbsts & (1 << 10)) printf("xhci: save restore error\n");
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if (controller->oregs->op_usbsts & (1 << 11)) printf("xhci: controller not ready\n");
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if (controller->oregs->op_usbsts & (1 << 12)) printf("xhci: host controlelr error\n");
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char devName[20] = "/dev/xhciN";
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snprintf(devName, 19, "/dev/xhci%d", _counter);
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fs_node_t * fnode = calloc(sizeof(fs_node_t), 1);
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snprintf(fnode->name, 100, "xhci%d", _counter);
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fnode->flags = FS_BLOCKDEVICE;
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fnode->mask = 0660; /* Only accessible to root user/group */
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fnode->read = xhci_procfs_callback;
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fnode->device = controller;
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vfs_mount(devName, fnode);
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if (mmio_addr == 0) {
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/* Need to map... */
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printf("xhci: Device is unmapped. TODO: Check if this is behind a PCI bridge...\n");
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return;
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#if 0
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mmio_addr = mmu_allocate_n_frames(2) << 12;
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pci_write_field(device, PCI_BAR0, 4, (mmio_addr & 0xFFFFFFF0) | (1 << 2));
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pci_write_field(device, PCI_BAR1, 4, (mmio_addr >> 32));
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#endif
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}
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struct XHCIControllerData * controller = calloc(sizeof(struct XHCIControllerData), 1);
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controller->device = device;
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/* Map mmio space... */
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uintptr_t xhci_regs = (uintptr_t)mmu_map_mmio_region(mmio_addr, 0x1000 * 4); /* I don't know. */
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controller->mmio = mmio_addr;
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controller->cregs = (struct xhci_cap_regs*)xhci_regs;
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controller->oregs = (struct xhci_op_regs*)(xhci_regs + (controller->cregs->cap_caplen_version & 0xFF));
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char devName[20] = "/dev/xhciN";
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snprintf(devName, 19, "/dev/xhci%d", _counter);
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fs_node_t * fnode = calloc(sizeof(fs_node_t), 1);
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snprintf(fnode->name, 100, "xhci%d", _counter);
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fnode->flags = FS_BLOCKDEVICE;
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fnode->mask = 0660; /* Only accessible to root user/group */
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fnode->read = xhci_procfs_callback;
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fnode->device = controller;
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vfs_mount(devName, fnode);
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_counter++;
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}
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void xhci_initialize(void) {
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