kernel: cleanup kernel/arch/x86_64/smp.c
This commit is contained in:
K. Lange
parent
80cf1a1f15
commit
35423ecc66
@ -3,6 +3,11 @@
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* @brief Multi-processor Support for x86-64.
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*
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* Locates and bootstraps APs using ACPI MADT tables.
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*
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* @copyright
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* This file is part of ToaruOS and is released under the terms
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* of the NCSA / University of Illinois License - see LICENSE.md
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* Copyright (C) 2021 K. Lange
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*/
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#include <stdint.h>
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#include <kernel/string.h>
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@ -86,74 +91,41 @@ extern void pat_initialize(void);
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extern process_t * spawn_kidle(int);
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extern union PML init_page_region[];
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uintptr_t _ap_stack_base = 0;
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static volatile int _ap_startup_flag = 0;
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void load_processor_info(void);
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/* For timing delays on IPIs */
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/**
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* @brief Read the timestamp counter.
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*
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* This is duplicated in a couple of places as it's a quick
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* inline wrapper for 'rdtsc'.
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*/
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static inline uint64_t read_tsc(void) {
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uint32_t lo, hi;
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asm volatile ( "rdtsc" : "=a"(lo), "=d"(hi) );
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return ((uint64_t)hi << 32) | (uint64_t)lo;
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}
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/**
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* @brief Pause by looping on TSC.
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*
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* Used for AP startup.
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*/
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static void short_delay(unsigned long amount) {
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uint64_t clock = read_tsc();
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while (read_tsc() < clock + amount * arch_cpu_mhz());
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}
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static volatile int _ap_current = 0;
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uintptr_t lapic_final = 0;
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static volatile int _ap_current = 0; /**< The AP we're currently starting up; shared between @c ap_main and @c smp_initialize */
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static volatile int _ap_startup_flag = 0; /**< Simple lock, shared between @c ap_main and @c smp_initialize */
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uintptr_t _ap_stack_base = 0; /**< Stack address for this AP to use on startup; used by @c __ap_boostrap */
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uintptr_t lapic_final = 0; /**< MMIO region to use for APIC access. */
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#define cpuid(in,a,b,c,d) do { asm volatile ("cpuid" : "=a"(a),"=b"(b),"=c"(c),"=d"(d) : "a"(in)); } while(0)
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/* C entrypoint for APs */
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void ap_main(void) {
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arch_set_core_base((uintptr_t)&processor_local_data[_ap_current]);
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uint32_t ebx, _unused;
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cpuid(0x1,_unused,ebx,_unused,_unused);
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if (this_core->lapic_id != (int)(ebx >> 24)) {
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printf("smp: lapic id does not match\n");
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}
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/* Load the IDT */
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idt_ap_install();
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fpu_initialize();
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pat_initialize();
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/* Enable our spurious vector register */
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*((volatile uint32_t*)(lapic_final + 0x0F0)) = 0x127;
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*((volatile uint32_t*)(lapic_final + 0x320)) = 0x7b;
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*((volatile uint32_t*)(lapic_final + 0x3e0)) = 1;
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uint64_t before = arch_perf_timer();
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*((volatile uint32_t*)(lapic_final + 0x380)) = 1000000;
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while (*((volatile uint32_t*)(lapic_final + 0x390)));
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uint64_t after = arch_perf_timer();
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uint64_t ms = (after-before)/arch_cpu_mhz();
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uint64_t target = 10000000000UL / ms;
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*((volatile uint32_t*)(lapic_final + 0x3e0)) = 1;
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*((volatile uint32_t*)(lapic_final + 0x320)) = 0x7b | 0x20000;
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*((volatile uint32_t*)(lapic_final + 0x380)) = target;
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/* Set our pml pointers */
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this_core->current_pml = &init_page_region[0];
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/* Spawn our kidle, make it our current process. */
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this_core->kernel_idle_task = spawn_kidle(0);
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this_core->current_process = this_core->kernel_idle_task;
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load_processor_info();
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/* Inform BSP it can continue. */
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_ap_startup_flag = 1;
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switch_next();
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}
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/**
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* @brief Obtains processor name strings from cpuid
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*
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* We store the processor names for each core (they might be different...)
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* so we can display them nicely in /proc/cpuinfo
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*/
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void load_processor_info(void) {
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unsigned long a, b, unused;
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cpuid(0,unused,b,unused,unused);
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@ -185,22 +157,109 @@ void load_processor_info(void) {
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}
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}
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/**
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* @brief C entrypoint for APs, called by the bootstrap.
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*
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* After an AP has entered long mode, it jumps here, where
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* we do the rest of the core setup.
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*/
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void ap_main(void) {
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/* Set the GS base to point to our 'this_core' struct. */
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arch_set_core_base((uintptr_t)&processor_local_data[_ap_current]);
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/* Safety check...
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* Make sure we're actually the core we think we are...
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*/
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uint32_t ebx, _unused;
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cpuid(0x1,_unused,ebx,_unused,_unused);
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if (this_core->lapic_id != (int)(ebx >> 24)) {
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printf("smp: lapic id does not match\n");
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}
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/* lidt, initialize local FPU, set up page attributes */
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idt_ap_install();
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fpu_initialize();
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pat_initialize();
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/* Enable our spurious vector register */
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*((volatile uint32_t*)(lapic_final + 0x0F0)) = 0x127;
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*((volatile uint32_t*)(lapic_final + 0x320)) = 0x7b;
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*((volatile uint32_t*)(lapic_final + 0x3e0)) = 1;
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/* Time our APIC timer against the TSC */
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uint64_t before = arch_perf_timer();
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*((volatile uint32_t*)(lapic_final + 0x380)) = 1000000;
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while (*((volatile uint32_t*)(lapic_final + 0x390)));
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uint64_t after = arch_perf_timer();
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uint64_t ms = (after-before)/arch_cpu_mhz();
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uint64_t target = 10000000000UL / ms;
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/* Enable our APIC timer to send periodic wakeup signals */
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*((volatile uint32_t*)(lapic_final + 0x3e0)) = 1;
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*((volatile uint32_t*)(lapic_final + 0x320)) = 0x7b | 0x20000;
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*((volatile uint32_t*)(lapic_final + 0x380)) = target;
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/* Set our pml pointers */
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this_core->current_pml = &init_page_region[0];
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/* Spawn our kidle, make it our current process. */
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this_core->kernel_idle_task = spawn_kidle(0);
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this_core->current_process = this_core->kernel_idle_task;
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/* Collect CPU name strings. */
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load_processor_info();
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/* Inform BSP it can continue. */
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_ap_startup_flag = 1;
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/* Enter scheduler */
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switch_next();
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}
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/**
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* @brief MMIO write for LAPIC
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* @param addr Register address to access
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* @param value DWORD to write
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*/
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void lapic_write(size_t addr, uint32_t value) {
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*((volatile uint32_t*)(lapic_final + addr)) = value;
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asm volatile ("":::"memory");
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}
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/**
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* @brief MMIO read for LAPIC
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* @param addr Register address to access
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* @return DWORD
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*/
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uint32_t lapic_read(size_t addr) {
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return *((volatile uint32_t*)(lapic_final + addr));
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}
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/**
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* @brief Send an inter-processor interrupt.
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*
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* Sends an IPI and waits for the LAPIC to signal the IPI was sent.
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*
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* @param int The interrupt to send.
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* @param val Flags to control how the IPI should be delivered
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*/
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void lapic_send_ipi(int i, uint32_t val) {
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lapic_write(0x310, i << 24);
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lapic_write(0x300, val);
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do { asm volatile ("pause" : : : "memory"); } while (lapic_read(0x300) & (1 << 12));
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}
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/**
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* @brief Quick dumb hex parser.
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*
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* Just to support acpi= command line flag for overriding
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* the scan address for ACPI tables...
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*
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* @param c String of hexadecimal characters, optionally prefixed with '0x'
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* @return Unsigned integer interpretation of @p c
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*/
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uintptr_t xtoi(const char * c) {
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uintptr_t out = 0;
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if (c[0] == '0' && c[1] == 'x') {
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@ -222,6 +281,13 @@ uintptr_t xtoi(const char * c) {
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return out;
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}
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/**
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* @brief Called on main startup to initialize other cores.
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*
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* We always do this ourselves. We support a few different
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* bootloader conventions, and most of them don't support
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* starting up APs for us.
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*/
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void smp_initialize(void) {
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/* Locate ACPI tables */
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uintptr_t scan = 0xE0000;
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@ -231,22 +297,35 @@ void smp_initialize(void) {
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extern struct multiboot * mboot_struct;
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extern int mboot_is_2;
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if (mboot_is_2) {
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/* A multiboot2 loader should give us a "firmware table" address
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* that should allow us to find the RSDP. */
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extern void * mboot2_find_tag(void * fromStruct, uint32_t type);
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/* First try for an RSDPv1 */
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scan = (uintptr_t)mboot2_find_tag(mboot_struct, 14);
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/* If we didn't get one of those, try for an RSDPv2 */
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if (!scan) scan = (uintptr_t)mboot2_find_tag(mboot_struct, 15);
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/* If we didn't get one of _those_, we should really be bailing here... */
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/* tag header */
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/* Account for the tag header. */
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scan += 8;
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scan_top = scan + 0x100000;
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} else if (mboot_struct->config_table) {
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/*
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* @warning This is specific to ToaruOS's native loader.
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* We steal the config_table entry in our EFI loader to pass the RSDP,
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* just like a multiboot2 loader would...
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*/
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scan = mboot_struct->config_table;
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scan_top = scan + 0x100000;
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} else if (args_present("acpi")) {
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/* If all else fails, you can provide the address yourself on the command line */
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scan = xtoi(args_value("acpi"));
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scan_top = scan + 0x100000;
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}
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/* Look for it the RSDP */
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for (; scan < scan_top; scan += 16) {
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char * _scan = mmu_map_from_physical(scan);
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if (_scan[0] == 'R' &&
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@ -261,28 +340,35 @@ void smp_initialize(void) {
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}
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}
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/* I don't know why we do this here... */
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load_processor_info();
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/* Did we still not find our table? */
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if (!good) {
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printf("smp: No RSD PTR found\n");
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dprintf("smp: No RSD PTR found\n");
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return;
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}
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/* Map the ACPI RSDP */
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struct rsdp_descriptor * rsdp = (struct rsdp_descriptor *)mmu_map_from_physical(scan);
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/* Validate the checksum */
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uint8_t check = 0;
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uint8_t * tmp;
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for (tmp = (uint8_t *)rsdp; (uintptr_t)tmp < (uintptr_t)rsdp + sizeof(struct rsdp_descriptor); tmp++) {
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check += *tmp;
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}
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/* Did the checksum fail? */
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if (check != 0 && !args_present("noacpichecksum")) {
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printf("smp: Bad checksum on RSDP (add 'noacpichecksum' to ignore this)\n");
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dprintf("smp: Bad checksum on RSDP (add 'noacpichecksum' to ignore this)\n");
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return; /* bad checksum */
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}
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/* Load information for the current CPU. */
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/* Was SMP disabled by a commandline flag? */
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if (args_present("nosmp")) return;
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/* Map the RSDT from the address given by the RSDP */
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struct rsdt * rsdt = mmu_map_from_physical(rsdp->rsdt_address);
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int cores = 0;
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@ -358,6 +444,18 @@ _toomany:
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dprintf("smp: enabled with %d cores\n", cores);
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}
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/**
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* @brief Send a soft IPI to all other cores.
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*
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* This is called by the scheduler when a process enters the ready queue,
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* to give other CPUs a chance to pick it up before their timer interrupt
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* fires. This is a soft interrupt: It should be ignored by the receiving
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* cores if they are busy with other things - we only want it to wake up
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* the HLT in the kernel idle task.
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*
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* TODO We could make this more fine-grained and deliver only to processors
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* we think are ready, or to specific processors to aid in affinity?
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*/
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void arch_wakeup_others(void) {
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if (!lapic_final || processor_count < 2) return;
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/* Send broadcast IPI to others; this is a soft interrupt
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@ -366,11 +464,14 @@ void arch_wakeup_others(void) {
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lapic_send_ipi(0, 0x7E | (3 << 18));
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}
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void arch_tick_others(void) {
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if (!lapic_final || processor_count < 2) return;
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lapic_send_ipi(0, 0x7b | (3 << 18));
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}
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/**
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* @brief Trigger a TLB shootdown on other cores.
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*
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* XXX This is really dumb; we just send an IPI to everyone else
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* and they reload CR3...
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*
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* @param vaddr Should have the address to flush, but not actually used.
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*/
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void arch_tlb_shootdown(uintptr_t vaddr) {
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if (!lapic_final || processor_count < 2) return;
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