2018-03-06 12:18:53 +03:00
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#pragma once
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2021-06-14 05:11:37 +03:00
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static inline unsigned short inports(unsigned short _port) {
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2018-03-06 12:18:53 +03:00
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unsigned short rv;
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asm volatile ("inw %1, %0" : "=a" (rv) : "dN" (_port));
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return rv;
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}
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2021-06-14 05:11:37 +03:00
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static inline void outports(unsigned short _port, unsigned short _data) {
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2018-03-06 12:18:53 +03:00
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asm volatile ("outw %1, %0" : : "dN" (_port), "a" (_data));
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}
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2021-06-14 05:11:37 +03:00
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static inline unsigned int inportl(unsigned short _port) {
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2018-03-06 12:18:53 +03:00
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unsigned int rv;
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asm volatile ("inl %%dx, %%eax" : "=a" (rv) : "dN" (_port));
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return rv;
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}
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2021-06-14 05:11:37 +03:00
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static inline void outportl(unsigned short _port, unsigned int _data) {
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2018-03-06 12:18:53 +03:00
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asm volatile ("outl %%eax, %%dx" : : "dN" (_port), "a" (_data));
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}
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2021-06-14 05:11:37 +03:00
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static inline unsigned char inportb(unsigned short _port) {
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2018-03-06 12:18:53 +03:00
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unsigned char rv;
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asm volatile ("inb %1, %0" : "=a" (rv) : "dN" (_port));
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return rv;
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}
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2021-06-14 05:11:37 +03:00
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static inline void outportb(unsigned short _port, unsigned char _data) {
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2018-03-06 12:18:53 +03:00
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asm volatile ("outb %1, %0" : : "dN" (_port), "a" (_data));
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}
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2021-06-14 05:11:37 +03:00
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static inline void inportsm(unsigned short port, unsigned char * data, unsigned long size) {
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2018-03-06 12:18:53 +03:00
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asm volatile ("rep insw" : "+D" (data), "+c" (size) : "d" (port) : "memory");
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}
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2021-06-14 05:11:37 +03:00
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void * memcpy(void * restrict dest, const void * restrict src, long n);
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void * memset(void * dest, int c, long n);
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int strcmp(const char * l, const char * r);
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char * strchr(const char * s, int c);
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char * strcat(char *dest, const char *src);
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void copy_sectors(unsigned long lba, unsigned char * buf, int sectors);
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void copy_sector(unsigned long lba, unsigned char * buf);
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2021-08-21 01:55:48 +03:00
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unsigned long strlen(const char *s);
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2018-03-06 12:18:53 +03:00
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2021-06-14 05:11:37 +03:00
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#define DATA_LOAD_BASE 0x4000000
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