2021-07-14 04:44:46 +03:00
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/**
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* @brief xHCI Host Controller Driver
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*/
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2021-08-08 10:37:19 +03:00
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#include <kernel/module.h>
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2021-07-14 04:44:46 +03:00
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#include <kernel/printf.h>
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#include <kernel/types.h>
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2021-08-01 11:28:52 +03:00
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#include <kernel/string.h>
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2021-07-14 04:44:46 +03:00
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#include <kernel/pci.h>
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#include <kernel/mmu.h>
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#include <kernel/args.h>
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#include <kernel/procfs.h>
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#include <kernel/syscall.h>
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struct xhci_cap_regs {
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volatile uint32_t cap_caplen_version;
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volatile uint32_t cap_hcsparams1;
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volatile uint32_t cap_hcsparams2;
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volatile uint32_t cap_hcsparams3;
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volatile uint32_t cap_hccparams1;
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volatile uint32_t cap_dboff;
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volatile uint32_t cap_rtsoff;
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volatile uint32_t cap_hccparams2;
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} __attribute__((packed));
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struct xhci_op_regs {
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volatile uint32_t op_usbcmd;
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volatile uint32_t op_usbsts;
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volatile uint32_t op_pagesize;
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volatile uint32_t op__pad1[2];
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volatile uint32_t op_dnctrl;
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volatile uint32_t op_crcr;
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volatile uint32_t op__pad2[5];
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2021-08-21 02:04:59 +03:00
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volatile uint32_t op_dcbaap_lo;
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volatile uint32_t op_dcbaap_hi;
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volatile uint32_t op_config;
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} __attribute__((packed));
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struct XHCIControllerData {
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uintptr_t mmio;
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uint32_t device;
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struct xhci_cap_regs * cregs;
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struct xhci_op_regs * oregs;
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};
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static int _counter = 0;
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static ssize_t xhci_procfs_callback(fs_node_t * node, off_t offset, size_t size, uint8_t * buffer) {
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struct XHCIControllerData * controller = node->device;
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char buf[2048];
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size_t _bsize = snprintf(buf, 2000,
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"%08x\n"
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"0x%016zx\n"
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"CAPLENGTH 0x%08x\n"
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"HCSPARAMS1 0x%08x\n"
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"HCSPARAMS2 0x%08x\n"
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"HCSPARAMS3 0x%08x\n"
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"HCCPARAMS1 0x%08x\n"
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"DBOFF 0x%08x\n"
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"RTSOFF 0x%08x\n"
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"HCCPARAMS2 0x%08x\n"
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,
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controller->device,
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(uintptr_t)controller->mmio,
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controller->cregs->cap_caplen_version,
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controller->cregs->cap_hcsparams1,
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controller->cregs->cap_hcsparams2,
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controller->cregs->cap_hcsparams3,
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controller->cregs->cap_hccparams1,
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controller->cregs->cap_dboff,
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controller->cregs->cap_rtsoff,
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controller->cregs->cap_hccparams2
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);
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if ((size_t)offset > _bsize) return 0;
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if (size > _bsize - offset) size = _bsize - offset;
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memcpy(buffer, buf + offset, size);
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return size;
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}
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static void find_xhci(uint32_t device, uint16_t v, uint16_t d, void * extra) {
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if (pci_find_type(device) != 0x0C03) return;
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if (pci_read_field(device, PCI_PROG_IF, 1) != 0x30) return;
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fs_node_t * stderr = extra;
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uint16_t command_reg = pci_read_field(device, PCI_COMMAND, 2);
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command_reg |= (1 << 2);
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command_reg |= (1 << 1);
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pci_write_field(device, PCI_COMMAND, 2, command_reg);
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/* The mmio address is 64 bits and combines BAR0 and BAR1... */
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uint64_t addr_low = pci_read_field(device, PCI_BAR0, 4) & 0xFFFFFFF0;
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uint64_t addr_high = pci_read_field(device, PCI_BAR1, 4) & 0xFFFFFFFF; /* I think this is right? */
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uint64_t mmio_addr = (addr_high << 32) | addr_low;
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if (mmio_addr == 0) {
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/* Need to map... */
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fprintf(stderr, "xhci: Device is unmapped. TODO: Check if this is behind a PCI bridge...\n");
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return;
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#if 0
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mmio_addr = mmu_allocate_n_frames(2) << 12;
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pci_write_field(device, PCI_BAR0, 4, (mmio_addr & 0xFFFFFFF0) | (1 << 2));
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pci_write_field(device, PCI_BAR1, 4, (mmio_addr >> 32));
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#endif
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}
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2021-08-08 10:37:19 +03:00
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fprintf(stderr, "xhci: controller found\n");
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2021-08-01 11:45:31 +03:00
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struct XHCIControllerData * controller = calloc(sizeof(struct XHCIControllerData), 1);
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controller->device = device;
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/* Map mmio space... */
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uintptr_t xhci_regs = (uintptr_t)mmu_map_mmio_region(mmio_addr, 0x1000 * 4); /* I don't know. */
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controller->mmio = mmio_addr;
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controller->cregs = (struct xhci_cap_regs*)xhci_regs;
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controller->oregs = (struct xhci_op_regs*)(xhci_regs + (controller->cregs->cap_caplen_version & 0xFF));
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2021-08-08 10:37:19 +03:00
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fprintf(stderr, "xhci: available slots: %d\n", controller->cregs->cap_hcsparams1 & 0xFF);
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fprintf(stderr, "xhci: available ports: %d\n", controller->cregs->cap_hcsparams1 >> 24);
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fprintf(stderr, "xhci: resetting controller\n");
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fprintf(stderr, "xhci: waiting for controller to stop...\n");
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controller->oregs->op_usbcmd = 0;
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while (!(controller->oregs->op_usbsts & (1 << 0)));
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fprintf(stderr, "xhci: restarting controller...\n");
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controller->oregs->op_usbcmd = (1 << 1);
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while ((controller->oregs->op_usbcmd & (1 << 1)));
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while ((controller->oregs->op_usbsts & (1 << 11)));
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fprintf(stderr, "xhci: controller is ready.\n");
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fprintf(stderr, "xhci: slot config %#x -> %#x\n",
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controller->oregs->op_config, controller->cregs->cap_hcsparams1 & 0xFF);
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controller->oregs->op_config = controller->cregs->cap_hcsparams1 & 0xFF;
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fprintf(stderr, "xhci: clearing interrupts?\n");
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uint32_t sts = controller->oregs->op_usbsts;
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controller->oregs->op_usbsts = sts;
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controller->oregs->op_dnctrl = 0;
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fprintf(stderr, "xhci: context size is %d\n",
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(controller->cregs->cap_hccparams1 & (1 << 1)) ? 64 : 32);
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2021-08-21 02:04:59 +03:00
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uintptr_t dcbaap = mmu_allocate_n_frames(1) << 12;
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char * baseCtx = mmu_map_mmio_region(dcbaap, 0x1000);
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memset(baseCtx, 0, 0x1000);
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controller->oregs->op_dcbaap_lo = dcbaap & 0xFFFFFFFF;
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controller->oregs->op_dcbaap_hi = dcbaap >> 32UL;
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controller->oregs->op_dcbaap_lo = dcbaap & 0xFFFFFFFF;
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controller->oregs->op_dcbaap_hi = dcbaap >> 32UL;
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2021-08-08 10:37:19 +03:00
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2021-08-01 11:45:31 +03:00
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char devName[20] = "/dev/xhciN";
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snprintf(devName, 19, "/dev/xhci%d", _counter);
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fs_node_t * fnode = calloc(sizeof(fs_node_t), 1);
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snprintf(fnode->name, 100, "xhci%d", _counter);
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fnode->flags = FS_BLOCKDEVICE;
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fnode->mask = 0660; /* Only accessible to root user/group */
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fnode->read = xhci_procfs_callback;
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fnode->device = controller;
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vfs_mount(devName, fnode);
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_counter++;
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}
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static int init(int argc, char * argv[]) {
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fs_node_t * node = FD_ENTRY(1); /* Get the stdout for the process that loaded the module */
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pci_scan(find_xhci, -1, node);
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return 0;
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}
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static int fini(void) {
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return 0;
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}
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struct Module metadata = {
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.name = "xhci",
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.init = init,
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.fini = fini,
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};
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